f71882fg.c 83 KB

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  1. /***************************************************************************
  2. * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
  3. * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; either version 2 of the License, or *
  8. * (at your option) any later version. *
  9. * *
  10. * This program is distributed in the hope that it will be useful, *
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  13. * GNU General Public License for more details. *
  14. * *
  15. * You should have received a copy of the GNU General Public License *
  16. * along with this program; if not, write to the *
  17. * Free Software Foundation, Inc., *
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  19. ***************************************************************************/
  20. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/slab.h>
  24. #include <linux/jiffies.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/hwmon.h>
  27. #include <linux/hwmon-sysfs.h>
  28. #include <linux/err.h>
  29. #include <linux/mutex.h>
  30. #include <linux/io.h>
  31. #include <linux/acpi.h>
  32. #define DRVNAME "f71882fg"
  33. #define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
  34. #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
  35. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  36. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  37. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  38. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  39. #define SIO_REG_DEVREV 0x22 /* Device revision */
  40. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  41. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  42. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  43. #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
  44. #define SIO_F71808E_ID 0x0901 /* Chipset ID */
  45. #define SIO_F71808A_ID 0x1001 /* Chipset ID */
  46. #define SIO_F71858_ID 0x0507 /* Chipset ID */
  47. #define SIO_F71862_ID 0x0601 /* Chipset ID */
  48. #define SIO_F71869_ID 0x0814 /* Chipset ID */
  49. #define SIO_F71869A_ID 0x1007 /* Chipset ID */
  50. #define SIO_F71882_ID 0x0541 /* Chipset ID */
  51. #define SIO_F71889_ID 0x0723 /* Chipset ID */
  52. #define SIO_F71889E_ID 0x0909 /* Chipset ID */
  53. #define SIO_F71889A_ID 0x1005 /* Chipset ID */
  54. #define SIO_F8000_ID 0x0581 /* Chipset ID */
  55. #define SIO_F81865_ID 0x0704 /* Chipset ID */
  56. #define REGION_LENGTH 8
  57. #define ADDR_REG_OFFSET 5
  58. #define DATA_REG_OFFSET 6
  59. #define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
  60. #define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
  61. #define F71882FG_REG_IN(nr) (0x20 + (nr))
  62. #define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
  63. #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
  64. #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
  65. #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
  66. #define F71882FG_REG_FAN_STATUS 0x92
  67. #define F71882FG_REG_FAN_BEEP 0x93
  68. #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
  69. #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
  70. #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
  71. #define F71882FG_REG_TEMP_STATUS 0x62
  72. #define F71882FG_REG_TEMP_BEEP 0x63
  73. #define F71882FG_REG_TEMP_CONFIG 0x69
  74. #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
  75. #define F71882FG_REG_TEMP_TYPE 0x6B
  76. #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
  77. #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
  78. #define F71882FG_REG_PWM_TYPE 0x94
  79. #define F71882FG_REG_PWM_ENABLE 0x96
  80. #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
  81. #define F71882FG_REG_FAN_FAULT_T 0x9F
  82. #define F71882FG_FAN_NEG_TEMP_EN 0x20
  83. #define F71882FG_FAN_PROG_SEL 0x80
  84. #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
  85. #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
  86. #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
  87. #define F71882FG_REG_START 0x01
  88. #define F71882FG_MAX_INS 9
  89. #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
  90. static unsigned short force_id;
  91. module_param(force_id, ushort, 0);
  92. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  93. enum chips { f71808e, f71808a, f71858fg, f71862fg, f71869, f71869a, f71882fg,
  94. f71889fg, f71889ed, f71889a, f8000, f81865f };
  95. static const char *const f71882fg_names[] = {
  96. "f71808e",
  97. "f71808a",
  98. "f71858fg",
  99. "f71862fg",
  100. "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
  101. "f71869a",
  102. "f71882fg",
  103. "f71889fg", /* f81801u too, same id */
  104. "f71889ed",
  105. "f71889a",
  106. "f8000",
  107. "f81865f",
  108. };
  109. static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
  110. [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1 },
  111. [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1 },
  112. [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
  113. [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  114. [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  115. [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  116. [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  117. [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  118. [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  119. [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  120. [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
  121. [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  122. };
  123. static const char f71882fg_has_in1_alarm[] = {
  124. [f71808e] = 0,
  125. [f71808a] = 0,
  126. [f71858fg] = 0,
  127. [f71862fg] = 0,
  128. [f71869] = 0,
  129. [f71869a] = 0,
  130. [f71882fg] = 1,
  131. [f71889fg] = 1,
  132. [f71889ed] = 1,
  133. [f71889a] = 1,
  134. [f8000] = 0,
  135. [f81865f] = 1,
  136. };
  137. static const char f71882fg_fan_has_beep[] = {
  138. [f71808e] = 0,
  139. [f71808a] = 0,
  140. [f71858fg] = 0,
  141. [f71862fg] = 1,
  142. [f71869] = 1,
  143. [f71869a] = 1,
  144. [f71882fg] = 1,
  145. [f71889fg] = 1,
  146. [f71889ed] = 1,
  147. [f71889a] = 1,
  148. [f8000] = 0,
  149. [f81865f] = 1,
  150. };
  151. static const char f71882fg_nr_fans[] = {
  152. [f71808e] = 3,
  153. [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
  154. [f71858fg] = 3,
  155. [f71862fg] = 3,
  156. [f71869] = 3,
  157. [f71869a] = 3,
  158. [f71882fg] = 4,
  159. [f71889fg] = 3,
  160. [f71889ed] = 3,
  161. [f71889a] = 3,
  162. [f8000] = 3, /* +1 fan which is monitor only */
  163. [f81865f] = 2,
  164. };
  165. static const char f71882fg_temp_has_beep[] = {
  166. [f71808e] = 0,
  167. [f71808a] = 1,
  168. [f71858fg] = 0,
  169. [f71862fg] = 1,
  170. [f71869] = 1,
  171. [f71869a] = 1,
  172. [f71882fg] = 1,
  173. [f71889fg] = 1,
  174. [f71889ed] = 1,
  175. [f71889a] = 1,
  176. [f8000] = 0,
  177. [f81865f] = 1,
  178. };
  179. static const char f71882fg_nr_temps[] = {
  180. [f71808e] = 2,
  181. [f71808a] = 2,
  182. [f71858fg] = 3,
  183. [f71862fg] = 3,
  184. [f71869] = 3,
  185. [f71869a] = 3,
  186. [f71882fg] = 3,
  187. [f71889fg] = 3,
  188. [f71889ed] = 3,
  189. [f71889a] = 3,
  190. [f8000] = 3,
  191. [f81865f] = 2,
  192. };
  193. static struct platform_device *f71882fg_pdev;
  194. /* Super-I/O Function prototypes */
  195. static inline int superio_inb(int base, int reg);
  196. static inline int superio_inw(int base, int reg);
  197. static inline int superio_enter(int base);
  198. static inline void superio_select(int base, int ld);
  199. static inline void superio_exit(int base);
  200. struct f71882fg_sio_data {
  201. enum chips type;
  202. };
  203. struct f71882fg_data {
  204. unsigned short addr;
  205. enum chips type;
  206. struct device *hwmon_dev;
  207. struct mutex update_lock;
  208. int temp_start; /* temp numbering start (0 or 1) */
  209. char valid; /* !=0 if following fields are valid */
  210. char auto_point_temp_signed;
  211. unsigned long last_updated; /* In jiffies */
  212. unsigned long last_limits; /* In jiffies */
  213. /* Register Values */
  214. u8 in[F71882FG_MAX_INS];
  215. u8 in1_max;
  216. u8 in_status;
  217. u8 in_beep;
  218. u16 fan[4];
  219. u16 fan_target[4];
  220. u16 fan_full_speed[4];
  221. u8 fan_status;
  222. u8 fan_beep;
  223. /*
  224. * Note: all models have max 3 temperature channels, but on some
  225. * they are addressed as 0-2 and on others as 1-3, so for coding
  226. * convenience we reserve space for 4 channels
  227. */
  228. u16 temp[4];
  229. u8 temp_ovt[4];
  230. u8 temp_high[4];
  231. u8 temp_hyst[2]; /* 2 hysts stored per reg */
  232. u8 temp_type[4];
  233. u8 temp_status;
  234. u8 temp_beep;
  235. u8 temp_diode_open;
  236. u8 temp_config;
  237. u8 pwm[4];
  238. u8 pwm_enable;
  239. u8 pwm_auto_point_hyst[2];
  240. u8 pwm_auto_point_mapping[4];
  241. u8 pwm_auto_point_pwm[4][5];
  242. s8 pwm_auto_point_temp[4][4];
  243. };
  244. /* Sysfs in */
  245. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  246. char *buf);
  247. static ssize_t show_in_max(struct device *dev, struct device_attribute
  248. *devattr, char *buf);
  249. static ssize_t store_in_max(struct device *dev, struct device_attribute
  250. *devattr, const char *buf, size_t count);
  251. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  252. *devattr, char *buf);
  253. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  254. *devattr, const char *buf, size_t count);
  255. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  256. *devattr, char *buf);
  257. /* Sysfs Fan */
  258. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  259. char *buf);
  260. static ssize_t show_fan_full_speed(struct device *dev,
  261. struct device_attribute *devattr, char *buf);
  262. static ssize_t store_fan_full_speed(struct device *dev,
  263. struct device_attribute *devattr, const char *buf, size_t count);
  264. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  265. *devattr, char *buf);
  266. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  267. *devattr, const char *buf, size_t count);
  268. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  269. *devattr, char *buf);
  270. /* Sysfs Temp */
  271. static ssize_t show_temp(struct device *dev, struct device_attribute
  272. *devattr, char *buf);
  273. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  274. *devattr, char *buf);
  275. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  276. *devattr, const char *buf, size_t count);
  277. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  278. *devattr, char *buf);
  279. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  280. *devattr, const char *buf, size_t count);
  281. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  282. *devattr, char *buf);
  283. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  284. *devattr, const char *buf, size_t count);
  285. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  286. *devattr, char *buf);
  287. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  288. *devattr, char *buf);
  289. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  290. *devattr, char *buf);
  291. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  292. *devattr, const char *buf, size_t count);
  293. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  294. *devattr, char *buf);
  295. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  296. *devattr, char *buf);
  297. /* PWM and Auto point control */
  298. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  299. char *buf);
  300. static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
  301. const char *buf, size_t count);
  302. static ssize_t show_simple_pwm(struct device *dev,
  303. struct device_attribute *devattr, char *buf);
  304. static ssize_t store_simple_pwm(struct device *dev,
  305. struct device_attribute *devattr, const char *buf, size_t count);
  306. static ssize_t show_pwm_enable(struct device *dev,
  307. struct device_attribute *devattr, char *buf);
  308. static ssize_t store_pwm_enable(struct device *dev,
  309. struct device_attribute *devattr, const char *buf, size_t count);
  310. static ssize_t show_pwm_interpolate(struct device *dev,
  311. struct device_attribute *devattr, char *buf);
  312. static ssize_t store_pwm_interpolate(struct device *dev,
  313. struct device_attribute *devattr, const char *buf, size_t count);
  314. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  315. struct device_attribute *devattr, char *buf);
  316. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  317. struct device_attribute *devattr, const char *buf, size_t count);
  318. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  319. struct device_attribute *devattr, char *buf);
  320. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  321. struct device_attribute *devattr, const char *buf, size_t count);
  322. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  323. struct device_attribute *devattr, char *buf);
  324. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  325. struct device_attribute *devattr, const char *buf, size_t count);
  326. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  327. struct device_attribute *devattr, char *buf);
  328. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  329. struct device_attribute *devattr, const char *buf, size_t count);
  330. /* Sysfs misc */
  331. static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
  332. char *buf);
  333. static int f71882fg_probe(struct platform_device *pdev);
  334. static int f71882fg_remove(struct platform_device *pdev);
  335. static struct platform_driver f71882fg_driver = {
  336. .driver = {
  337. .name = DRVNAME,
  338. },
  339. .probe = f71882fg_probe,
  340. .remove = f71882fg_remove,
  341. };
  342. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  343. /*
  344. * Temp attr for the f71858fg, the f71858fg is special as it has its
  345. * temperature indexes start at 0 (the others start at 1)
  346. */
  347. static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
  348. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  349. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  350. store_temp_max, 0, 0),
  351. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  352. store_temp_max_hyst, 0, 0),
  353. SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
  354. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  355. store_temp_crit, 0, 0),
  356. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  357. 0, 0),
  358. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  359. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  360. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  361. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  362. store_temp_max, 0, 1),
  363. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  364. store_temp_max_hyst, 0, 1),
  365. SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  366. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  367. store_temp_crit, 0, 1),
  368. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  369. 0, 1),
  370. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  371. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  372. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  373. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  374. store_temp_max, 0, 2),
  375. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  376. store_temp_max_hyst, 0, 2),
  377. SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  378. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  379. store_temp_crit, 0, 2),
  380. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  381. 0, 2),
  382. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  383. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  384. };
  385. /* Temp attr for the standard models */
  386. static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
  387. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
  388. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  389. store_temp_max, 0, 1),
  390. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  391. store_temp_max_hyst, 0, 1),
  392. /*
  393. * Should really be temp1_max_alarm, but older versions did not handle
  394. * the max and crit alarms separately and lm_sensors v2 depends on the
  395. * presence of temp#_alarm files. The same goes for temp2/3 _alarm.
  396. */
  397. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  398. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  399. store_temp_crit, 0, 1),
  400. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  401. 0, 1),
  402. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  403. SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
  404. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  405. }, {
  406. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
  407. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  408. store_temp_max, 0, 2),
  409. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  410. store_temp_max_hyst, 0, 2),
  411. /* Should be temp2_max_alarm, see temp1_alarm note */
  412. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  413. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  414. store_temp_crit, 0, 2),
  415. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  416. 0, 2),
  417. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  418. SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
  419. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  420. }, {
  421. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
  422. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  423. store_temp_max, 0, 3),
  424. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  425. store_temp_max_hyst, 0, 3),
  426. /* Should be temp3_max_alarm, see temp1_alarm note */
  427. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
  428. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  429. store_temp_crit, 0, 3),
  430. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  431. 0, 3),
  432. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
  433. SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
  434. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
  435. } };
  436. /* Temp attr for models which can beep on temp alarm */
  437. static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
  438. SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  439. store_temp_beep, 0, 1),
  440. SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  441. store_temp_beep, 0, 5),
  442. }, {
  443. SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  444. store_temp_beep, 0, 2),
  445. SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  446. store_temp_beep, 0, 6),
  447. }, {
  448. SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  449. store_temp_beep, 0, 3),
  450. SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  451. store_temp_beep, 0, 7),
  452. } };
  453. /*
  454. * Temp attr for the f8000
  455. * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
  456. * is used as hysteresis value to clear alarms
  457. * Also like the f71858fg its temperature indexes start at 0
  458. */
  459. static struct sensor_device_attribute_2 f8000_temp_attr[] = {
  460. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  461. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
  462. store_temp_crit, 0, 0),
  463. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  464. store_temp_max, 0, 0),
  465. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  466. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  467. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  468. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
  469. store_temp_crit, 0, 1),
  470. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  471. store_temp_max, 0, 1),
  472. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  473. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  474. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  475. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
  476. store_temp_crit, 0, 2),
  477. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  478. store_temp_max, 0, 2),
  479. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  480. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  481. };
  482. /* in attr for all models */
  483. static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
  484. SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
  485. SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
  486. SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
  487. SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
  488. SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
  489. SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
  490. SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
  491. SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
  492. SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
  493. };
  494. /* For models with in1 alarm capability */
  495. static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
  496. SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
  497. 0, 1),
  498. SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
  499. 0, 1),
  500. SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
  501. };
  502. /* Fan / PWM attr common to all models */
  503. static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
  504. SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
  505. SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
  506. show_fan_full_speed,
  507. store_fan_full_speed, 0, 0),
  508. SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
  509. SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
  510. SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  511. store_pwm_enable, 0, 0),
  512. SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
  513. show_pwm_interpolate, store_pwm_interpolate, 0, 0),
  514. }, {
  515. SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
  516. SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
  517. show_fan_full_speed,
  518. store_fan_full_speed, 0, 1),
  519. SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
  520. SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
  521. SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  522. store_pwm_enable, 0, 1),
  523. SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
  524. show_pwm_interpolate, store_pwm_interpolate, 0, 1),
  525. }, {
  526. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  527. SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
  528. show_fan_full_speed,
  529. store_fan_full_speed, 0, 2),
  530. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  531. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
  532. SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  533. store_pwm_enable, 0, 2),
  534. SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
  535. show_pwm_interpolate, store_pwm_interpolate, 0, 2),
  536. }, {
  537. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  538. SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
  539. show_fan_full_speed,
  540. store_fan_full_speed, 0, 3),
  541. SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
  542. SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
  543. SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  544. store_pwm_enable, 0, 3),
  545. SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
  546. show_pwm_interpolate, store_pwm_interpolate, 0, 3),
  547. } };
  548. /* Attr for the third fan of the f71808a, which only has manual pwm */
  549. static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
  550. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  551. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  552. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
  553. show_simple_pwm, store_simple_pwm, 0, 2),
  554. };
  555. /* Attr for models which can beep on Fan alarm */
  556. static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
  557. SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  558. store_fan_beep, 0, 0),
  559. SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  560. store_fan_beep, 0, 1),
  561. SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  562. store_fan_beep, 0, 2),
  563. SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  564. store_fan_beep, 0, 3),
  565. };
  566. /*
  567. * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
  568. * standard models
  569. */
  570. static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { {
  571. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  572. show_pwm_auto_point_channel,
  573. store_pwm_auto_point_channel, 0, 0),
  574. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  575. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  576. 1, 0),
  577. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  578. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  579. 4, 0),
  580. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  581. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  582. 0, 0),
  583. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  584. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  585. 3, 0),
  586. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  587. show_pwm_auto_point_temp_hyst,
  588. store_pwm_auto_point_temp_hyst,
  589. 0, 0),
  590. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  591. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  592. }, {
  593. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  594. show_pwm_auto_point_channel,
  595. store_pwm_auto_point_channel, 0, 1),
  596. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  597. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  598. 1, 1),
  599. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  600. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  601. 4, 1),
  602. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  603. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  604. 0, 1),
  605. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  606. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  607. 3, 1),
  608. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  609. show_pwm_auto_point_temp_hyst,
  610. store_pwm_auto_point_temp_hyst,
  611. 0, 1),
  612. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  613. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  614. }, {
  615. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  616. show_pwm_auto_point_channel,
  617. store_pwm_auto_point_channel, 0, 2),
  618. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  619. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  620. 1, 2),
  621. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  622. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  623. 4, 2),
  624. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  625. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  626. 0, 2),
  627. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  628. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  629. 3, 2),
  630. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  631. show_pwm_auto_point_temp_hyst,
  632. store_pwm_auto_point_temp_hyst,
  633. 0, 2),
  634. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  635. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  636. } };
  637. /*
  638. * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
  639. * pwm setting when the temperature is above the pwmX_auto_point1_temp can be
  640. * programmed instead of being hardcoded to 0xff
  641. */
  642. static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { {
  643. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  644. show_pwm_auto_point_channel,
  645. store_pwm_auto_point_channel, 0, 0),
  646. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  647. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  648. 0, 0),
  649. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  650. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  651. 1, 0),
  652. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  653. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  654. 4, 0),
  655. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  656. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  657. 0, 0),
  658. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  659. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  660. 3, 0),
  661. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  662. show_pwm_auto_point_temp_hyst,
  663. store_pwm_auto_point_temp_hyst,
  664. 0, 0),
  665. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  666. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  667. }, {
  668. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  669. show_pwm_auto_point_channel,
  670. store_pwm_auto_point_channel, 0, 1),
  671. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  672. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  673. 0, 1),
  674. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  675. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  676. 1, 1),
  677. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  678. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  679. 4, 1),
  680. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  681. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  682. 0, 1),
  683. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  684. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  685. 3, 1),
  686. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  687. show_pwm_auto_point_temp_hyst,
  688. store_pwm_auto_point_temp_hyst,
  689. 0, 1),
  690. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  691. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  692. }, {
  693. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  694. show_pwm_auto_point_channel,
  695. store_pwm_auto_point_channel, 0, 2),
  696. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  697. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  698. 0, 2),
  699. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  700. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  701. 1, 2),
  702. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  703. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  704. 4, 2),
  705. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  706. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  707. 0, 2),
  708. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  709. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  710. 3, 2),
  711. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  712. show_pwm_auto_point_temp_hyst,
  713. store_pwm_auto_point_temp_hyst,
  714. 0, 2),
  715. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  716. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  717. } };
  718. /* PWM attr for the standard models */
  719. static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
  720. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  721. show_pwm_auto_point_channel,
  722. store_pwm_auto_point_channel, 0, 0),
  723. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  724. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  725. 0, 0),
  726. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  727. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  728. 1, 0),
  729. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  730. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  731. 2, 0),
  732. SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  733. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  734. 3, 0),
  735. SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  736. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  737. 4, 0),
  738. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  739. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  740. 0, 0),
  741. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  742. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  743. 1, 0),
  744. SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
  745. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  746. 2, 0),
  747. SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
  748. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  749. 3, 0),
  750. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  751. show_pwm_auto_point_temp_hyst,
  752. store_pwm_auto_point_temp_hyst,
  753. 0, 0),
  754. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  755. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  756. SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
  757. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  758. SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
  759. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  760. }, {
  761. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  762. show_pwm_auto_point_channel,
  763. store_pwm_auto_point_channel, 0, 1),
  764. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  765. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  766. 0, 1),
  767. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  768. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  769. 1, 1),
  770. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  771. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  772. 2, 1),
  773. SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  774. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  775. 3, 1),
  776. SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  777. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  778. 4, 1),
  779. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  780. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  781. 0, 1),
  782. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  783. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  784. 1, 1),
  785. SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
  786. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  787. 2, 1),
  788. SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
  789. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  790. 3, 1),
  791. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  792. show_pwm_auto_point_temp_hyst,
  793. store_pwm_auto_point_temp_hyst,
  794. 0, 1),
  795. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  796. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  797. SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
  798. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  799. SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
  800. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  801. }, {
  802. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  803. show_pwm_auto_point_channel,
  804. store_pwm_auto_point_channel, 0, 2),
  805. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  806. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  807. 0, 2),
  808. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  809. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  810. 1, 2),
  811. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  812. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  813. 2, 2),
  814. SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  815. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  816. 3, 2),
  817. SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  818. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  819. 4, 2),
  820. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  821. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  822. 0, 2),
  823. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  824. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  825. 1, 2),
  826. SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
  827. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  828. 2, 2),
  829. SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
  830. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  831. 3, 2),
  832. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  833. show_pwm_auto_point_temp_hyst,
  834. store_pwm_auto_point_temp_hyst,
  835. 0, 2),
  836. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  837. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  838. SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
  839. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  840. SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
  841. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  842. }, {
  843. SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
  844. show_pwm_auto_point_channel,
  845. store_pwm_auto_point_channel, 0, 3),
  846. SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
  847. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  848. 0, 3),
  849. SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
  850. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  851. 1, 3),
  852. SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
  853. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  854. 2, 3),
  855. SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
  856. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  857. 3, 3),
  858. SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
  859. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  860. 4, 3),
  861. SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
  862. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  863. 0, 3),
  864. SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
  865. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  866. 1, 3),
  867. SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
  868. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  869. 2, 3),
  870. SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
  871. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  872. 3, 3),
  873. SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  874. show_pwm_auto_point_temp_hyst,
  875. store_pwm_auto_point_temp_hyst,
  876. 0, 3),
  877. SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
  878. show_pwm_auto_point_temp_hyst, NULL, 1, 3),
  879. SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
  880. show_pwm_auto_point_temp_hyst, NULL, 2, 3),
  881. SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
  882. show_pwm_auto_point_temp_hyst, NULL, 3, 3),
  883. } };
  884. /* Fan attr specific to the f8000 (4th fan input can only measure speed) */
  885. static struct sensor_device_attribute_2 f8000_fan_attr[] = {
  886. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  887. };
  888. /*
  889. * PWM attr for the f8000, zones mapped to temp instead of to pwm!
  890. * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
  891. * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0
  892. */
  893. static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { {
  894. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  895. show_pwm_auto_point_channel,
  896. store_pwm_auto_point_channel, 0, 0),
  897. SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  898. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  899. 0, 2),
  900. SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  901. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  902. 1, 2),
  903. SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  904. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  905. 2, 2),
  906. SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  907. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  908. 3, 2),
  909. SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  910. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  911. 4, 2),
  912. SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
  913. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  914. 0, 2),
  915. SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
  916. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  917. 1, 2),
  918. SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
  919. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  920. 2, 2),
  921. SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
  922. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  923. 3, 2),
  924. SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  925. show_pwm_auto_point_temp_hyst,
  926. store_pwm_auto_point_temp_hyst,
  927. 0, 2),
  928. SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
  929. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  930. SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
  931. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  932. SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
  933. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  934. }, {
  935. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  936. show_pwm_auto_point_channel,
  937. store_pwm_auto_point_channel, 0, 1),
  938. SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  939. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  940. 0, 0),
  941. SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  942. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  943. 1, 0),
  944. SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  945. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  946. 2, 0),
  947. SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  948. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  949. 3, 0),
  950. SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  951. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  952. 4, 0),
  953. SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
  954. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  955. 0, 0),
  956. SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
  957. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  958. 1, 0),
  959. SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
  960. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  961. 2, 0),
  962. SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
  963. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  964. 3, 0),
  965. SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  966. show_pwm_auto_point_temp_hyst,
  967. store_pwm_auto_point_temp_hyst,
  968. 0, 0),
  969. SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
  970. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  971. SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
  972. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  973. SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
  974. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  975. }, {
  976. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  977. show_pwm_auto_point_channel,
  978. store_pwm_auto_point_channel, 0, 2),
  979. SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  980. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  981. 0, 1),
  982. SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  983. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  984. 1, 1),
  985. SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  986. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  987. 2, 1),
  988. SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  989. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  990. 3, 1),
  991. SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  992. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  993. 4, 1),
  994. SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
  995. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  996. 0, 1),
  997. SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
  998. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  999. 1, 1),
  1000. SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
  1001. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1002. 2, 1),
  1003. SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
  1004. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1005. 3, 1),
  1006. SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1007. show_pwm_auto_point_temp_hyst,
  1008. store_pwm_auto_point_temp_hyst,
  1009. 0, 1),
  1010. SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
  1011. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  1012. SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
  1013. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  1014. SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
  1015. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  1016. } };
  1017. /* Super I/O functions */
  1018. static inline int superio_inb(int base, int reg)
  1019. {
  1020. outb(reg, base);
  1021. return inb(base + 1);
  1022. }
  1023. static int superio_inw(int base, int reg)
  1024. {
  1025. int val;
  1026. val = superio_inb(base, reg) << 8;
  1027. val |= superio_inb(base, reg + 1);
  1028. return val;
  1029. }
  1030. static inline int superio_enter(int base)
  1031. {
  1032. /* Don't step on other drivers' I/O space by accident */
  1033. if (!request_muxed_region(base, 2, DRVNAME)) {
  1034. pr_err("I/O address 0x%04x already in use\n", base);
  1035. return -EBUSY;
  1036. }
  1037. /* according to the datasheet the key must be send twice! */
  1038. outb(SIO_UNLOCK_KEY, base);
  1039. outb(SIO_UNLOCK_KEY, base);
  1040. return 0;
  1041. }
  1042. static inline void superio_select(int base, int ld)
  1043. {
  1044. outb(SIO_REG_LDSEL, base);
  1045. outb(ld, base + 1);
  1046. }
  1047. static inline void superio_exit(int base)
  1048. {
  1049. outb(SIO_LOCK_KEY, base);
  1050. release_region(base, 2);
  1051. }
  1052. static inline int fan_from_reg(u16 reg)
  1053. {
  1054. return reg ? (1500000 / reg) : 0;
  1055. }
  1056. static inline u16 fan_to_reg(int fan)
  1057. {
  1058. return fan ? (1500000 / fan) : 0;
  1059. }
  1060. static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
  1061. {
  1062. u8 val;
  1063. outb(reg, data->addr + ADDR_REG_OFFSET);
  1064. val = inb(data->addr + DATA_REG_OFFSET);
  1065. return val;
  1066. }
  1067. static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
  1068. {
  1069. u16 val;
  1070. val = f71882fg_read8(data, reg) << 8;
  1071. val |= f71882fg_read8(data, reg + 1);
  1072. return val;
  1073. }
  1074. static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
  1075. {
  1076. outb(reg, data->addr + ADDR_REG_OFFSET);
  1077. outb(val, data->addr + DATA_REG_OFFSET);
  1078. }
  1079. static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
  1080. {
  1081. f71882fg_write8(data, reg, val >> 8);
  1082. f71882fg_write8(data, reg + 1, val & 0xff);
  1083. }
  1084. static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
  1085. {
  1086. if (data->type == f71858fg)
  1087. return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
  1088. else
  1089. return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
  1090. }
  1091. static struct f71882fg_data *f71882fg_update_device(struct device *dev)
  1092. {
  1093. struct f71882fg_data *data = dev_get_drvdata(dev);
  1094. int nr_fans = f71882fg_nr_fans[data->type];
  1095. int nr_temps = f71882fg_nr_temps[data->type];
  1096. int nr, reg, point;
  1097. mutex_lock(&data->update_lock);
  1098. /* Update once every 60 seconds */
  1099. if (time_after(jiffies, data->last_limits + 60 * HZ) ||
  1100. !data->valid) {
  1101. if (f71882fg_has_in1_alarm[data->type]) {
  1102. data->in1_max =
  1103. f71882fg_read8(data, F71882FG_REG_IN1_HIGH);
  1104. data->in_beep =
  1105. f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  1106. }
  1107. /* Get High & boundary temps*/
  1108. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  1109. nr++) {
  1110. data->temp_ovt[nr] = f71882fg_read8(data,
  1111. F71882FG_REG_TEMP_OVT(nr));
  1112. data->temp_high[nr] = f71882fg_read8(data,
  1113. F71882FG_REG_TEMP_HIGH(nr));
  1114. }
  1115. if (data->type != f8000) {
  1116. data->temp_hyst[0] = f71882fg_read8(data,
  1117. F71882FG_REG_TEMP_HYST(0));
  1118. data->temp_hyst[1] = f71882fg_read8(data,
  1119. F71882FG_REG_TEMP_HYST(1));
  1120. }
  1121. /* All but the f71858fg / f8000 have this register */
  1122. if ((data->type != f71858fg) && (data->type != f8000)) {
  1123. reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
  1124. data->temp_type[1] = (reg & 0x02) ? 2 : 4;
  1125. data->temp_type[2] = (reg & 0x04) ? 2 : 4;
  1126. data->temp_type[3] = (reg & 0x08) ? 2 : 4;
  1127. }
  1128. if (f71882fg_fan_has_beep[data->type])
  1129. data->fan_beep = f71882fg_read8(data,
  1130. F71882FG_REG_FAN_BEEP);
  1131. if (f71882fg_temp_has_beep[data->type])
  1132. data->temp_beep = f71882fg_read8(data,
  1133. F71882FG_REG_TEMP_BEEP);
  1134. data->pwm_enable = f71882fg_read8(data,
  1135. F71882FG_REG_PWM_ENABLE);
  1136. data->pwm_auto_point_hyst[0] =
  1137. f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
  1138. data->pwm_auto_point_hyst[1] =
  1139. f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
  1140. for (nr = 0; nr < nr_fans; nr++) {
  1141. data->pwm_auto_point_mapping[nr] =
  1142. f71882fg_read8(data,
  1143. F71882FG_REG_POINT_MAPPING(nr));
  1144. switch (data->type) {
  1145. default:
  1146. for (point = 0; point < 5; point++) {
  1147. data->pwm_auto_point_pwm[nr][point] =
  1148. f71882fg_read8(data,
  1149. F71882FG_REG_POINT_PWM
  1150. (nr, point));
  1151. }
  1152. for (point = 0; point < 4; point++) {
  1153. data->pwm_auto_point_temp[nr][point] =
  1154. f71882fg_read8(data,
  1155. F71882FG_REG_POINT_TEMP
  1156. (nr, point));
  1157. }
  1158. break;
  1159. case f71808e:
  1160. case f71869:
  1161. data->pwm_auto_point_pwm[nr][0] =
  1162. f71882fg_read8(data,
  1163. F71882FG_REG_POINT_PWM(nr, 0));
  1164. /* Fall through */
  1165. case f71862fg:
  1166. data->pwm_auto_point_pwm[nr][1] =
  1167. f71882fg_read8(data,
  1168. F71882FG_REG_POINT_PWM
  1169. (nr, 1));
  1170. data->pwm_auto_point_pwm[nr][4] =
  1171. f71882fg_read8(data,
  1172. F71882FG_REG_POINT_PWM
  1173. (nr, 4));
  1174. data->pwm_auto_point_temp[nr][0] =
  1175. f71882fg_read8(data,
  1176. F71882FG_REG_POINT_TEMP
  1177. (nr, 0));
  1178. data->pwm_auto_point_temp[nr][3] =
  1179. f71882fg_read8(data,
  1180. F71882FG_REG_POINT_TEMP
  1181. (nr, 3));
  1182. break;
  1183. }
  1184. }
  1185. data->last_limits = jiffies;
  1186. }
  1187. /* Update every second */
  1188. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  1189. data->temp_status = f71882fg_read8(data,
  1190. F71882FG_REG_TEMP_STATUS);
  1191. data->temp_diode_open = f71882fg_read8(data,
  1192. F71882FG_REG_TEMP_DIODE_OPEN);
  1193. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  1194. nr++)
  1195. data->temp[nr] = f71882fg_read_temp(data, nr);
  1196. data->fan_status = f71882fg_read8(data,
  1197. F71882FG_REG_FAN_STATUS);
  1198. for (nr = 0; nr < nr_fans; nr++) {
  1199. data->fan[nr] = f71882fg_read16(data,
  1200. F71882FG_REG_FAN(nr));
  1201. data->fan_target[nr] =
  1202. f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
  1203. data->fan_full_speed[nr] =
  1204. f71882fg_read16(data,
  1205. F71882FG_REG_FAN_FULL_SPEED(nr));
  1206. data->pwm[nr] =
  1207. f71882fg_read8(data, F71882FG_REG_PWM(nr));
  1208. }
  1209. /* Some models have 1 more fan with limited capabilities */
  1210. if (data->type == f71808a) {
  1211. data->fan[2] = f71882fg_read16(data,
  1212. F71882FG_REG_FAN(2));
  1213. data->pwm[2] = f71882fg_read8(data,
  1214. F71882FG_REG_PWM(2));
  1215. }
  1216. if (data->type == f8000)
  1217. data->fan[3] = f71882fg_read16(data,
  1218. F71882FG_REG_FAN(3));
  1219. if (f71882fg_has_in1_alarm[data->type])
  1220. data->in_status = f71882fg_read8(data,
  1221. F71882FG_REG_IN_STATUS);
  1222. for (nr = 0; nr < F71882FG_MAX_INS; nr++)
  1223. if (f71882fg_has_in[data->type][nr])
  1224. data->in[nr] = f71882fg_read8(data,
  1225. F71882FG_REG_IN(nr));
  1226. data->last_updated = jiffies;
  1227. data->valid = 1;
  1228. }
  1229. mutex_unlock(&data->update_lock);
  1230. return data;
  1231. }
  1232. /* Sysfs Interface */
  1233. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  1234. char *buf)
  1235. {
  1236. struct f71882fg_data *data = f71882fg_update_device(dev);
  1237. int nr = to_sensor_dev_attr_2(devattr)->index;
  1238. int speed = fan_from_reg(data->fan[nr]);
  1239. if (speed == FAN_MIN_DETECT)
  1240. speed = 0;
  1241. return sprintf(buf, "%d\n", speed);
  1242. }
  1243. static ssize_t show_fan_full_speed(struct device *dev,
  1244. struct device_attribute *devattr, char *buf)
  1245. {
  1246. struct f71882fg_data *data = f71882fg_update_device(dev);
  1247. int nr = to_sensor_dev_attr_2(devattr)->index;
  1248. int speed = fan_from_reg(data->fan_full_speed[nr]);
  1249. return sprintf(buf, "%d\n", speed);
  1250. }
  1251. static ssize_t store_fan_full_speed(struct device *dev,
  1252. struct device_attribute *devattr,
  1253. const char *buf, size_t count)
  1254. {
  1255. struct f71882fg_data *data = dev_get_drvdata(dev);
  1256. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1257. long val;
  1258. err = kstrtol(buf, 10, &val);
  1259. if (err)
  1260. return err;
  1261. val = clamp_val(val, 23, 1500000);
  1262. val = fan_to_reg(val);
  1263. mutex_lock(&data->update_lock);
  1264. f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
  1265. data->fan_full_speed[nr] = val;
  1266. mutex_unlock(&data->update_lock);
  1267. return count;
  1268. }
  1269. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  1270. *devattr, char *buf)
  1271. {
  1272. struct f71882fg_data *data = f71882fg_update_device(dev);
  1273. int nr = to_sensor_dev_attr_2(devattr)->index;
  1274. if (data->fan_beep & (1 << nr))
  1275. return sprintf(buf, "1\n");
  1276. else
  1277. return sprintf(buf, "0\n");
  1278. }
  1279. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  1280. *devattr, const char *buf, size_t count)
  1281. {
  1282. struct f71882fg_data *data = dev_get_drvdata(dev);
  1283. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1284. unsigned long val;
  1285. err = kstrtoul(buf, 10, &val);
  1286. if (err)
  1287. return err;
  1288. mutex_lock(&data->update_lock);
  1289. data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
  1290. if (val)
  1291. data->fan_beep |= 1 << nr;
  1292. else
  1293. data->fan_beep &= ~(1 << nr);
  1294. f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
  1295. mutex_unlock(&data->update_lock);
  1296. return count;
  1297. }
  1298. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  1299. *devattr, char *buf)
  1300. {
  1301. struct f71882fg_data *data = f71882fg_update_device(dev);
  1302. int nr = to_sensor_dev_attr_2(devattr)->index;
  1303. if (data->fan_status & (1 << nr))
  1304. return sprintf(buf, "1\n");
  1305. else
  1306. return sprintf(buf, "0\n");
  1307. }
  1308. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  1309. char *buf)
  1310. {
  1311. struct f71882fg_data *data = f71882fg_update_device(dev);
  1312. int nr = to_sensor_dev_attr_2(devattr)->index;
  1313. return sprintf(buf, "%d\n", data->in[nr] * 8);
  1314. }
  1315. static ssize_t show_in_max(struct device *dev, struct device_attribute
  1316. *devattr, char *buf)
  1317. {
  1318. struct f71882fg_data *data = f71882fg_update_device(dev);
  1319. return sprintf(buf, "%d\n", data->in1_max * 8);
  1320. }
  1321. static ssize_t store_in_max(struct device *dev, struct device_attribute
  1322. *devattr, const char *buf, size_t count)
  1323. {
  1324. struct f71882fg_data *data = dev_get_drvdata(dev);
  1325. int err;
  1326. long val;
  1327. err = kstrtol(buf, 10, &val);
  1328. if (err)
  1329. return err;
  1330. val /= 8;
  1331. val = clamp_val(val, 0, 255);
  1332. mutex_lock(&data->update_lock);
  1333. f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
  1334. data->in1_max = val;
  1335. mutex_unlock(&data->update_lock);
  1336. return count;
  1337. }
  1338. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  1339. *devattr, char *buf)
  1340. {
  1341. struct f71882fg_data *data = f71882fg_update_device(dev);
  1342. int nr = to_sensor_dev_attr_2(devattr)->index;
  1343. if (data->in_beep & (1 << nr))
  1344. return sprintf(buf, "1\n");
  1345. else
  1346. return sprintf(buf, "0\n");
  1347. }
  1348. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  1349. *devattr, const char *buf, size_t count)
  1350. {
  1351. struct f71882fg_data *data = dev_get_drvdata(dev);
  1352. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1353. unsigned long val;
  1354. err = kstrtoul(buf, 10, &val);
  1355. if (err)
  1356. return err;
  1357. mutex_lock(&data->update_lock);
  1358. data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  1359. if (val)
  1360. data->in_beep |= 1 << nr;
  1361. else
  1362. data->in_beep &= ~(1 << nr);
  1363. f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
  1364. mutex_unlock(&data->update_lock);
  1365. return count;
  1366. }
  1367. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  1368. *devattr, char *buf)
  1369. {
  1370. struct f71882fg_data *data = f71882fg_update_device(dev);
  1371. int nr = to_sensor_dev_attr_2(devattr)->index;
  1372. if (data->in_status & (1 << nr))
  1373. return sprintf(buf, "1\n");
  1374. else
  1375. return sprintf(buf, "0\n");
  1376. }
  1377. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  1378. char *buf)
  1379. {
  1380. struct f71882fg_data *data = f71882fg_update_device(dev);
  1381. int nr = to_sensor_dev_attr_2(devattr)->index;
  1382. int sign, temp;
  1383. if (data->type == f71858fg) {
  1384. /* TEMP_TABLE_SEL 1 or 3 ? */
  1385. if (data->temp_config & 1) {
  1386. sign = data->temp[nr] & 0x0001;
  1387. temp = (data->temp[nr] >> 5) & 0x7ff;
  1388. } else {
  1389. sign = data->temp[nr] & 0x8000;
  1390. temp = (data->temp[nr] >> 5) & 0x3ff;
  1391. }
  1392. temp *= 125;
  1393. if (sign)
  1394. temp -= 128000;
  1395. } else
  1396. temp = data->temp[nr] * 1000;
  1397. return sprintf(buf, "%d\n", temp);
  1398. }
  1399. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  1400. *devattr, char *buf)
  1401. {
  1402. struct f71882fg_data *data = f71882fg_update_device(dev);
  1403. int nr = to_sensor_dev_attr_2(devattr)->index;
  1404. return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
  1405. }
  1406. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  1407. *devattr, const char *buf, size_t count)
  1408. {
  1409. struct f71882fg_data *data = dev_get_drvdata(dev);
  1410. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1411. long val;
  1412. err = kstrtol(buf, 10, &val);
  1413. if (err)
  1414. return err;
  1415. val /= 1000;
  1416. val = clamp_val(val, 0, 255);
  1417. mutex_lock(&data->update_lock);
  1418. f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
  1419. data->temp_high[nr] = val;
  1420. mutex_unlock(&data->update_lock);
  1421. return count;
  1422. }
  1423. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  1424. *devattr, char *buf)
  1425. {
  1426. struct f71882fg_data *data = f71882fg_update_device(dev);
  1427. int nr = to_sensor_dev_attr_2(devattr)->index;
  1428. int temp_max_hyst;
  1429. mutex_lock(&data->update_lock);
  1430. if (nr & 1)
  1431. temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
  1432. else
  1433. temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
  1434. temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
  1435. mutex_unlock(&data->update_lock);
  1436. return sprintf(buf, "%d\n", temp_max_hyst);
  1437. }
  1438. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  1439. *devattr, const char *buf, size_t count)
  1440. {
  1441. struct f71882fg_data *data = dev_get_drvdata(dev);
  1442. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1443. ssize_t ret = count;
  1444. u8 reg;
  1445. long val;
  1446. err = kstrtol(buf, 10, &val);
  1447. if (err)
  1448. return err;
  1449. val /= 1000;
  1450. mutex_lock(&data->update_lock);
  1451. /* convert abs to relative and check */
  1452. data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
  1453. val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]);
  1454. val = data->temp_high[nr] - val;
  1455. /* convert value to register contents */
  1456. reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
  1457. if (nr & 1)
  1458. reg = (reg & 0x0f) | (val << 4);
  1459. else
  1460. reg = (reg & 0xf0) | val;
  1461. f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
  1462. data->temp_hyst[nr / 2] = reg;
  1463. mutex_unlock(&data->update_lock);
  1464. return ret;
  1465. }
  1466. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  1467. *devattr, char *buf)
  1468. {
  1469. struct f71882fg_data *data = f71882fg_update_device(dev);
  1470. int nr = to_sensor_dev_attr_2(devattr)->index;
  1471. return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
  1472. }
  1473. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  1474. *devattr, const char *buf, size_t count)
  1475. {
  1476. struct f71882fg_data *data = dev_get_drvdata(dev);
  1477. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1478. long val;
  1479. err = kstrtol(buf, 10, &val);
  1480. if (err)
  1481. return err;
  1482. val /= 1000;
  1483. val = clamp_val(val, 0, 255);
  1484. mutex_lock(&data->update_lock);
  1485. f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
  1486. data->temp_ovt[nr] = val;
  1487. mutex_unlock(&data->update_lock);
  1488. return count;
  1489. }
  1490. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  1491. *devattr, char *buf)
  1492. {
  1493. struct f71882fg_data *data = f71882fg_update_device(dev);
  1494. int nr = to_sensor_dev_attr_2(devattr)->index;
  1495. int temp_crit_hyst;
  1496. mutex_lock(&data->update_lock);
  1497. if (nr & 1)
  1498. temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
  1499. else
  1500. temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
  1501. temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
  1502. mutex_unlock(&data->update_lock);
  1503. return sprintf(buf, "%d\n", temp_crit_hyst);
  1504. }
  1505. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  1506. *devattr, char *buf)
  1507. {
  1508. struct f71882fg_data *data = f71882fg_update_device(dev);
  1509. int nr = to_sensor_dev_attr_2(devattr)->index;
  1510. return sprintf(buf, "%d\n", data->temp_type[nr]);
  1511. }
  1512. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  1513. *devattr, char *buf)
  1514. {
  1515. struct f71882fg_data *data = f71882fg_update_device(dev);
  1516. int nr = to_sensor_dev_attr_2(devattr)->index;
  1517. if (data->temp_beep & (1 << nr))
  1518. return sprintf(buf, "1\n");
  1519. else
  1520. return sprintf(buf, "0\n");
  1521. }
  1522. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  1523. *devattr, const char *buf, size_t count)
  1524. {
  1525. struct f71882fg_data *data = dev_get_drvdata(dev);
  1526. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1527. unsigned long val;
  1528. err = kstrtoul(buf, 10, &val);
  1529. if (err)
  1530. return err;
  1531. mutex_lock(&data->update_lock);
  1532. data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
  1533. if (val)
  1534. data->temp_beep |= 1 << nr;
  1535. else
  1536. data->temp_beep &= ~(1 << nr);
  1537. f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
  1538. mutex_unlock(&data->update_lock);
  1539. return count;
  1540. }
  1541. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  1542. *devattr, char *buf)
  1543. {
  1544. struct f71882fg_data *data = f71882fg_update_device(dev);
  1545. int nr = to_sensor_dev_attr_2(devattr)->index;
  1546. if (data->temp_status & (1 << nr))
  1547. return sprintf(buf, "1\n");
  1548. else
  1549. return sprintf(buf, "0\n");
  1550. }
  1551. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  1552. *devattr, char *buf)
  1553. {
  1554. struct f71882fg_data *data = f71882fg_update_device(dev);
  1555. int nr = to_sensor_dev_attr_2(devattr)->index;
  1556. if (data->temp_diode_open & (1 << nr))
  1557. return sprintf(buf, "1\n");
  1558. else
  1559. return sprintf(buf, "0\n");
  1560. }
  1561. static ssize_t show_pwm(struct device *dev,
  1562. struct device_attribute *devattr, char *buf)
  1563. {
  1564. struct f71882fg_data *data = f71882fg_update_device(dev);
  1565. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1566. mutex_lock(&data->update_lock);
  1567. if (data->pwm_enable & (1 << (2 * nr)))
  1568. /* PWM mode */
  1569. val = data->pwm[nr];
  1570. else {
  1571. /* RPM mode */
  1572. val = 255 * fan_from_reg(data->fan_target[nr])
  1573. / fan_from_reg(data->fan_full_speed[nr]);
  1574. }
  1575. mutex_unlock(&data->update_lock);
  1576. return sprintf(buf, "%d\n", val);
  1577. }
  1578. static ssize_t store_pwm(struct device *dev,
  1579. struct device_attribute *devattr, const char *buf,
  1580. size_t count)
  1581. {
  1582. struct f71882fg_data *data = dev_get_drvdata(dev);
  1583. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1584. long val;
  1585. err = kstrtol(buf, 10, &val);
  1586. if (err)
  1587. return err;
  1588. val = clamp_val(val, 0, 255);
  1589. mutex_lock(&data->update_lock);
  1590. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1591. if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
  1592. (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
  1593. count = -EROFS;
  1594. goto leave;
  1595. }
  1596. if (data->pwm_enable & (1 << (2 * nr))) {
  1597. /* PWM mode */
  1598. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1599. data->pwm[nr] = val;
  1600. } else {
  1601. /* RPM mode */
  1602. int target, full_speed;
  1603. full_speed = f71882fg_read16(data,
  1604. F71882FG_REG_FAN_FULL_SPEED(nr));
  1605. target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
  1606. f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
  1607. data->fan_target[nr] = target;
  1608. data->fan_full_speed[nr] = full_speed;
  1609. }
  1610. leave:
  1611. mutex_unlock(&data->update_lock);
  1612. return count;
  1613. }
  1614. static ssize_t show_simple_pwm(struct device *dev,
  1615. struct device_attribute *devattr, char *buf)
  1616. {
  1617. struct f71882fg_data *data = f71882fg_update_device(dev);
  1618. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1619. val = data->pwm[nr];
  1620. return sprintf(buf, "%d\n", val);
  1621. }
  1622. static ssize_t store_simple_pwm(struct device *dev,
  1623. struct device_attribute *devattr,
  1624. const char *buf, size_t count)
  1625. {
  1626. struct f71882fg_data *data = dev_get_drvdata(dev);
  1627. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1628. long val;
  1629. err = kstrtol(buf, 10, &val);
  1630. if (err)
  1631. return err;
  1632. val = clamp_val(val, 0, 255);
  1633. mutex_lock(&data->update_lock);
  1634. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1635. data->pwm[nr] = val;
  1636. mutex_unlock(&data->update_lock);
  1637. return count;
  1638. }
  1639. static ssize_t show_pwm_enable(struct device *dev,
  1640. struct device_attribute *devattr, char *buf)
  1641. {
  1642. int result = 0;
  1643. struct f71882fg_data *data = f71882fg_update_device(dev);
  1644. int nr = to_sensor_dev_attr_2(devattr)->index;
  1645. switch ((data->pwm_enable >> 2 * nr) & 3) {
  1646. case 0:
  1647. case 1:
  1648. result = 2; /* Normal auto mode */
  1649. break;
  1650. case 2:
  1651. result = 1; /* Manual mode */
  1652. break;
  1653. case 3:
  1654. if (data->type == f8000)
  1655. result = 3; /* Thermostat mode */
  1656. else
  1657. result = 1; /* Manual mode */
  1658. break;
  1659. }
  1660. return sprintf(buf, "%d\n", result);
  1661. }
  1662. static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
  1663. *devattr, const char *buf, size_t count)
  1664. {
  1665. struct f71882fg_data *data = dev_get_drvdata(dev);
  1666. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1667. long val;
  1668. err = kstrtol(buf, 10, &val);
  1669. if (err)
  1670. return err;
  1671. /* Special case for F8000 pwm channel 3 which only does auto mode */
  1672. if (data->type == f8000 && nr == 2 && val != 2)
  1673. return -EINVAL;
  1674. mutex_lock(&data->update_lock);
  1675. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1676. /* Special case for F8000 auto PWM mode / Thermostat mode */
  1677. if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
  1678. switch (val) {
  1679. case 2:
  1680. data->pwm_enable &= ~(2 << (2 * nr));
  1681. break; /* Normal auto mode */
  1682. case 3:
  1683. data->pwm_enable |= 2 << (2 * nr);
  1684. break; /* Thermostat mode */
  1685. default:
  1686. count = -EINVAL;
  1687. goto leave;
  1688. }
  1689. } else {
  1690. switch (val) {
  1691. case 1:
  1692. /* The f71858fg does not support manual RPM mode */
  1693. if (data->type == f71858fg &&
  1694. ((data->pwm_enable >> (2 * nr)) & 1)) {
  1695. count = -EINVAL;
  1696. goto leave;
  1697. }
  1698. data->pwm_enable |= 2 << (2 * nr);
  1699. break; /* Manual */
  1700. case 2:
  1701. data->pwm_enable &= ~(2 << (2 * nr));
  1702. break; /* Normal auto mode */
  1703. default:
  1704. count = -EINVAL;
  1705. goto leave;
  1706. }
  1707. }
  1708. f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
  1709. leave:
  1710. mutex_unlock(&data->update_lock);
  1711. return count;
  1712. }
  1713. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  1714. struct device_attribute *devattr,
  1715. char *buf)
  1716. {
  1717. int result;
  1718. struct f71882fg_data *data = f71882fg_update_device(dev);
  1719. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1720. int point = to_sensor_dev_attr_2(devattr)->nr;
  1721. mutex_lock(&data->update_lock);
  1722. if (data->pwm_enable & (1 << (2 * pwm))) {
  1723. /* PWM mode */
  1724. result = data->pwm_auto_point_pwm[pwm][point];
  1725. } else {
  1726. /* RPM mode */
  1727. result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
  1728. }
  1729. mutex_unlock(&data->update_lock);
  1730. return sprintf(buf, "%d\n", result);
  1731. }
  1732. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  1733. struct device_attribute *devattr,
  1734. const char *buf, size_t count)
  1735. {
  1736. struct f71882fg_data *data = dev_get_drvdata(dev);
  1737. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1738. int point = to_sensor_dev_attr_2(devattr)->nr;
  1739. long val;
  1740. err = kstrtol(buf, 10, &val);
  1741. if (err)
  1742. return err;
  1743. val = clamp_val(val, 0, 255);
  1744. mutex_lock(&data->update_lock);
  1745. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1746. if (data->pwm_enable & (1 << (2 * pwm))) {
  1747. /* PWM mode */
  1748. } else {
  1749. /* RPM mode */
  1750. if (val < 29) /* Prevent negative numbers */
  1751. val = 255;
  1752. else
  1753. val = (255 - val) * 32 / val;
  1754. }
  1755. f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
  1756. data->pwm_auto_point_pwm[pwm][point] = val;
  1757. mutex_unlock(&data->update_lock);
  1758. return count;
  1759. }
  1760. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  1761. struct device_attribute *devattr,
  1762. char *buf)
  1763. {
  1764. int result = 0;
  1765. struct f71882fg_data *data = f71882fg_update_device(dev);
  1766. int nr = to_sensor_dev_attr_2(devattr)->index;
  1767. int point = to_sensor_dev_attr_2(devattr)->nr;
  1768. mutex_lock(&data->update_lock);
  1769. if (nr & 1)
  1770. result = data->pwm_auto_point_hyst[nr / 2] >> 4;
  1771. else
  1772. result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
  1773. result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
  1774. mutex_unlock(&data->update_lock);
  1775. return sprintf(buf, "%d\n", result);
  1776. }
  1777. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  1778. struct device_attribute *devattr,
  1779. const char *buf, size_t count)
  1780. {
  1781. struct f71882fg_data *data = dev_get_drvdata(dev);
  1782. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1783. int point = to_sensor_dev_attr_2(devattr)->nr;
  1784. u8 reg;
  1785. long val;
  1786. err = kstrtol(buf, 10, &val);
  1787. if (err)
  1788. return err;
  1789. val /= 1000;
  1790. mutex_lock(&data->update_lock);
  1791. data->pwm_auto_point_temp[nr][point] =
  1792. f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
  1793. val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15,
  1794. data->pwm_auto_point_temp[nr][point]);
  1795. val = data->pwm_auto_point_temp[nr][point] - val;
  1796. reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
  1797. if (nr & 1)
  1798. reg = (reg & 0x0f) | (val << 4);
  1799. else
  1800. reg = (reg & 0xf0) | val;
  1801. f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
  1802. data->pwm_auto_point_hyst[nr / 2] = reg;
  1803. mutex_unlock(&data->update_lock);
  1804. return count;
  1805. }
  1806. static ssize_t show_pwm_interpolate(struct device *dev,
  1807. struct device_attribute *devattr, char *buf)
  1808. {
  1809. int result;
  1810. struct f71882fg_data *data = f71882fg_update_device(dev);
  1811. int nr = to_sensor_dev_attr_2(devattr)->index;
  1812. result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
  1813. return sprintf(buf, "%d\n", result);
  1814. }
  1815. static ssize_t store_pwm_interpolate(struct device *dev,
  1816. struct device_attribute *devattr,
  1817. const char *buf, size_t count)
  1818. {
  1819. struct f71882fg_data *data = dev_get_drvdata(dev);
  1820. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1821. unsigned long val;
  1822. err = kstrtoul(buf, 10, &val);
  1823. if (err)
  1824. return err;
  1825. mutex_lock(&data->update_lock);
  1826. data->pwm_auto_point_mapping[nr] =
  1827. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1828. if (val)
  1829. val = data->pwm_auto_point_mapping[nr] | (1 << 4);
  1830. else
  1831. val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
  1832. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1833. data->pwm_auto_point_mapping[nr] = val;
  1834. mutex_unlock(&data->update_lock);
  1835. return count;
  1836. }
  1837. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  1838. struct device_attribute *devattr,
  1839. char *buf)
  1840. {
  1841. int result;
  1842. struct f71882fg_data *data = f71882fg_update_device(dev);
  1843. int nr = to_sensor_dev_attr_2(devattr)->index;
  1844. result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
  1845. data->temp_start);
  1846. return sprintf(buf, "%d\n", result);
  1847. }
  1848. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  1849. struct device_attribute *devattr,
  1850. const char *buf, size_t count)
  1851. {
  1852. struct f71882fg_data *data = dev_get_drvdata(dev);
  1853. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1854. long val;
  1855. err = kstrtol(buf, 10, &val);
  1856. if (err)
  1857. return err;
  1858. switch (val) {
  1859. case 1:
  1860. val = 0;
  1861. break;
  1862. case 2:
  1863. val = 1;
  1864. break;
  1865. case 4:
  1866. val = 2;
  1867. break;
  1868. default:
  1869. return -EINVAL;
  1870. }
  1871. val += data->temp_start;
  1872. mutex_lock(&data->update_lock);
  1873. data->pwm_auto_point_mapping[nr] =
  1874. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1875. val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
  1876. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1877. data->pwm_auto_point_mapping[nr] = val;
  1878. mutex_unlock(&data->update_lock);
  1879. return count;
  1880. }
  1881. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  1882. struct device_attribute *devattr,
  1883. char *buf)
  1884. {
  1885. int result;
  1886. struct f71882fg_data *data = f71882fg_update_device(dev);
  1887. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1888. int point = to_sensor_dev_attr_2(devattr)->nr;
  1889. result = data->pwm_auto_point_temp[pwm][point];
  1890. return sprintf(buf, "%d\n", 1000 * result);
  1891. }
  1892. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  1893. struct device_attribute *devattr,
  1894. const char *buf, size_t count)
  1895. {
  1896. struct f71882fg_data *data = dev_get_drvdata(dev);
  1897. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1898. int point = to_sensor_dev_attr_2(devattr)->nr;
  1899. long val;
  1900. err = kstrtol(buf, 10, &val);
  1901. if (err)
  1902. return err;
  1903. val /= 1000;
  1904. if (data->auto_point_temp_signed)
  1905. val = clamp_val(val, -128, 127);
  1906. else
  1907. val = clamp_val(val, 0, 127);
  1908. mutex_lock(&data->update_lock);
  1909. f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
  1910. data->pwm_auto_point_temp[pwm][point] = val;
  1911. mutex_unlock(&data->update_lock);
  1912. return count;
  1913. }
  1914. static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
  1915. char *buf)
  1916. {
  1917. struct f71882fg_data *data = dev_get_drvdata(dev);
  1918. return sprintf(buf, "%s\n", f71882fg_names[data->type]);
  1919. }
  1920. static int f71882fg_create_sysfs_files(struct platform_device *pdev,
  1921. struct sensor_device_attribute_2 *attr, int count)
  1922. {
  1923. int err, i;
  1924. for (i = 0; i < count; i++) {
  1925. err = device_create_file(&pdev->dev, &attr[i].dev_attr);
  1926. if (err)
  1927. return err;
  1928. }
  1929. return 0;
  1930. }
  1931. static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
  1932. struct sensor_device_attribute_2 *attr, int count)
  1933. {
  1934. int i;
  1935. for (i = 0; i < count; i++)
  1936. device_remove_file(&pdev->dev, &attr[i].dev_attr);
  1937. }
  1938. static int f71882fg_create_fan_sysfs_files(
  1939. struct platform_device *pdev, int idx)
  1940. {
  1941. struct f71882fg_data *data = platform_get_drvdata(pdev);
  1942. int err;
  1943. /* Sanity check the pwm setting */
  1944. err = 0;
  1945. switch (data->type) {
  1946. case f71858fg:
  1947. if (((data->pwm_enable >> (idx * 2)) & 3) == 3)
  1948. err = 1;
  1949. break;
  1950. case f71862fg:
  1951. if (((data->pwm_enable >> (idx * 2)) & 1) != 1)
  1952. err = 1;
  1953. break;
  1954. case f8000:
  1955. if (idx == 2)
  1956. err = data->pwm_enable & 0x20;
  1957. break;
  1958. default:
  1959. break;
  1960. }
  1961. if (err) {
  1962. dev_err(&pdev->dev,
  1963. "Invalid (reserved) pwm settings: 0x%02x, "
  1964. "skipping fan %d\n",
  1965. (data->pwm_enable >> (idx * 2)) & 3, idx + 1);
  1966. return 0; /* This is a non fatal condition */
  1967. }
  1968. err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0],
  1969. ARRAY_SIZE(fxxxx_fan_attr[0]));
  1970. if (err)
  1971. return err;
  1972. if (f71882fg_fan_has_beep[data->type]) {
  1973. err = f71882fg_create_sysfs_files(pdev,
  1974. &fxxxx_fan_beep_attr[idx],
  1975. 1);
  1976. if (err)
  1977. return err;
  1978. }
  1979. dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1,
  1980. (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM");
  1981. /* Check for unsupported auto pwm settings */
  1982. switch (data->type) {
  1983. case f71808e:
  1984. case f71808a:
  1985. case f71869:
  1986. case f71869a:
  1987. case f71889fg:
  1988. case f71889ed:
  1989. case f71889a:
  1990. data->pwm_auto_point_mapping[idx] =
  1991. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx));
  1992. if ((data->pwm_auto_point_mapping[idx] & 0x80) ||
  1993. (data->pwm_auto_point_mapping[idx] & 3) == 0) {
  1994. dev_warn(&pdev->dev,
  1995. "Auto pwm controlled by raw digital "
  1996. "data, disabling pwm auto_point "
  1997. "sysfs attributes for fan %d\n", idx + 1);
  1998. return 0; /* This is a non fatal condition */
  1999. }
  2000. break;
  2001. default:
  2002. break;
  2003. }
  2004. switch (data->type) {
  2005. case f71862fg:
  2006. err = f71882fg_create_sysfs_files(pdev,
  2007. &f71862fg_auto_pwm_attr[idx][0],
  2008. ARRAY_SIZE(f71862fg_auto_pwm_attr[0]));
  2009. break;
  2010. case f71808e:
  2011. case f71869:
  2012. err = f71882fg_create_sysfs_files(pdev,
  2013. &f71869_auto_pwm_attr[idx][0],
  2014. ARRAY_SIZE(f71869_auto_pwm_attr[0]));
  2015. break;
  2016. case f8000:
  2017. err = f71882fg_create_sysfs_files(pdev,
  2018. &f8000_auto_pwm_attr[idx][0],
  2019. ARRAY_SIZE(f8000_auto_pwm_attr[0]));
  2020. break;
  2021. default:
  2022. err = f71882fg_create_sysfs_files(pdev,
  2023. &fxxxx_auto_pwm_attr[idx][0],
  2024. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]));
  2025. }
  2026. return err;
  2027. }
  2028. static int f71882fg_probe(struct platform_device *pdev)
  2029. {
  2030. struct f71882fg_data *data;
  2031. struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev);
  2032. int nr_fans = f71882fg_nr_fans[sio_data->type];
  2033. int nr_temps = f71882fg_nr_temps[sio_data->type];
  2034. int err, i;
  2035. u8 start_reg, reg;
  2036. data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data),
  2037. GFP_KERNEL);
  2038. if (!data)
  2039. return -ENOMEM;
  2040. data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
  2041. data->type = sio_data->type;
  2042. data->temp_start =
  2043. (data->type == f71858fg || data->type == f8000) ? 0 : 1;
  2044. mutex_init(&data->update_lock);
  2045. platform_set_drvdata(pdev, data);
  2046. start_reg = f71882fg_read8(data, F71882FG_REG_START);
  2047. if (start_reg & 0x04) {
  2048. dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
  2049. return -ENODEV;
  2050. }
  2051. if (!(start_reg & 0x03)) {
  2052. dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
  2053. return -ENODEV;
  2054. }
  2055. /* Register sysfs interface files */
  2056. err = device_create_file(&pdev->dev, &dev_attr_name);
  2057. if (err)
  2058. goto exit_unregister_sysfs;
  2059. if (start_reg & 0x01) {
  2060. switch (data->type) {
  2061. case f71858fg:
  2062. data->temp_config =
  2063. f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
  2064. if (data->temp_config & 0x10)
  2065. /*
  2066. * The f71858fg temperature alarms behave as
  2067. * the f8000 alarms in this mode
  2068. */
  2069. err = f71882fg_create_sysfs_files(pdev,
  2070. f8000_temp_attr,
  2071. ARRAY_SIZE(f8000_temp_attr));
  2072. else
  2073. err = f71882fg_create_sysfs_files(pdev,
  2074. f71858fg_temp_attr,
  2075. ARRAY_SIZE(f71858fg_temp_attr));
  2076. break;
  2077. case f8000:
  2078. err = f71882fg_create_sysfs_files(pdev,
  2079. f8000_temp_attr,
  2080. ARRAY_SIZE(f8000_temp_attr));
  2081. break;
  2082. default:
  2083. err = f71882fg_create_sysfs_files(pdev,
  2084. &fxxxx_temp_attr[0][0],
  2085. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2086. }
  2087. if (err)
  2088. goto exit_unregister_sysfs;
  2089. if (f71882fg_temp_has_beep[data->type]) {
  2090. err = f71882fg_create_sysfs_files(pdev,
  2091. &fxxxx_temp_beep_attr[0][0],
  2092. ARRAY_SIZE(fxxxx_temp_beep_attr[0])
  2093. * nr_temps);
  2094. if (err)
  2095. goto exit_unregister_sysfs;
  2096. }
  2097. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2098. if (f71882fg_has_in[data->type][i]) {
  2099. err = device_create_file(&pdev->dev,
  2100. &fxxxx_in_attr[i].dev_attr);
  2101. if (err)
  2102. goto exit_unregister_sysfs;
  2103. }
  2104. }
  2105. if (f71882fg_has_in1_alarm[data->type]) {
  2106. err = f71882fg_create_sysfs_files(pdev,
  2107. fxxxx_in1_alarm_attr,
  2108. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2109. if (err)
  2110. goto exit_unregister_sysfs;
  2111. }
  2112. }
  2113. if (start_reg & 0x02) {
  2114. switch (data->type) {
  2115. case f71808e:
  2116. case f71808a:
  2117. case f71869:
  2118. case f71869a:
  2119. /* These always have signed auto point temps */
  2120. data->auto_point_temp_signed = 1;
  2121. /* Fall through to select correct fan/pwm reg bank! */
  2122. case f71889fg:
  2123. case f71889ed:
  2124. case f71889a:
  2125. reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
  2126. if (reg & F71882FG_FAN_NEG_TEMP_EN)
  2127. data->auto_point_temp_signed = 1;
  2128. /* Ensure banked pwm registers point to right bank */
  2129. reg &= ~F71882FG_FAN_PROG_SEL;
  2130. f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
  2131. break;
  2132. default:
  2133. break;
  2134. }
  2135. data->pwm_enable =
  2136. f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  2137. for (i = 0; i < nr_fans; i++) {
  2138. err = f71882fg_create_fan_sysfs_files(pdev, i);
  2139. if (err)
  2140. goto exit_unregister_sysfs;
  2141. }
  2142. /* Some types have 1 extra fan with limited functionality */
  2143. switch (data->type) {
  2144. case f71808a:
  2145. err = f71882fg_create_sysfs_files(pdev,
  2146. f71808a_fan3_attr,
  2147. ARRAY_SIZE(f71808a_fan3_attr));
  2148. break;
  2149. case f8000:
  2150. err = f71882fg_create_sysfs_files(pdev,
  2151. f8000_fan_attr,
  2152. ARRAY_SIZE(f8000_fan_attr));
  2153. break;
  2154. default:
  2155. break;
  2156. }
  2157. if (err)
  2158. goto exit_unregister_sysfs;
  2159. }
  2160. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  2161. if (IS_ERR(data->hwmon_dev)) {
  2162. err = PTR_ERR(data->hwmon_dev);
  2163. data->hwmon_dev = NULL;
  2164. goto exit_unregister_sysfs;
  2165. }
  2166. return 0;
  2167. exit_unregister_sysfs:
  2168. f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
  2169. return err; /* f71882fg_remove() also frees our data */
  2170. }
  2171. static int f71882fg_remove(struct platform_device *pdev)
  2172. {
  2173. struct f71882fg_data *data = platform_get_drvdata(pdev);
  2174. int nr_fans = f71882fg_nr_fans[data->type];
  2175. int nr_temps = f71882fg_nr_temps[data->type];
  2176. int i;
  2177. u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
  2178. if (data->hwmon_dev)
  2179. hwmon_device_unregister(data->hwmon_dev);
  2180. device_remove_file(&pdev->dev, &dev_attr_name);
  2181. if (start_reg & 0x01) {
  2182. switch (data->type) {
  2183. case f71858fg:
  2184. if (data->temp_config & 0x10)
  2185. f71882fg_remove_sysfs_files(pdev,
  2186. f8000_temp_attr,
  2187. ARRAY_SIZE(f8000_temp_attr));
  2188. else
  2189. f71882fg_remove_sysfs_files(pdev,
  2190. f71858fg_temp_attr,
  2191. ARRAY_SIZE(f71858fg_temp_attr));
  2192. break;
  2193. case f8000:
  2194. f71882fg_remove_sysfs_files(pdev,
  2195. f8000_temp_attr,
  2196. ARRAY_SIZE(f8000_temp_attr));
  2197. break;
  2198. default:
  2199. f71882fg_remove_sysfs_files(pdev,
  2200. &fxxxx_temp_attr[0][0],
  2201. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2202. }
  2203. if (f71882fg_temp_has_beep[data->type]) {
  2204. f71882fg_remove_sysfs_files(pdev,
  2205. &fxxxx_temp_beep_attr[0][0],
  2206. ARRAY_SIZE(fxxxx_temp_beep_attr[0]) * nr_temps);
  2207. }
  2208. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2209. if (f71882fg_has_in[data->type][i]) {
  2210. device_remove_file(&pdev->dev,
  2211. &fxxxx_in_attr[i].dev_attr);
  2212. }
  2213. }
  2214. if (f71882fg_has_in1_alarm[data->type]) {
  2215. f71882fg_remove_sysfs_files(pdev,
  2216. fxxxx_in1_alarm_attr,
  2217. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2218. }
  2219. }
  2220. if (start_reg & 0x02) {
  2221. f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
  2222. ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
  2223. if (f71882fg_fan_has_beep[data->type]) {
  2224. f71882fg_remove_sysfs_files(pdev,
  2225. fxxxx_fan_beep_attr, nr_fans);
  2226. }
  2227. switch (data->type) {
  2228. case f71808a:
  2229. f71882fg_remove_sysfs_files(pdev,
  2230. &fxxxx_auto_pwm_attr[0][0],
  2231. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2232. f71882fg_remove_sysfs_files(pdev,
  2233. f71808a_fan3_attr,
  2234. ARRAY_SIZE(f71808a_fan3_attr));
  2235. break;
  2236. case f71862fg:
  2237. f71882fg_remove_sysfs_files(pdev,
  2238. &f71862fg_auto_pwm_attr[0][0],
  2239. ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) *
  2240. nr_fans);
  2241. break;
  2242. case f71808e:
  2243. case f71869:
  2244. f71882fg_remove_sysfs_files(pdev,
  2245. &f71869_auto_pwm_attr[0][0],
  2246. ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans);
  2247. break;
  2248. case f8000:
  2249. f71882fg_remove_sysfs_files(pdev,
  2250. f8000_fan_attr,
  2251. ARRAY_SIZE(f8000_fan_attr));
  2252. f71882fg_remove_sysfs_files(pdev,
  2253. &f8000_auto_pwm_attr[0][0],
  2254. ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans);
  2255. break;
  2256. default:
  2257. f71882fg_remove_sysfs_files(pdev,
  2258. &fxxxx_auto_pwm_attr[0][0],
  2259. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2260. }
  2261. }
  2262. return 0;
  2263. }
  2264. static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data)
  2265. {
  2266. u16 devid;
  2267. unsigned short address;
  2268. int err = superio_enter(sioaddr);
  2269. if (err)
  2270. return err;
  2271. devid = superio_inw(sioaddr, SIO_REG_MANID);
  2272. if (devid != SIO_FINTEK_ID) {
  2273. pr_debug("Not a Fintek device\n");
  2274. err = -ENODEV;
  2275. goto exit;
  2276. }
  2277. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  2278. switch (devid) {
  2279. case SIO_F71808E_ID:
  2280. sio_data->type = f71808e;
  2281. break;
  2282. case SIO_F71808A_ID:
  2283. sio_data->type = f71808a;
  2284. break;
  2285. case SIO_F71858_ID:
  2286. sio_data->type = f71858fg;
  2287. break;
  2288. case SIO_F71862_ID:
  2289. sio_data->type = f71862fg;
  2290. break;
  2291. case SIO_F71869_ID:
  2292. sio_data->type = f71869;
  2293. break;
  2294. case SIO_F71869A_ID:
  2295. sio_data->type = f71869a;
  2296. break;
  2297. case SIO_F71882_ID:
  2298. sio_data->type = f71882fg;
  2299. break;
  2300. case SIO_F71889_ID:
  2301. sio_data->type = f71889fg;
  2302. break;
  2303. case SIO_F71889E_ID:
  2304. sio_data->type = f71889ed;
  2305. break;
  2306. case SIO_F71889A_ID:
  2307. sio_data->type = f71889a;
  2308. break;
  2309. case SIO_F8000_ID:
  2310. sio_data->type = f8000;
  2311. break;
  2312. case SIO_F81865_ID:
  2313. sio_data->type = f81865f;
  2314. break;
  2315. default:
  2316. pr_info("Unsupported Fintek device: %04x\n",
  2317. (unsigned int)devid);
  2318. err = -ENODEV;
  2319. goto exit;
  2320. }
  2321. if (sio_data->type == f71858fg)
  2322. superio_select(sioaddr, SIO_F71858FG_LD_HWM);
  2323. else
  2324. superio_select(sioaddr, SIO_F71882FG_LD_HWM);
  2325. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  2326. pr_warn("Device not activated\n");
  2327. err = -ENODEV;
  2328. goto exit;
  2329. }
  2330. address = superio_inw(sioaddr, SIO_REG_ADDR);
  2331. if (address == 0) {
  2332. pr_warn("Base address not set\n");
  2333. err = -ENODEV;
  2334. goto exit;
  2335. }
  2336. address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
  2337. err = address;
  2338. pr_info("Found %s chip at %#x, revision %d\n",
  2339. f71882fg_names[sio_data->type], (unsigned int)address,
  2340. (int)superio_inb(sioaddr, SIO_REG_DEVREV));
  2341. exit:
  2342. superio_exit(sioaddr);
  2343. return err;
  2344. }
  2345. static int __init f71882fg_device_add(int address,
  2346. const struct f71882fg_sio_data *sio_data)
  2347. {
  2348. struct resource res = {
  2349. .start = address,
  2350. .end = address + REGION_LENGTH - 1,
  2351. .flags = IORESOURCE_IO,
  2352. };
  2353. int err;
  2354. f71882fg_pdev = platform_device_alloc(DRVNAME, address);
  2355. if (!f71882fg_pdev)
  2356. return -ENOMEM;
  2357. res.name = f71882fg_pdev->name;
  2358. err = acpi_check_resource_conflict(&res);
  2359. if (err)
  2360. goto exit_device_put;
  2361. err = platform_device_add_resources(f71882fg_pdev, &res, 1);
  2362. if (err) {
  2363. pr_err("Device resource addition failed\n");
  2364. goto exit_device_put;
  2365. }
  2366. err = platform_device_add_data(f71882fg_pdev, sio_data,
  2367. sizeof(struct f71882fg_sio_data));
  2368. if (err) {
  2369. pr_err("Platform data allocation failed\n");
  2370. goto exit_device_put;
  2371. }
  2372. err = platform_device_add(f71882fg_pdev);
  2373. if (err) {
  2374. pr_err("Device addition failed\n");
  2375. goto exit_device_put;
  2376. }
  2377. return 0;
  2378. exit_device_put:
  2379. platform_device_put(f71882fg_pdev);
  2380. return err;
  2381. }
  2382. static int __init f71882fg_init(void)
  2383. {
  2384. int err;
  2385. int address;
  2386. struct f71882fg_sio_data sio_data;
  2387. memset(&sio_data, 0, sizeof(sio_data));
  2388. address = f71882fg_find(0x2e, &sio_data);
  2389. if (address < 0)
  2390. address = f71882fg_find(0x4e, &sio_data);
  2391. if (address < 0)
  2392. return address;
  2393. err = platform_driver_register(&f71882fg_driver);
  2394. if (err)
  2395. return err;
  2396. err = f71882fg_device_add(address, &sio_data);
  2397. if (err)
  2398. goto exit_driver;
  2399. return 0;
  2400. exit_driver:
  2401. platform_driver_unregister(&f71882fg_driver);
  2402. return err;
  2403. }
  2404. static void __exit f71882fg_exit(void)
  2405. {
  2406. platform_device_unregister(f71882fg_pdev);
  2407. platform_driver_unregister(&f71882fg_driver);
  2408. }
  2409. MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
  2410. MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>");
  2411. MODULE_LICENSE("GPL");
  2412. module_init(f71882fg_init);
  2413. module_exit(f71882fg_exit);