gpio-pcf857x.c 12 KB

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  1. /*
  2. * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
  3. *
  4. * Copyright (C) 2007 David Brownell
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/gpio.h>
  21. #include <linux/i2c.h>
  22. #include <linux/i2c/pcf857x.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/irqdomain.h>
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/of.h>
  29. #include <linux/of_device.h>
  30. #include <linux/slab.h>
  31. #include <linux/spinlock.h>
  32. static const struct i2c_device_id pcf857x_id[] = {
  33. { "pcf8574", 8 },
  34. { "pcf8574a", 8 },
  35. { "pca8574", 8 },
  36. { "pca9670", 8 },
  37. { "pca9672", 8 },
  38. { "pca9674", 8 },
  39. { "pcf8575", 16 },
  40. { "pca8575", 16 },
  41. { "pca9671", 16 },
  42. { "pca9673", 16 },
  43. { "pca9675", 16 },
  44. { "max7328", 8 },
  45. { "max7329", 8 },
  46. { "tca9554", 8 },
  47. { }
  48. };
  49. MODULE_DEVICE_TABLE(i2c, pcf857x_id);
  50. #ifdef CONFIG_OF
  51. static const struct of_device_id pcf857x_of_table[] = {
  52. { .compatible = "nxp,pcf8574" },
  53. { .compatible = "nxp,pcf8574a" },
  54. { .compatible = "nxp,pca8574" },
  55. { .compatible = "nxp,pca9670" },
  56. { .compatible = "nxp,pca9672" },
  57. { .compatible = "nxp,pca9674" },
  58. { .compatible = "nxp,pcf8575" },
  59. { .compatible = "nxp,pca8575" },
  60. { .compatible = "nxp,pca9671" },
  61. { .compatible = "nxp,pca9673" },
  62. { .compatible = "nxp,pca9675" },
  63. { .compatible = "maxim,max7328" },
  64. { .compatible = "maxim,max7329" },
  65. { .compatible = "ti,tca9554" },
  66. { }
  67. };
  68. MODULE_DEVICE_TABLE(of, pcf857x_of_table);
  69. #endif
  70. /*
  71. * The pcf857x, pca857x, and pca967x chips only expose one read and one
  72. * write register. Writing a "one" bit (to match the reset state) lets
  73. * that pin be used as an input; it's not an open-drain model, but acts
  74. * a bit like one. This is described as "quasi-bidirectional"; read the
  75. * chip documentation for details.
  76. *
  77. * Many other I2C GPIO expander chips (like the pca953x models) have
  78. * more complex register models and more conventional circuitry using
  79. * push/pull drivers. They often use the same 0x20..0x27 addresses as
  80. * pcf857x parts, making the "legacy" I2C driver model problematic.
  81. */
  82. struct pcf857x {
  83. struct gpio_chip chip;
  84. struct i2c_client *client;
  85. struct mutex lock; /* protect 'out' */
  86. spinlock_t slock; /* protect irq demux */
  87. unsigned out; /* software latch */
  88. unsigned status; /* current status */
  89. unsigned int irq_parent;
  90. unsigned irq_enabled; /* enabled irqs */
  91. int (*write)(struct i2c_client *client, unsigned data);
  92. int (*read)(struct i2c_client *client);
  93. };
  94. /*-------------------------------------------------------------------------*/
  95. /* Talk to 8-bit I/O expander */
  96. static int i2c_write_le8(struct i2c_client *client, unsigned data)
  97. {
  98. return i2c_smbus_write_byte(client, data);
  99. }
  100. static int i2c_read_le8(struct i2c_client *client)
  101. {
  102. return (int)i2c_smbus_read_byte(client);
  103. }
  104. /* Talk to 16-bit I/O expander */
  105. static int i2c_write_le16(struct i2c_client *client, unsigned word)
  106. {
  107. u8 buf[2] = { word & 0xff, word >> 8, };
  108. int status;
  109. status = i2c_master_send(client, buf, 2);
  110. return (status < 0) ? status : 0;
  111. }
  112. static int i2c_read_le16(struct i2c_client *client)
  113. {
  114. u8 buf[2];
  115. int status;
  116. status = i2c_master_recv(client, buf, 2);
  117. if (status < 0)
  118. return status;
  119. return (buf[1] << 8) | buf[0];
  120. }
  121. /*-------------------------------------------------------------------------*/
  122. static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
  123. {
  124. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  125. int status;
  126. mutex_lock(&gpio->lock);
  127. gpio->out |= (1 << offset);
  128. status = gpio->write(gpio->client, gpio->out);
  129. mutex_unlock(&gpio->lock);
  130. return status;
  131. }
  132. static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
  133. {
  134. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  135. int value;
  136. value = gpio->read(gpio->client);
  137. return (value < 0) ? 0 : (value & (1 << offset));
  138. }
  139. static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
  140. {
  141. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  142. unsigned bit = 1 << offset;
  143. int status;
  144. mutex_lock(&gpio->lock);
  145. if (value)
  146. gpio->out |= bit;
  147. else
  148. gpio->out &= ~bit;
  149. status = gpio->write(gpio->client, gpio->out);
  150. mutex_unlock(&gpio->lock);
  151. return status;
  152. }
  153. static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
  154. {
  155. pcf857x_output(chip, offset, value);
  156. }
  157. /*-------------------------------------------------------------------------*/
  158. static irqreturn_t pcf857x_irq(int irq, void *data)
  159. {
  160. struct pcf857x *gpio = data;
  161. unsigned long change, i, status, flags;
  162. status = gpio->read(gpio->client);
  163. spin_lock_irqsave(&gpio->slock, flags);
  164. /*
  165. * call the interrupt handler iff gpio is used as
  166. * interrupt source, just to avoid bad irqs
  167. */
  168. change = (gpio->status ^ status) & gpio->irq_enabled;
  169. for_each_set_bit(i, &change, gpio->chip.ngpio)
  170. handle_nested_irq(irq_find_mapping(gpio->chip.irqdomain, i));
  171. gpio->status = status;
  172. spin_unlock_irqrestore(&gpio->slock, flags);
  173. return IRQ_HANDLED;
  174. }
  175. /*
  176. * NOP functions
  177. */
  178. static void noop(struct irq_data *data) { }
  179. static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
  180. {
  181. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  182. int error = 0;
  183. if (gpio->irq_parent) {
  184. error = irq_set_irq_wake(gpio->irq_parent, on);
  185. if (error) {
  186. dev_dbg(&gpio->client->dev,
  187. "irq %u doesn't support irq_set_wake\n",
  188. gpio->irq_parent);
  189. gpio->irq_parent = 0;
  190. }
  191. }
  192. return error;
  193. }
  194. static void pcf857x_irq_enable(struct irq_data *data)
  195. {
  196. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  197. gpio->irq_enabled |= (1 << data->hwirq);
  198. }
  199. static void pcf857x_irq_disable(struct irq_data *data)
  200. {
  201. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  202. gpio->irq_enabled &= ~(1 << data->hwirq);
  203. }
  204. static void pcf857x_irq_bus_lock(struct irq_data *data)
  205. {
  206. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  207. mutex_lock(&gpio->lock);
  208. }
  209. static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
  210. {
  211. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  212. mutex_unlock(&gpio->lock);
  213. }
  214. static struct irq_chip pcf857x_irq_chip = {
  215. .name = "pcf857x",
  216. .irq_enable = pcf857x_irq_enable,
  217. .irq_disable = pcf857x_irq_disable,
  218. .irq_ack = noop,
  219. .irq_mask = noop,
  220. .irq_unmask = noop,
  221. .irq_set_wake = pcf857x_irq_set_wake,
  222. .irq_bus_lock = pcf857x_irq_bus_lock,
  223. .irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock,
  224. };
  225. /*-------------------------------------------------------------------------*/
  226. static int pcf857x_probe(struct i2c_client *client,
  227. const struct i2c_device_id *id)
  228. {
  229. struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
  230. struct device_node *np = client->dev.of_node;
  231. struct pcf857x *gpio;
  232. unsigned int n_latch = 0;
  233. int status;
  234. if (IS_ENABLED(CONFIG_OF) && np)
  235. of_property_read_u32(np, "lines-initial-states", &n_latch);
  236. else if (pdata)
  237. n_latch = pdata->n_latch;
  238. else
  239. dev_dbg(&client->dev, "no platform data\n");
  240. /* Allocate, initialize, and register this gpio_chip. */
  241. gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
  242. if (!gpio)
  243. return -ENOMEM;
  244. mutex_init(&gpio->lock);
  245. spin_lock_init(&gpio->slock);
  246. gpio->chip.base = pdata ? pdata->gpio_base : -1;
  247. gpio->chip.can_sleep = true;
  248. gpio->chip.dev = &client->dev;
  249. gpio->chip.owner = THIS_MODULE;
  250. gpio->chip.get = pcf857x_get;
  251. gpio->chip.set = pcf857x_set;
  252. gpio->chip.direction_input = pcf857x_input;
  253. gpio->chip.direction_output = pcf857x_output;
  254. gpio->chip.ngpio = id->driver_data;
  255. /* NOTE: the OnSemi jlc1562b is also largely compatible with
  256. * these parts, notably for output. It has a low-resolution
  257. * DAC instead of pin change IRQs; and its inputs can be the
  258. * result of comparators.
  259. */
  260. /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
  261. * 9670, 9672, 9764, and 9764a use quite a variety.
  262. *
  263. * NOTE: we don't distinguish here between *4 and *4a parts.
  264. */
  265. if (gpio->chip.ngpio == 8) {
  266. gpio->write = i2c_write_le8;
  267. gpio->read = i2c_read_le8;
  268. if (!i2c_check_functionality(client->adapter,
  269. I2C_FUNC_SMBUS_BYTE))
  270. status = -EIO;
  271. /* fail if there's no chip present */
  272. else
  273. status = i2c_smbus_read_byte(client);
  274. /* '75/'75c addresses are 0x20..0x27, just like the '74;
  275. * the '75c doesn't have a current source pulling high.
  276. * 9671, 9673, and 9765 use quite a variety of addresses.
  277. *
  278. * NOTE: we don't distinguish here between '75 and '75c parts.
  279. */
  280. } else if (gpio->chip.ngpio == 16) {
  281. gpio->write = i2c_write_le16;
  282. gpio->read = i2c_read_le16;
  283. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  284. status = -EIO;
  285. /* fail if there's no chip present */
  286. else
  287. status = i2c_read_le16(client);
  288. } else {
  289. dev_dbg(&client->dev, "unsupported number of gpios\n");
  290. status = -EINVAL;
  291. }
  292. if (status < 0)
  293. goto fail;
  294. gpio->chip.label = client->name;
  295. gpio->client = client;
  296. i2c_set_clientdata(client, gpio);
  297. /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
  298. * We can't actually know whether a pin is configured (a) as output
  299. * and driving the signal low, or (b) as input and reporting a low
  300. * value ... without knowing the last value written since the chip
  301. * came out of reset (if any). We can't read the latched output.
  302. *
  303. * In short, the only reliable solution for setting up pin direction
  304. * is to do it explicitly. The setup() method can do that, but it
  305. * may cause transient glitching since it can't know the last value
  306. * written (some pins may need to be driven low).
  307. *
  308. * Using n_latch avoids that trouble. When left initialized to zero,
  309. * our software copy of the "latch" then matches the chip's all-ones
  310. * reset state. Otherwise it flags pins to be driven low.
  311. */
  312. gpio->out = ~n_latch;
  313. gpio->status = gpio->out;
  314. status = gpiochip_add(&gpio->chip);
  315. if (status < 0)
  316. goto fail;
  317. /* Enable irqchip if we have an interrupt */
  318. if (client->irq) {
  319. status = gpiochip_irqchip_add(&gpio->chip, &pcf857x_irq_chip,
  320. 0, handle_level_irq,
  321. IRQ_TYPE_NONE);
  322. if (status) {
  323. dev_err(&client->dev, "cannot add irqchip\n");
  324. goto fail_irq;
  325. }
  326. status = devm_request_threaded_irq(&client->dev, client->irq,
  327. NULL, pcf857x_irq, IRQF_ONESHOT |
  328. IRQF_TRIGGER_FALLING | IRQF_SHARED,
  329. dev_name(&client->dev), gpio);
  330. if (status)
  331. goto fail_irq;
  332. gpiochip_set_chained_irqchip(&gpio->chip, &pcf857x_irq_chip,
  333. client->irq, NULL);
  334. gpio->irq_parent = client->irq;
  335. }
  336. /* Let platform code set up the GPIOs and their users.
  337. * Now is the first time anyone could use them.
  338. */
  339. if (pdata && pdata->setup) {
  340. status = pdata->setup(client,
  341. gpio->chip.base, gpio->chip.ngpio,
  342. pdata->context);
  343. if (status < 0)
  344. dev_warn(&client->dev, "setup --> %d\n", status);
  345. }
  346. dev_info(&client->dev, "probed\n");
  347. return 0;
  348. fail_irq:
  349. gpiochip_remove(&gpio->chip);
  350. fail:
  351. dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
  352. client->name);
  353. return status;
  354. }
  355. static int pcf857x_remove(struct i2c_client *client)
  356. {
  357. struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
  358. struct pcf857x *gpio = i2c_get_clientdata(client);
  359. int status = 0;
  360. if (pdata && pdata->teardown) {
  361. status = pdata->teardown(client,
  362. gpio->chip.base, gpio->chip.ngpio,
  363. pdata->context);
  364. if (status < 0) {
  365. dev_err(&client->dev, "%s --> %d\n",
  366. "teardown", status);
  367. return status;
  368. }
  369. }
  370. gpiochip_remove(&gpio->chip);
  371. return status;
  372. }
  373. static struct i2c_driver pcf857x_driver = {
  374. .driver = {
  375. .name = "pcf857x",
  376. .owner = THIS_MODULE,
  377. .of_match_table = of_match_ptr(pcf857x_of_table),
  378. },
  379. .probe = pcf857x_probe,
  380. .remove = pcf857x_remove,
  381. .id_table = pcf857x_id,
  382. };
  383. static int __init pcf857x_init(void)
  384. {
  385. return i2c_add_driver(&pcf857x_driver);
  386. }
  387. /* register after i2c postcore initcall and before
  388. * subsys initcalls that may rely on these GPIOs
  389. */
  390. subsys_initcall(pcf857x_init);
  391. static void __exit pcf857x_exit(void)
  392. {
  393. i2c_del_driver(&pcf857x_driver);
  394. }
  395. module_exit(pcf857x_exit);
  396. MODULE_LICENSE("GPL");
  397. MODULE_AUTHOR("David Brownell");