tpm_i2c_nuvoton.c 18 KB

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  1. /******************************************************************************
  2. * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501,
  3. * based on the TCG TPM Interface Spec version 1.2.
  4. * Specifications at www.trustedcomputinggroup.org
  5. *
  6. * Copyright (C) 2011, Nuvoton Technology Corporation.
  7. * Dan Morav <dan.morav@nuvoton.com>
  8. * Copyright (C) 2013, Obsidian Research Corp.
  9. * Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
  10. *
  11. * This program is free software: you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation, either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program. If not, see http://www.gnu.org/licenses/>.
  23. *
  24. * Nuvoton contact information: APC.Support@nuvoton.com
  25. *****************************************************************************/
  26. #include <linux/init.h>
  27. #include <linux/module.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/slab.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/wait.h>
  32. #include <linux/i2c.h>
  33. #include "tpm.h"
  34. /* I2C interface offsets */
  35. #define TPM_STS 0x00
  36. #define TPM_BURST_COUNT 0x01
  37. #define TPM_DATA_FIFO_W 0x20
  38. #define TPM_DATA_FIFO_R 0x40
  39. #define TPM_VID_DID_RID 0x60
  40. /* TPM command header size */
  41. #define TPM_HEADER_SIZE 10
  42. #define TPM_RETRY 5
  43. /*
  44. * I2C bus device maximum buffer size w/o counting I2C address or command
  45. * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
  46. */
  47. #define TPM_I2C_MAX_BUF_SIZE 32
  48. #define TPM_I2C_RETRY_COUNT 32
  49. #define TPM_I2C_BUS_DELAY 1 /* msec */
  50. #define TPM_I2C_RETRY_DELAY_SHORT 2 /* msec */
  51. #define TPM_I2C_RETRY_DELAY_LONG 10 /* msec */
  52. #define I2C_DRIVER_NAME "tpm_i2c_nuvoton"
  53. struct priv_data {
  54. unsigned int intrs;
  55. };
  56. static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size,
  57. u8 *data)
  58. {
  59. s32 status;
  60. status = i2c_smbus_read_i2c_block_data(client, offset, size, data);
  61. dev_dbg(&client->dev,
  62. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  63. offset, size, (int)size, data, status);
  64. return status;
  65. }
  66. static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size,
  67. u8 *data)
  68. {
  69. s32 status;
  70. status = i2c_smbus_write_i2c_block_data(client, offset, size, data);
  71. dev_dbg(&client->dev,
  72. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  73. offset, size, (int)size, data, status);
  74. return status;
  75. }
  76. #define TPM_STS_VALID 0x80
  77. #define TPM_STS_COMMAND_READY 0x40
  78. #define TPM_STS_GO 0x20
  79. #define TPM_STS_DATA_AVAIL 0x10
  80. #define TPM_STS_EXPECT 0x08
  81. #define TPM_STS_RESPONSE_RETRY 0x02
  82. #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
  83. #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
  84. #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
  85. /* read TPM_STS register */
  86. static u8 i2c_nuvoton_read_status(struct tpm_chip *chip)
  87. {
  88. struct i2c_client *client = to_i2c_client(chip->pdev);
  89. s32 status;
  90. u8 data;
  91. status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data);
  92. if (status <= 0) {
  93. dev_err(chip->pdev, "%s() error return %d\n", __func__,
  94. status);
  95. data = TPM_STS_ERR_VAL;
  96. }
  97. return data;
  98. }
  99. /* write byte to TPM_STS register */
  100. static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data)
  101. {
  102. s32 status;
  103. int i;
  104. /* this causes the current command to be aborted */
  105. for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) {
  106. status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data);
  107. msleep(TPM_I2C_BUS_DELAY);
  108. }
  109. return status;
  110. }
  111. /* write commandReady to TPM_STS register */
  112. static void i2c_nuvoton_ready(struct tpm_chip *chip)
  113. {
  114. struct i2c_client *client = to_i2c_client(chip->pdev);
  115. s32 status;
  116. /* this causes the current command to be aborted */
  117. status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY);
  118. if (status < 0)
  119. dev_err(chip->pdev,
  120. "%s() fail to write TPM_STS.commandReady\n", __func__);
  121. }
  122. /* read burstCount field from TPM_STS register
  123. * return -1 on fail to read */
  124. static int i2c_nuvoton_get_burstcount(struct i2c_client *client,
  125. struct tpm_chip *chip)
  126. {
  127. unsigned long stop = jiffies + chip->vendor.timeout_d;
  128. s32 status;
  129. int burst_count = -1;
  130. u8 data;
  131. /* wait for burstcount to be non-zero */
  132. do {
  133. /* in I2C burstCount is 1 byte */
  134. status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1,
  135. &data);
  136. if (status > 0 && data > 0) {
  137. burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data);
  138. break;
  139. }
  140. msleep(TPM_I2C_BUS_DELAY);
  141. } while (time_before(jiffies, stop));
  142. return burst_count;
  143. }
  144. /*
  145. * WPCT301/NPCT501 SINT# supports only dataAvail
  146. * any call to this function which is not waiting for dataAvail will
  147. * set queue to NULL to avoid waiting for interrupt
  148. */
  149. static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value)
  150. {
  151. u8 status = i2c_nuvoton_read_status(chip);
  152. return (status != TPM_STS_ERR_VAL) && ((status & mask) == value);
  153. }
  154. static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value,
  155. u32 timeout, wait_queue_head_t *queue)
  156. {
  157. if (chip->vendor.irq && queue) {
  158. s32 rc;
  159. struct priv_data *priv = chip->vendor.priv;
  160. unsigned int cur_intrs = priv->intrs;
  161. enable_irq(chip->vendor.irq);
  162. rc = wait_event_interruptible_timeout(*queue,
  163. cur_intrs != priv->intrs,
  164. timeout);
  165. if (rc > 0)
  166. return 0;
  167. /* At this point we know that the SINT pin is asserted, so we
  168. * do not need to do i2c_nuvoton_check_status */
  169. } else {
  170. unsigned long ten_msec, stop;
  171. bool status_valid;
  172. /* check current status */
  173. status_valid = i2c_nuvoton_check_status(chip, mask, value);
  174. if (status_valid)
  175. return 0;
  176. /* use polling to wait for the event */
  177. ten_msec = jiffies + msecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG);
  178. stop = jiffies + timeout;
  179. do {
  180. if (time_before(jiffies, ten_msec))
  181. msleep(TPM_I2C_RETRY_DELAY_SHORT);
  182. else
  183. msleep(TPM_I2C_RETRY_DELAY_LONG);
  184. status_valid = i2c_nuvoton_check_status(chip, mask,
  185. value);
  186. if (status_valid)
  187. return 0;
  188. } while (time_before(jiffies, stop));
  189. }
  190. dev_err(chip->pdev, "%s(%02x, %02x) -> timeout\n", __func__, mask,
  191. value);
  192. return -ETIMEDOUT;
  193. }
  194. /* wait for dataAvail field to be set in the TPM_STS register */
  195. static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout,
  196. wait_queue_head_t *queue)
  197. {
  198. return i2c_nuvoton_wait_for_stat(chip,
  199. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  200. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  201. timeout, queue);
  202. }
  203. /* Read @count bytes into @buf from TPM_RD_FIFO register */
  204. static int i2c_nuvoton_recv_data(struct i2c_client *client,
  205. struct tpm_chip *chip, u8 *buf, size_t count)
  206. {
  207. s32 rc;
  208. int burst_count, bytes2read, size = 0;
  209. while (size < count &&
  210. i2c_nuvoton_wait_for_data_avail(chip,
  211. chip->vendor.timeout_c,
  212. &chip->vendor.read_queue) == 0) {
  213. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  214. if (burst_count < 0) {
  215. dev_err(chip->pdev,
  216. "%s() fail to read burstCount=%d\n", __func__,
  217. burst_count);
  218. return -EIO;
  219. }
  220. bytes2read = min_t(size_t, burst_count, count - size);
  221. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R,
  222. bytes2read, &buf[size]);
  223. if (rc < 0) {
  224. dev_err(chip->pdev,
  225. "%s() fail on i2c_nuvoton_read_buf()=%d\n",
  226. __func__, rc);
  227. return -EIO;
  228. }
  229. dev_dbg(chip->pdev, "%s(%d):", __func__, bytes2read);
  230. size += bytes2read;
  231. }
  232. return size;
  233. }
  234. /* Read TPM command results */
  235. static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  236. {
  237. struct device *dev = chip->pdev;
  238. struct i2c_client *client = to_i2c_client(dev);
  239. s32 rc;
  240. int expected, status, burst_count, retries, size = 0;
  241. if (count < TPM_HEADER_SIZE) {
  242. i2c_nuvoton_ready(chip); /* return to idle */
  243. dev_err(dev, "%s() count < header size\n", __func__);
  244. return -EIO;
  245. }
  246. for (retries = 0; retries < TPM_RETRY; retries++) {
  247. if (retries > 0) {
  248. /* if this is not the first trial, set responseRetry */
  249. i2c_nuvoton_write_status(client,
  250. TPM_STS_RESPONSE_RETRY);
  251. }
  252. /*
  253. * read first available (> 10 bytes), including:
  254. * tag, paramsize, and result
  255. */
  256. status = i2c_nuvoton_wait_for_data_avail(
  257. chip, chip->vendor.timeout_c, &chip->vendor.read_queue);
  258. if (status != 0) {
  259. dev_err(dev, "%s() timeout on dataAvail\n", __func__);
  260. size = -ETIMEDOUT;
  261. continue;
  262. }
  263. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  264. if (burst_count < 0) {
  265. dev_err(dev, "%s() fail to get burstCount\n", __func__);
  266. size = -EIO;
  267. continue;
  268. }
  269. size = i2c_nuvoton_recv_data(client, chip, buf,
  270. burst_count);
  271. if (size < TPM_HEADER_SIZE) {
  272. dev_err(dev, "%s() fail to read header\n", __func__);
  273. size = -EIO;
  274. continue;
  275. }
  276. /*
  277. * convert number of expected bytes field from big endian 32 bit
  278. * to machine native
  279. */
  280. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  281. if (expected > count) {
  282. dev_err(dev, "%s() expected > count\n", __func__);
  283. size = -EIO;
  284. continue;
  285. }
  286. rc = i2c_nuvoton_recv_data(client, chip, &buf[size],
  287. expected - size);
  288. size += rc;
  289. if (rc < 0 || size < expected) {
  290. dev_err(dev, "%s() fail to read remainder of result\n",
  291. __func__);
  292. size = -EIO;
  293. continue;
  294. }
  295. if (i2c_nuvoton_wait_for_stat(
  296. chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
  297. TPM_STS_VALID, chip->vendor.timeout_c,
  298. NULL)) {
  299. dev_err(dev, "%s() error left over data\n", __func__);
  300. size = -ETIMEDOUT;
  301. continue;
  302. }
  303. break;
  304. }
  305. i2c_nuvoton_ready(chip);
  306. dev_dbg(chip->pdev, "%s() -> %d\n", __func__, size);
  307. return size;
  308. }
  309. /*
  310. * Send TPM command.
  311. *
  312. * If interrupts are used (signaled by an irq set in the vendor structure)
  313. * tpm.c can skip polling for the data to be available as the interrupt is
  314. * waited for here
  315. */
  316. static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len)
  317. {
  318. struct device *dev = chip->pdev;
  319. struct i2c_client *client = to_i2c_client(dev);
  320. u32 ordinal;
  321. size_t count = 0;
  322. int burst_count, bytes2write, retries, rc = -EIO;
  323. for (retries = 0; retries < TPM_RETRY; retries++) {
  324. i2c_nuvoton_ready(chip);
  325. if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY,
  326. TPM_STS_COMMAND_READY,
  327. chip->vendor.timeout_b, NULL)) {
  328. dev_err(dev, "%s() timeout on commandReady\n",
  329. __func__);
  330. rc = -EIO;
  331. continue;
  332. }
  333. rc = 0;
  334. while (count < len - 1) {
  335. burst_count = i2c_nuvoton_get_burstcount(client,
  336. chip);
  337. if (burst_count < 0) {
  338. dev_err(dev, "%s() fail get burstCount\n",
  339. __func__);
  340. rc = -EIO;
  341. break;
  342. }
  343. bytes2write = min_t(size_t, burst_count,
  344. len - 1 - count);
  345. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W,
  346. bytes2write, &buf[count]);
  347. if (rc < 0) {
  348. dev_err(dev, "%s() fail i2cWriteBuf\n",
  349. __func__);
  350. break;
  351. }
  352. dev_dbg(dev, "%s(%d):", __func__, bytes2write);
  353. count += bytes2write;
  354. rc = i2c_nuvoton_wait_for_stat(chip,
  355. TPM_STS_VALID |
  356. TPM_STS_EXPECT,
  357. TPM_STS_VALID |
  358. TPM_STS_EXPECT,
  359. chip->vendor.timeout_c,
  360. NULL);
  361. if (rc < 0) {
  362. dev_err(dev, "%s() timeout on Expect\n",
  363. __func__);
  364. rc = -ETIMEDOUT;
  365. break;
  366. }
  367. }
  368. if (rc < 0)
  369. continue;
  370. /* write last byte */
  371. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1,
  372. &buf[count]);
  373. if (rc < 0) {
  374. dev_err(dev, "%s() fail to write last byte\n",
  375. __func__);
  376. rc = -EIO;
  377. continue;
  378. }
  379. dev_dbg(dev, "%s(last): %02x", __func__, buf[count]);
  380. rc = i2c_nuvoton_wait_for_stat(chip,
  381. TPM_STS_VALID | TPM_STS_EXPECT,
  382. TPM_STS_VALID,
  383. chip->vendor.timeout_c, NULL);
  384. if (rc) {
  385. dev_err(dev, "%s() timeout on Expect to clear\n",
  386. __func__);
  387. rc = -ETIMEDOUT;
  388. continue;
  389. }
  390. break;
  391. }
  392. if (rc < 0) {
  393. /* retries == TPM_RETRY */
  394. i2c_nuvoton_ready(chip);
  395. return rc;
  396. }
  397. /* execute the TPM command */
  398. rc = i2c_nuvoton_write_status(client, TPM_STS_GO);
  399. if (rc < 0) {
  400. dev_err(dev, "%s() fail to write Go\n", __func__);
  401. i2c_nuvoton_ready(chip);
  402. return rc;
  403. }
  404. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  405. rc = i2c_nuvoton_wait_for_data_avail(chip,
  406. tpm_calc_ordinal_duration(chip,
  407. ordinal),
  408. &chip->vendor.read_queue);
  409. if (rc) {
  410. dev_err(dev, "%s() timeout command duration\n", __func__);
  411. i2c_nuvoton_ready(chip);
  412. return rc;
  413. }
  414. dev_dbg(dev, "%s() -> %zd\n", __func__, len);
  415. return len;
  416. }
  417. static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status)
  418. {
  419. return (status == TPM_STS_COMMAND_READY);
  420. }
  421. static const struct tpm_class_ops tpm_i2c = {
  422. .status = i2c_nuvoton_read_status,
  423. .recv = i2c_nuvoton_recv,
  424. .send = i2c_nuvoton_send,
  425. .cancel = i2c_nuvoton_ready,
  426. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  427. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  428. .req_canceled = i2c_nuvoton_req_canceled,
  429. };
  430. /* The only purpose for the handler is to signal to any waiting threads that
  431. * the interrupt is currently being asserted. The driver does not do any
  432. * processing triggered by interrupts, and the chip provides no way to mask at
  433. * the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
  434. * this means it cannot be shared. */
  435. static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id)
  436. {
  437. struct tpm_chip *chip = dev_id;
  438. struct priv_data *priv = chip->vendor.priv;
  439. priv->intrs++;
  440. wake_up(&chip->vendor.read_queue);
  441. disable_irq_nosync(chip->vendor.irq);
  442. return IRQ_HANDLED;
  443. }
  444. static int get_vid(struct i2c_client *client, u32 *res)
  445. {
  446. static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe };
  447. u32 temp;
  448. s32 rc;
  449. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  450. return -ENODEV;
  451. rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp);
  452. if (rc < 0)
  453. return rc;
  454. /* check WPCT301 values - ignore RID */
  455. if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) {
  456. /*
  457. * f/w rev 2.81 has an issue where the VID_DID_RID is not
  458. * reporting the right value. so give it another chance at
  459. * offset 0x20 (FIFO_W).
  460. */
  461. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4,
  462. (u8 *) (&temp));
  463. if (rc < 0)
  464. return rc;
  465. /* check WPCT301 values - ignore RID */
  466. if (memcmp(&temp, vid_did_rid_value,
  467. sizeof(vid_did_rid_value)))
  468. return -ENODEV;
  469. }
  470. *res = temp;
  471. return 0;
  472. }
  473. static int i2c_nuvoton_probe(struct i2c_client *client,
  474. const struct i2c_device_id *id)
  475. {
  476. int rc;
  477. struct tpm_chip *chip;
  478. struct device *dev = &client->dev;
  479. u32 vid = 0;
  480. rc = get_vid(client, &vid);
  481. if (rc)
  482. return rc;
  483. dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid,
  484. (u8) (vid >> 16), (u8) (vid >> 24));
  485. chip = tpmm_chip_alloc(dev, &tpm_i2c);
  486. if (IS_ERR(chip))
  487. return PTR_ERR(chip);
  488. chip->vendor.priv = devm_kzalloc(dev, sizeof(struct priv_data),
  489. GFP_KERNEL);
  490. if (!chip->vendor.priv)
  491. return -ENOMEM;
  492. init_waitqueue_head(&chip->vendor.read_queue);
  493. init_waitqueue_head(&chip->vendor.int_queue);
  494. /* Default timeouts */
  495. chip->vendor.timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  496. chip->vendor.timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT);
  497. chip->vendor.timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  498. chip->vendor.timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  499. /*
  500. * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
  501. * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
  502. * The IRQ should be set in the i2c_board_info (which is done
  503. * automatically in of_i2c_register_devices, for device tree users */
  504. chip->vendor.irq = client->irq;
  505. if (chip->vendor.irq) {
  506. dev_dbg(dev, "%s() chip-vendor.irq\n", __func__);
  507. rc = devm_request_irq(dev, chip->vendor.irq,
  508. i2c_nuvoton_int_handler,
  509. IRQF_TRIGGER_LOW,
  510. chip->devname,
  511. chip);
  512. if (rc) {
  513. dev_err(dev, "%s() Unable to request irq: %d for use\n",
  514. __func__, chip->vendor.irq);
  515. chip->vendor.irq = 0;
  516. } else {
  517. /* Clear any pending interrupt */
  518. i2c_nuvoton_ready(chip);
  519. /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
  520. rc = i2c_nuvoton_wait_for_stat(chip,
  521. TPM_STS_COMMAND_READY,
  522. TPM_STS_COMMAND_READY,
  523. chip->vendor.timeout_b,
  524. NULL);
  525. if (rc == 0) {
  526. /*
  527. * TIS is in ready state
  528. * write dummy byte to enter reception state
  529. * TPM_DATA_FIFO_W <- rc (0)
  530. */
  531. rc = i2c_nuvoton_write_buf(client,
  532. TPM_DATA_FIFO_W,
  533. 1, (u8 *) (&rc));
  534. if (rc < 0)
  535. return rc;
  536. /* TPM_STS <- 0x40 (commandReady) */
  537. i2c_nuvoton_ready(chip);
  538. } else {
  539. /*
  540. * timeout_b reached - command was
  541. * aborted. TIS should now be in idle state -
  542. * only TPM_STS_VALID should be set
  543. */
  544. if (i2c_nuvoton_read_status(chip) !=
  545. TPM_STS_VALID)
  546. return -EIO;
  547. }
  548. }
  549. }
  550. if (tpm_get_timeouts(chip))
  551. return -ENODEV;
  552. if (tpm_do_selftest(chip))
  553. return -ENODEV;
  554. return tpm_chip_register(chip);
  555. }
  556. static int i2c_nuvoton_remove(struct i2c_client *client)
  557. {
  558. struct device *dev = &(client->dev);
  559. struct tpm_chip *chip = dev_get_drvdata(dev);
  560. tpm_chip_unregister(chip);
  561. return 0;
  562. }
  563. static const struct i2c_device_id i2c_nuvoton_id[] = {
  564. {I2C_DRIVER_NAME, 0},
  565. {}
  566. };
  567. MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id);
  568. #ifdef CONFIG_OF
  569. static const struct of_device_id i2c_nuvoton_of_match[] = {
  570. {.compatible = "nuvoton,npct501"},
  571. {.compatible = "winbond,wpct301"},
  572. {},
  573. };
  574. MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match);
  575. #endif
  576. static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume);
  577. static struct i2c_driver i2c_nuvoton_driver = {
  578. .id_table = i2c_nuvoton_id,
  579. .probe = i2c_nuvoton_probe,
  580. .remove = i2c_nuvoton_remove,
  581. .driver = {
  582. .name = I2C_DRIVER_NAME,
  583. .owner = THIS_MODULE,
  584. .pm = &i2c_nuvoton_pm_ops,
  585. .of_match_table = of_match_ptr(i2c_nuvoton_of_match),
  586. },
  587. };
  588. module_i2c_driver(i2c_nuvoton_driver);
  589. MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)");
  590. MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
  591. MODULE_LICENSE("GPL");