umem.c 30 KB

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  1. /*
  2. * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
  3. *
  4. * (C) 2001 San Mehat <nettwerk@valinux.com>
  5. * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
  6. * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
  7. *
  8. * This driver for the Micro Memory PCI Memory Module with Battery Backup
  9. * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
  10. *
  11. * This driver is released to the public under the terms of the
  12. * GNU GENERAL PUBLIC LICENSE version 2
  13. * See the file COPYING for details.
  14. *
  15. * This driver provides a standard block device interface for Micro Memory(tm)
  16. * PCI based RAM boards.
  17. * 10/05/01: Phap Nguyen - Rebuilt the driver
  18. * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
  19. * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
  20. * - use stand disk partitioning (so fdisk works).
  21. * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
  22. * - incorporate into main kernel
  23. * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
  24. * - use spin_lock_bh instead of _irq
  25. * - Never block on make_request. queue
  26. * bh's instead.
  27. * - unregister umem from devfs at mod unload
  28. * - Change version to 2.3
  29. * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
  30. * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
  31. * 15May2002:NeilBrown - convert to bio for 2.5
  32. * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
  33. * - a sequence of writes that cover the card, and
  34. * - set initialised bit then.
  35. */
  36. #undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
  37. #include <linux/fs.h>
  38. #include <linux/bio.h>
  39. #include <linux/kernel.h>
  40. #include <linux/mm.h>
  41. #include <linux/mman.h>
  42. #include <linux/gfp.h>
  43. #include <linux/ioctl.h>
  44. #include <linux/module.h>
  45. #include <linux/init.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/timer.h>
  48. #include <linux/pci.h>
  49. #include <linux/dma-mapping.h>
  50. #include <linux/fcntl.h> /* O_ACCMODE */
  51. #include <linux/hdreg.h> /* HDIO_GETGEO */
  52. #include "umem.h"
  53. #include <asm/uaccess.h>
  54. #include <asm/io.h>
  55. #define MM_MAXCARDS 4
  56. #define MM_RAHEAD 2 /* two sectors */
  57. #define MM_BLKSIZE 1024 /* 1k blocks */
  58. #define MM_HARDSECT 512 /* 512-byte hardware sectors */
  59. #define MM_SHIFT 6 /* max 64 partitions on 4 cards */
  60. /*
  61. * Version Information
  62. */
  63. #define DRIVER_NAME "umem"
  64. #define DRIVER_VERSION "v2.3"
  65. #define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
  66. #define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
  67. static int debug;
  68. /* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
  69. #define HW_TRACE(x)
  70. #define DEBUG_LED_ON_TRANSFER 0x01
  71. #define DEBUG_BATTERY_POLLING 0x02
  72. module_param(debug, int, 0644);
  73. MODULE_PARM_DESC(debug, "Debug bitmask");
  74. static int pci_read_cmd = 0x0C; /* Read Multiple */
  75. module_param(pci_read_cmd, int, 0);
  76. MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
  77. static int pci_write_cmd = 0x0F; /* Write and Invalidate */
  78. module_param(pci_write_cmd, int, 0);
  79. MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
  80. static int pci_cmds;
  81. static int major_nr;
  82. #include <linux/blkdev.h>
  83. #include <linux/blkpg.h>
  84. struct cardinfo {
  85. struct pci_dev *dev;
  86. unsigned char __iomem *csr_remap;
  87. unsigned int mm_size; /* size in kbytes */
  88. unsigned int init_size; /* initial segment, in sectors,
  89. * that we know to
  90. * have been written
  91. */
  92. struct bio *bio, *currentbio, **biotail;
  93. struct bvec_iter current_iter;
  94. struct request_queue *queue;
  95. struct mm_page {
  96. dma_addr_t page_dma;
  97. struct mm_dma_desc *desc;
  98. int cnt, headcnt;
  99. struct bio *bio, **biotail;
  100. struct bvec_iter iter;
  101. } mm_pages[2];
  102. #define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
  103. int Active, Ready;
  104. struct tasklet_struct tasklet;
  105. unsigned int dma_status;
  106. struct {
  107. int good;
  108. int warned;
  109. unsigned long last_change;
  110. } battery[2];
  111. spinlock_t lock;
  112. int check_batteries;
  113. int flags;
  114. };
  115. static struct cardinfo cards[MM_MAXCARDS];
  116. static struct timer_list battery_timer;
  117. static int num_cards;
  118. static struct gendisk *mm_gendisk[MM_MAXCARDS];
  119. static void check_batteries(struct cardinfo *card);
  120. static int get_userbit(struct cardinfo *card, int bit)
  121. {
  122. unsigned char led;
  123. led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
  124. return led & bit;
  125. }
  126. static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
  127. {
  128. unsigned char led;
  129. led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
  130. if (state)
  131. led |= bit;
  132. else
  133. led &= ~bit;
  134. writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
  135. return 0;
  136. }
  137. /*
  138. * NOTE: For the power LED, use the LED_POWER_* macros since they differ
  139. */
  140. static void set_led(struct cardinfo *card, int shift, unsigned char state)
  141. {
  142. unsigned char led;
  143. led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
  144. if (state == LED_FLIP)
  145. led ^= (1<<shift);
  146. else {
  147. led &= ~(0x03 << shift);
  148. led |= (state << shift);
  149. }
  150. writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
  151. }
  152. #ifdef MM_DIAG
  153. static void dump_regs(struct cardinfo *card)
  154. {
  155. unsigned char *p;
  156. int i, i1;
  157. p = card->csr_remap;
  158. for (i = 0; i < 8; i++) {
  159. printk(KERN_DEBUG "%p ", p);
  160. for (i1 = 0; i1 < 16; i1++)
  161. printk("%02x ", *p++);
  162. printk("\n");
  163. }
  164. }
  165. #endif
  166. static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
  167. {
  168. dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
  169. if (dmastat & DMASCR_ANY_ERR)
  170. printk(KERN_CONT "ANY_ERR ");
  171. if (dmastat & DMASCR_MBE_ERR)
  172. printk(KERN_CONT "MBE_ERR ");
  173. if (dmastat & DMASCR_PARITY_ERR_REP)
  174. printk(KERN_CONT "PARITY_ERR_REP ");
  175. if (dmastat & DMASCR_PARITY_ERR_DET)
  176. printk(KERN_CONT "PARITY_ERR_DET ");
  177. if (dmastat & DMASCR_SYSTEM_ERR_SIG)
  178. printk(KERN_CONT "SYSTEM_ERR_SIG ");
  179. if (dmastat & DMASCR_TARGET_ABT)
  180. printk(KERN_CONT "TARGET_ABT ");
  181. if (dmastat & DMASCR_MASTER_ABT)
  182. printk(KERN_CONT "MASTER_ABT ");
  183. if (dmastat & DMASCR_CHAIN_COMPLETE)
  184. printk(KERN_CONT "CHAIN_COMPLETE ");
  185. if (dmastat & DMASCR_DMA_COMPLETE)
  186. printk(KERN_CONT "DMA_COMPLETE ");
  187. printk("\n");
  188. }
  189. /*
  190. * Theory of request handling
  191. *
  192. * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
  193. * We have two pages of mm_dma_desc, holding about 64 descriptors
  194. * each. These are allocated at init time.
  195. * One page is "Ready" and is either full, or can have request added.
  196. * The other page might be "Active", which DMA is happening on it.
  197. *
  198. * Whenever IO on the active page completes, the Ready page is activated
  199. * and the ex-Active page is clean out and made Ready.
  200. * Otherwise the Ready page is only activated when it becomes full.
  201. *
  202. * If a request arrives while both pages a full, it is queued, and b_rdev is
  203. * overloaded to record whether it was a read or a write.
  204. *
  205. * The interrupt handler only polls the device to clear the interrupt.
  206. * The processing of the result is done in a tasklet.
  207. */
  208. static void mm_start_io(struct cardinfo *card)
  209. {
  210. /* we have the lock, we know there is
  211. * no IO active, and we know that card->Active
  212. * is set
  213. */
  214. struct mm_dma_desc *desc;
  215. struct mm_page *page;
  216. int offset;
  217. /* make the last descriptor end the chain */
  218. page = &card->mm_pages[card->Active];
  219. pr_debug("start_io: %d %d->%d\n",
  220. card->Active, page->headcnt, page->cnt - 1);
  221. desc = &page->desc[page->cnt-1];
  222. desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
  223. desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
  224. desc->sem_control_bits = desc->control_bits;
  225. if (debug & DEBUG_LED_ON_TRANSFER)
  226. set_led(card, LED_REMOVE, LED_ON);
  227. desc = &page->desc[page->headcnt];
  228. writel(0, card->csr_remap + DMA_PCI_ADDR);
  229. writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
  230. writel(0, card->csr_remap + DMA_LOCAL_ADDR);
  231. writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
  232. writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
  233. writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
  234. writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
  235. writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
  236. offset = ((char *)desc) - ((char *)page->desc);
  237. writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
  238. card->csr_remap + DMA_DESCRIPTOR_ADDR);
  239. /* Force the value to u64 before shifting otherwise >> 32 is undefined C
  240. * and on some ports will do nothing ! */
  241. writel(cpu_to_le32(((u64)page->page_dma)>>32),
  242. card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
  243. /* Go, go, go */
  244. writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
  245. card->csr_remap + DMA_STATUS_CTRL);
  246. }
  247. static int add_bio(struct cardinfo *card);
  248. static void activate(struct cardinfo *card)
  249. {
  250. /* if No page is Active, and Ready is
  251. * not empty, then switch Ready page
  252. * to active and start IO.
  253. * Then add any bh's that are available to Ready
  254. */
  255. do {
  256. while (add_bio(card))
  257. ;
  258. if (card->Active == -1 &&
  259. card->mm_pages[card->Ready].cnt > 0) {
  260. card->Active = card->Ready;
  261. card->Ready = 1-card->Ready;
  262. mm_start_io(card);
  263. }
  264. } while (card->Active == -1 && add_bio(card));
  265. }
  266. static inline void reset_page(struct mm_page *page)
  267. {
  268. page->cnt = 0;
  269. page->headcnt = 0;
  270. page->bio = NULL;
  271. page->biotail = &page->bio;
  272. }
  273. /*
  274. * If there is room on Ready page, take
  275. * one bh off list and add it.
  276. * return 1 if there was room, else 0.
  277. */
  278. static int add_bio(struct cardinfo *card)
  279. {
  280. struct mm_page *p;
  281. struct mm_dma_desc *desc;
  282. dma_addr_t dma_handle;
  283. int offset;
  284. struct bio *bio;
  285. struct bio_vec vec;
  286. int rw;
  287. bio = card->currentbio;
  288. if (!bio && card->bio) {
  289. card->currentbio = card->bio;
  290. card->current_iter = card->bio->bi_iter;
  291. card->bio = card->bio->bi_next;
  292. if (card->bio == NULL)
  293. card->biotail = &card->bio;
  294. card->currentbio->bi_next = NULL;
  295. return 1;
  296. }
  297. if (!bio)
  298. return 0;
  299. rw = bio_rw(bio);
  300. if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
  301. return 0;
  302. vec = bio_iter_iovec(bio, card->current_iter);
  303. dma_handle = pci_map_page(card->dev,
  304. vec.bv_page,
  305. vec.bv_offset,
  306. vec.bv_len,
  307. (rw == READ) ?
  308. PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
  309. p = &card->mm_pages[card->Ready];
  310. desc = &p->desc[p->cnt];
  311. p->cnt++;
  312. if (p->bio == NULL)
  313. p->iter = card->current_iter;
  314. if ((p->biotail) != &bio->bi_next) {
  315. *(p->biotail) = bio;
  316. p->biotail = &(bio->bi_next);
  317. bio->bi_next = NULL;
  318. }
  319. desc->data_dma_handle = dma_handle;
  320. desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
  321. desc->local_addr = cpu_to_le64(card->current_iter.bi_sector << 9);
  322. desc->transfer_size = cpu_to_le32(vec.bv_len);
  323. offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
  324. desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
  325. desc->zero1 = desc->zero2 = 0;
  326. offset = (((char *)(desc+1)) - ((char *)p->desc));
  327. desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
  328. desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
  329. DMASCR_PARITY_INT_EN|
  330. DMASCR_CHAIN_EN |
  331. DMASCR_SEM_EN |
  332. pci_cmds);
  333. if (rw == WRITE)
  334. desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
  335. desc->sem_control_bits = desc->control_bits;
  336. bio_advance_iter(bio, &card->current_iter, vec.bv_len);
  337. if (!card->current_iter.bi_size)
  338. card->currentbio = NULL;
  339. return 1;
  340. }
  341. static void process_page(unsigned long data)
  342. {
  343. /* check if any of the requests in the page are DMA_COMPLETE,
  344. * and deal with them appropriately.
  345. * If we find a descriptor without DMA_COMPLETE in the semaphore, then
  346. * dma must have hit an error on that descriptor, so use dma_status
  347. * instead and assume that all following descriptors must be re-tried.
  348. */
  349. struct mm_page *page;
  350. struct bio *return_bio = NULL;
  351. struct cardinfo *card = (struct cardinfo *)data;
  352. unsigned int dma_status = card->dma_status;
  353. spin_lock_bh(&card->lock);
  354. if (card->Active < 0)
  355. goto out_unlock;
  356. page = &card->mm_pages[card->Active];
  357. while (page->headcnt < page->cnt) {
  358. struct bio *bio = page->bio;
  359. struct mm_dma_desc *desc = &page->desc[page->headcnt];
  360. int control = le32_to_cpu(desc->sem_control_bits);
  361. int last = 0;
  362. struct bio_vec vec;
  363. if (!(control & DMASCR_DMA_COMPLETE)) {
  364. control = dma_status;
  365. last = 1;
  366. }
  367. page->headcnt++;
  368. vec = bio_iter_iovec(bio, page->iter);
  369. bio_advance_iter(bio, &page->iter, vec.bv_len);
  370. if (!page->iter.bi_size) {
  371. page->bio = bio->bi_next;
  372. if (page->bio)
  373. page->iter = page->bio->bi_iter;
  374. }
  375. pci_unmap_page(card->dev, desc->data_dma_handle,
  376. vec.bv_len,
  377. (control & DMASCR_TRANSFER_READ) ?
  378. PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
  379. if (control & DMASCR_HARD_ERROR) {
  380. /* error */
  381. clear_bit(BIO_UPTODATE, &bio->bi_flags);
  382. dev_printk(KERN_WARNING, &card->dev->dev,
  383. "I/O error on sector %d/%d\n",
  384. le32_to_cpu(desc->local_addr)>>9,
  385. le32_to_cpu(desc->transfer_size));
  386. dump_dmastat(card, control);
  387. } else if ((bio->bi_rw & REQ_WRITE) &&
  388. le32_to_cpu(desc->local_addr) >> 9 ==
  389. card->init_size) {
  390. card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
  391. if (card->init_size >> 1 >= card->mm_size) {
  392. dev_printk(KERN_INFO, &card->dev->dev,
  393. "memory now initialised\n");
  394. set_userbit(card, MEMORY_INITIALIZED, 1);
  395. }
  396. }
  397. if (bio != page->bio) {
  398. bio->bi_next = return_bio;
  399. return_bio = bio;
  400. }
  401. if (last)
  402. break;
  403. }
  404. if (debug & DEBUG_LED_ON_TRANSFER)
  405. set_led(card, LED_REMOVE, LED_OFF);
  406. if (card->check_batteries) {
  407. card->check_batteries = 0;
  408. check_batteries(card);
  409. }
  410. if (page->headcnt >= page->cnt) {
  411. reset_page(page);
  412. card->Active = -1;
  413. activate(card);
  414. } else {
  415. /* haven't finished with this one yet */
  416. pr_debug("do some more\n");
  417. mm_start_io(card);
  418. }
  419. out_unlock:
  420. spin_unlock_bh(&card->lock);
  421. while (return_bio) {
  422. struct bio *bio = return_bio;
  423. return_bio = bio->bi_next;
  424. bio->bi_next = NULL;
  425. bio_endio(bio, 0);
  426. }
  427. }
  428. static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule)
  429. {
  430. struct cardinfo *card = cb->data;
  431. spin_lock_irq(&card->lock);
  432. activate(card);
  433. spin_unlock_irq(&card->lock);
  434. kfree(cb);
  435. }
  436. static int mm_check_plugged(struct cardinfo *card)
  437. {
  438. return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb));
  439. }
  440. static void mm_make_request(struct request_queue *q, struct bio *bio)
  441. {
  442. struct cardinfo *card = q->queuedata;
  443. pr_debug("mm_make_request %llu %u\n",
  444. (unsigned long long)bio->bi_iter.bi_sector,
  445. bio->bi_iter.bi_size);
  446. spin_lock_irq(&card->lock);
  447. *card->biotail = bio;
  448. bio->bi_next = NULL;
  449. card->biotail = &bio->bi_next;
  450. if (bio->bi_rw & REQ_SYNC || !mm_check_plugged(card))
  451. activate(card);
  452. spin_unlock_irq(&card->lock);
  453. return;
  454. }
  455. static irqreturn_t mm_interrupt(int irq, void *__card)
  456. {
  457. struct cardinfo *card = (struct cardinfo *) __card;
  458. unsigned int dma_status;
  459. unsigned short cfg_status;
  460. HW_TRACE(0x30);
  461. dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
  462. if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
  463. /* interrupt wasn't for me ... */
  464. return IRQ_NONE;
  465. }
  466. /* clear COMPLETION interrupts */
  467. if (card->flags & UM_FLAG_NO_BYTE_STATUS)
  468. writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
  469. card->csr_remap + DMA_STATUS_CTRL);
  470. else
  471. writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
  472. card->csr_remap + DMA_STATUS_CTRL + 2);
  473. /* log errors and clear interrupt status */
  474. if (dma_status & DMASCR_ANY_ERR) {
  475. unsigned int data_log1, data_log2;
  476. unsigned int addr_log1, addr_log2;
  477. unsigned char stat, count, syndrome, check;
  478. stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
  479. data_log1 = le32_to_cpu(readl(card->csr_remap +
  480. ERROR_DATA_LOG));
  481. data_log2 = le32_to_cpu(readl(card->csr_remap +
  482. ERROR_DATA_LOG + 4));
  483. addr_log1 = le32_to_cpu(readl(card->csr_remap +
  484. ERROR_ADDR_LOG));
  485. addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
  486. count = readb(card->csr_remap + ERROR_COUNT);
  487. syndrome = readb(card->csr_remap + ERROR_SYNDROME);
  488. check = readb(card->csr_remap + ERROR_CHECK);
  489. dump_dmastat(card, dma_status);
  490. if (stat & 0x01)
  491. dev_printk(KERN_ERR, &card->dev->dev,
  492. "Memory access error detected (err count %d)\n",
  493. count);
  494. if (stat & 0x02)
  495. dev_printk(KERN_ERR, &card->dev->dev,
  496. "Multi-bit EDC error\n");
  497. dev_printk(KERN_ERR, &card->dev->dev,
  498. "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
  499. addr_log2, addr_log1, data_log2, data_log1);
  500. dev_printk(KERN_ERR, &card->dev->dev,
  501. "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
  502. check, syndrome);
  503. writeb(0, card->csr_remap + ERROR_COUNT);
  504. }
  505. if (dma_status & DMASCR_PARITY_ERR_REP) {
  506. dev_printk(KERN_ERR, &card->dev->dev,
  507. "PARITY ERROR REPORTED\n");
  508. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  509. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  510. }
  511. if (dma_status & DMASCR_PARITY_ERR_DET) {
  512. dev_printk(KERN_ERR, &card->dev->dev,
  513. "PARITY ERROR DETECTED\n");
  514. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  515. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  516. }
  517. if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
  518. dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
  519. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  520. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  521. }
  522. if (dma_status & DMASCR_TARGET_ABT) {
  523. dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
  524. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  525. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  526. }
  527. if (dma_status & DMASCR_MASTER_ABT) {
  528. dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
  529. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  530. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  531. }
  532. /* and process the DMA descriptors */
  533. card->dma_status = dma_status;
  534. tasklet_schedule(&card->tasklet);
  535. HW_TRACE(0x36);
  536. return IRQ_HANDLED;
  537. }
  538. /*
  539. * If both batteries are good, no LED
  540. * If either battery has been warned, solid LED
  541. * If both batteries are bad, flash the LED quickly
  542. * If either battery is bad, flash the LED semi quickly
  543. */
  544. static void set_fault_to_battery_status(struct cardinfo *card)
  545. {
  546. if (card->battery[0].good && card->battery[1].good)
  547. set_led(card, LED_FAULT, LED_OFF);
  548. else if (card->battery[0].warned || card->battery[1].warned)
  549. set_led(card, LED_FAULT, LED_ON);
  550. else if (!card->battery[0].good && !card->battery[1].good)
  551. set_led(card, LED_FAULT, LED_FLASH_7_0);
  552. else
  553. set_led(card, LED_FAULT, LED_FLASH_3_5);
  554. }
  555. static void init_battery_timer(void);
  556. static int check_battery(struct cardinfo *card, int battery, int status)
  557. {
  558. if (status != card->battery[battery].good) {
  559. card->battery[battery].good = !card->battery[battery].good;
  560. card->battery[battery].last_change = jiffies;
  561. if (card->battery[battery].good) {
  562. dev_printk(KERN_ERR, &card->dev->dev,
  563. "Battery %d now good\n", battery + 1);
  564. card->battery[battery].warned = 0;
  565. } else
  566. dev_printk(KERN_ERR, &card->dev->dev,
  567. "Battery %d now FAILED\n", battery + 1);
  568. return 1;
  569. } else if (!card->battery[battery].good &&
  570. !card->battery[battery].warned &&
  571. time_after_eq(jiffies, card->battery[battery].last_change +
  572. (HZ * 60 * 60 * 5))) {
  573. dev_printk(KERN_ERR, &card->dev->dev,
  574. "Battery %d still FAILED after 5 hours\n", battery + 1);
  575. card->battery[battery].warned = 1;
  576. return 1;
  577. }
  578. return 0;
  579. }
  580. static void check_batteries(struct cardinfo *card)
  581. {
  582. /* NOTE: this must *never* be called while the card
  583. * is doing (bus-to-card) DMA, or you will need the
  584. * reset switch
  585. */
  586. unsigned char status;
  587. int ret1, ret2;
  588. status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
  589. if (debug & DEBUG_BATTERY_POLLING)
  590. dev_printk(KERN_DEBUG, &card->dev->dev,
  591. "checking battery status, 1 = %s, 2 = %s\n",
  592. (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
  593. (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
  594. ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
  595. ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
  596. if (ret1 || ret2)
  597. set_fault_to_battery_status(card);
  598. }
  599. static void check_all_batteries(unsigned long ptr)
  600. {
  601. int i;
  602. for (i = 0; i < num_cards; i++)
  603. if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
  604. struct cardinfo *card = &cards[i];
  605. spin_lock_bh(&card->lock);
  606. if (card->Active >= 0)
  607. card->check_batteries = 1;
  608. else
  609. check_batteries(card);
  610. spin_unlock_bh(&card->lock);
  611. }
  612. init_battery_timer();
  613. }
  614. static void init_battery_timer(void)
  615. {
  616. init_timer(&battery_timer);
  617. battery_timer.function = check_all_batteries;
  618. battery_timer.expires = jiffies + (HZ * 60);
  619. add_timer(&battery_timer);
  620. }
  621. static void del_battery_timer(void)
  622. {
  623. del_timer(&battery_timer);
  624. }
  625. /*
  626. * Note no locks taken out here. In a worst case scenario, we could drop
  627. * a chunk of system memory. But that should never happen, since validation
  628. * happens at open or mount time, when locks are held.
  629. *
  630. * That's crap, since doing that while some partitions are opened
  631. * or mounted will give you really nasty results.
  632. */
  633. static int mm_revalidate(struct gendisk *disk)
  634. {
  635. struct cardinfo *card = disk->private_data;
  636. set_capacity(disk, card->mm_size << 1);
  637. return 0;
  638. }
  639. static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  640. {
  641. struct cardinfo *card = bdev->bd_disk->private_data;
  642. int size = card->mm_size * (1024 / MM_HARDSECT);
  643. /*
  644. * get geometry: we have to fake one... trim the size to a
  645. * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
  646. * whatever cylinders.
  647. */
  648. geo->heads = 64;
  649. geo->sectors = 32;
  650. geo->cylinders = size / (geo->heads * geo->sectors);
  651. return 0;
  652. }
  653. static const struct block_device_operations mm_fops = {
  654. .owner = THIS_MODULE,
  655. .getgeo = mm_getgeo,
  656. .revalidate_disk = mm_revalidate,
  657. };
  658. static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
  659. {
  660. int ret = -ENODEV;
  661. struct cardinfo *card = &cards[num_cards];
  662. unsigned char mem_present;
  663. unsigned char batt_status;
  664. unsigned int saved_bar, data;
  665. unsigned long csr_base;
  666. unsigned long csr_len;
  667. int magic_number;
  668. static int printed_version;
  669. if (!printed_version++)
  670. printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
  671. ret = pci_enable_device(dev);
  672. if (ret)
  673. return ret;
  674. pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
  675. pci_set_master(dev);
  676. card->dev = dev;
  677. csr_base = pci_resource_start(dev, 0);
  678. csr_len = pci_resource_len(dev, 0);
  679. if (!csr_base || !csr_len)
  680. return -ENODEV;
  681. dev_printk(KERN_INFO, &dev->dev,
  682. "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
  683. if (pci_set_dma_mask(dev, DMA_BIT_MASK(64)) &&
  684. pci_set_dma_mask(dev, DMA_BIT_MASK(32))) {
  685. dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
  686. return -ENOMEM;
  687. }
  688. ret = pci_request_regions(dev, DRIVER_NAME);
  689. if (ret) {
  690. dev_printk(KERN_ERR, &card->dev->dev,
  691. "Unable to request memory region\n");
  692. goto failed_req_csr;
  693. }
  694. card->csr_remap = ioremap_nocache(csr_base, csr_len);
  695. if (!card->csr_remap) {
  696. dev_printk(KERN_ERR, &card->dev->dev,
  697. "Unable to remap memory region\n");
  698. ret = -ENOMEM;
  699. goto failed_remap_csr;
  700. }
  701. dev_printk(KERN_INFO, &card->dev->dev,
  702. "CSR 0x%08lx -> 0x%p (0x%lx)\n",
  703. csr_base, card->csr_remap, csr_len);
  704. switch (card->dev->device) {
  705. case 0x5415:
  706. card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
  707. magic_number = 0x59;
  708. break;
  709. case 0x5425:
  710. card->flags |= UM_FLAG_NO_BYTE_STATUS;
  711. magic_number = 0x5C;
  712. break;
  713. case 0x6155:
  714. card->flags |= UM_FLAG_NO_BYTE_STATUS |
  715. UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
  716. magic_number = 0x99;
  717. break;
  718. default:
  719. magic_number = 0x100;
  720. break;
  721. }
  722. if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
  723. dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
  724. ret = -ENOMEM;
  725. goto failed_magic;
  726. }
  727. card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
  728. PAGE_SIZE * 2,
  729. &card->mm_pages[0].page_dma);
  730. card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
  731. PAGE_SIZE * 2,
  732. &card->mm_pages[1].page_dma);
  733. if (card->mm_pages[0].desc == NULL ||
  734. card->mm_pages[1].desc == NULL) {
  735. dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
  736. goto failed_alloc;
  737. }
  738. reset_page(&card->mm_pages[0]);
  739. reset_page(&card->mm_pages[1]);
  740. card->Ready = 0; /* page 0 is ready */
  741. card->Active = -1; /* no page is active */
  742. card->bio = NULL;
  743. card->biotail = &card->bio;
  744. card->queue = blk_alloc_queue(GFP_KERNEL);
  745. if (!card->queue)
  746. goto failed_alloc;
  747. blk_queue_make_request(card->queue, mm_make_request);
  748. card->queue->queue_lock = &card->lock;
  749. card->queue->queuedata = card;
  750. tasklet_init(&card->tasklet, process_page, (unsigned long)card);
  751. card->check_batteries = 0;
  752. mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
  753. switch (mem_present) {
  754. case MEM_128_MB:
  755. card->mm_size = 1024 * 128;
  756. break;
  757. case MEM_256_MB:
  758. card->mm_size = 1024 * 256;
  759. break;
  760. case MEM_512_MB:
  761. card->mm_size = 1024 * 512;
  762. break;
  763. case MEM_1_GB:
  764. card->mm_size = 1024 * 1024;
  765. break;
  766. case MEM_2_GB:
  767. card->mm_size = 1024 * 2048;
  768. break;
  769. default:
  770. card->mm_size = 0;
  771. break;
  772. }
  773. /* Clear the LED's we control */
  774. set_led(card, LED_REMOVE, LED_OFF);
  775. set_led(card, LED_FAULT, LED_OFF);
  776. batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
  777. card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
  778. card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
  779. card->battery[0].last_change = card->battery[1].last_change = jiffies;
  780. if (card->flags & UM_FLAG_NO_BATT)
  781. dev_printk(KERN_INFO, &card->dev->dev,
  782. "Size %d KB\n", card->mm_size);
  783. else {
  784. dev_printk(KERN_INFO, &card->dev->dev,
  785. "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
  786. card->mm_size,
  787. batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
  788. card->battery[0].good ? "OK" : "FAILURE",
  789. batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
  790. card->battery[1].good ? "OK" : "FAILURE");
  791. set_fault_to_battery_status(card);
  792. }
  793. pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
  794. data = 0xffffffff;
  795. pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
  796. pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
  797. pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
  798. data &= 0xfffffff0;
  799. data = ~data;
  800. data += 1;
  801. if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
  802. card)) {
  803. dev_printk(KERN_ERR, &card->dev->dev,
  804. "Unable to allocate IRQ\n");
  805. ret = -ENODEV;
  806. goto failed_req_irq;
  807. }
  808. dev_printk(KERN_INFO, &card->dev->dev,
  809. "Window size %d bytes, IRQ %d\n", data, dev->irq);
  810. spin_lock_init(&card->lock);
  811. pci_set_drvdata(dev, card);
  812. if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
  813. pci_write_cmd = 0x07; /* then Memory Write command */
  814. if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
  815. unsigned short cfg_command;
  816. pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
  817. cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
  818. pci_write_config_word(dev, PCI_COMMAND, cfg_command);
  819. }
  820. pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
  821. num_cards++;
  822. if (!get_userbit(card, MEMORY_INITIALIZED)) {
  823. dev_printk(KERN_INFO, &card->dev->dev,
  824. "memory NOT initialized. Consider over-writing whole device.\n");
  825. card->init_size = 0;
  826. } else {
  827. dev_printk(KERN_INFO, &card->dev->dev,
  828. "memory already initialized\n");
  829. card->init_size = card->mm_size;
  830. }
  831. /* Enable ECC */
  832. writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
  833. return 0;
  834. failed_req_irq:
  835. failed_alloc:
  836. if (card->mm_pages[0].desc)
  837. pci_free_consistent(card->dev, PAGE_SIZE*2,
  838. card->mm_pages[0].desc,
  839. card->mm_pages[0].page_dma);
  840. if (card->mm_pages[1].desc)
  841. pci_free_consistent(card->dev, PAGE_SIZE*2,
  842. card->mm_pages[1].desc,
  843. card->mm_pages[1].page_dma);
  844. failed_magic:
  845. iounmap(card->csr_remap);
  846. failed_remap_csr:
  847. pci_release_regions(dev);
  848. failed_req_csr:
  849. return ret;
  850. }
  851. static void mm_pci_remove(struct pci_dev *dev)
  852. {
  853. struct cardinfo *card = pci_get_drvdata(dev);
  854. tasklet_kill(&card->tasklet);
  855. free_irq(dev->irq, card);
  856. iounmap(card->csr_remap);
  857. if (card->mm_pages[0].desc)
  858. pci_free_consistent(card->dev, PAGE_SIZE*2,
  859. card->mm_pages[0].desc,
  860. card->mm_pages[0].page_dma);
  861. if (card->mm_pages[1].desc)
  862. pci_free_consistent(card->dev, PAGE_SIZE*2,
  863. card->mm_pages[1].desc,
  864. card->mm_pages[1].page_dma);
  865. blk_cleanup_queue(card->queue);
  866. pci_release_regions(dev);
  867. pci_disable_device(dev);
  868. }
  869. static const struct pci_device_id mm_pci_ids[] = {
  870. {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
  871. {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
  872. {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
  873. {
  874. .vendor = 0x8086,
  875. .device = 0xB555,
  876. .subvendor = 0x1332,
  877. .subdevice = 0x5460,
  878. .class = 0x050000,
  879. .class_mask = 0,
  880. }, { /* end: all zeroes */ }
  881. };
  882. MODULE_DEVICE_TABLE(pci, mm_pci_ids);
  883. static struct pci_driver mm_pci_driver = {
  884. .name = DRIVER_NAME,
  885. .id_table = mm_pci_ids,
  886. .probe = mm_pci_probe,
  887. .remove = mm_pci_remove,
  888. };
  889. static int __init mm_init(void)
  890. {
  891. int retval, i;
  892. int err;
  893. retval = pci_register_driver(&mm_pci_driver);
  894. if (retval)
  895. return -ENOMEM;
  896. err = major_nr = register_blkdev(0, DRIVER_NAME);
  897. if (err < 0) {
  898. pci_unregister_driver(&mm_pci_driver);
  899. return -EIO;
  900. }
  901. for (i = 0; i < num_cards; i++) {
  902. mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
  903. if (!mm_gendisk[i])
  904. goto out;
  905. }
  906. for (i = 0; i < num_cards; i++) {
  907. struct gendisk *disk = mm_gendisk[i];
  908. sprintf(disk->disk_name, "umem%c", 'a'+i);
  909. spin_lock_init(&cards[i].lock);
  910. disk->major = major_nr;
  911. disk->first_minor = i << MM_SHIFT;
  912. disk->fops = &mm_fops;
  913. disk->private_data = &cards[i];
  914. disk->queue = cards[i].queue;
  915. set_capacity(disk, cards[i].mm_size << 1);
  916. add_disk(disk);
  917. }
  918. init_battery_timer();
  919. printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
  920. /* printk("mm_init: Done. 10-19-01 9:00\n"); */
  921. return 0;
  922. out:
  923. pci_unregister_driver(&mm_pci_driver);
  924. unregister_blkdev(major_nr, DRIVER_NAME);
  925. while (i--)
  926. put_disk(mm_gendisk[i]);
  927. return -ENOMEM;
  928. }
  929. static void __exit mm_cleanup(void)
  930. {
  931. int i;
  932. del_battery_timer();
  933. for (i = 0; i < num_cards ; i++) {
  934. del_gendisk(mm_gendisk[i]);
  935. put_disk(mm_gendisk[i]);
  936. }
  937. pci_unregister_driver(&mm_pci_driver);
  938. unregister_blkdev(major_nr, DRIVER_NAME);
  939. }
  940. module_init(mm_init);
  941. module_exit(mm_cleanup);
  942. MODULE_AUTHOR(DRIVER_AUTHOR);
  943. MODULE_DESCRIPTION(DRIVER_DESC);
  944. MODULE_LICENSE("GPL");