xen-asm_32.S 6.7 KB

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  1. /*
  2. * Asm versions of Xen pv-ops, suitable for either direct use or
  3. * inlining. The inline versions are the same as the direct-use
  4. * versions, with the pre- and post-amble chopped off.
  5. *
  6. * This code is encoded for size rather than absolute efficiency, with
  7. * a view to being able to inline as much as possible.
  8. *
  9. * We only bother with direct forms (ie, vcpu in pda) of the
  10. * operations here; the indirect forms are better handled in C, since
  11. * they're generally too large to inline anyway.
  12. */
  13. #include <asm/thread_info.h>
  14. #include <asm/processor-flags.h>
  15. #include <asm/segment.h>
  16. #include <asm/asm.h>
  17. #include <xen/interface/xen.h>
  18. #include "xen-asm.h"
  19. /*
  20. * Force an event check by making a hypercall, but preserve regs
  21. * before making the call.
  22. */
  23. check_events:
  24. push %eax
  25. push %ecx
  26. push %edx
  27. call xen_force_evtchn_callback
  28. pop %edx
  29. pop %ecx
  30. pop %eax
  31. ret
  32. /*
  33. * We can't use sysexit directly, because we're not running in ring0.
  34. * But we can easily fake it up using iret. Assuming xen_sysexit is
  35. * jumped to with a standard stack frame, we can just strip it back to
  36. * a standard iret frame and use iret.
  37. */
  38. ENTRY(xen_sysexit)
  39. movl PT_EAX(%esp), %eax /* Shouldn't be necessary? */
  40. orl $X86_EFLAGS_IF, PT_EFLAGS(%esp)
  41. lea PT_EIP(%esp), %esp
  42. jmp xen_iret
  43. ENDPROC(xen_sysexit)
  44. /*
  45. * This is run where a normal iret would be run, with the same stack setup:
  46. * 8: eflags
  47. * 4: cs
  48. * esp-> 0: eip
  49. *
  50. * This attempts to make sure that any pending events are dealt with
  51. * on return to usermode, but there is a small window in which an
  52. * event can happen just before entering usermode. If the nested
  53. * interrupt ends up setting one of the TIF_WORK_MASK pending work
  54. * flags, they will not be tested again before returning to
  55. * usermode. This means that a process can end up with pending work,
  56. * which will be unprocessed until the process enters and leaves the
  57. * kernel again, which could be an unbounded amount of time. This
  58. * means that a pending signal or reschedule event could be
  59. * indefinitely delayed.
  60. *
  61. * The fix is to notice a nested interrupt in the critical window, and
  62. * if one occurs, then fold the nested interrupt into the current
  63. * interrupt stack frame, and re-process it iteratively rather than
  64. * recursively. This means that it will exit via the normal path, and
  65. * all pending work will be dealt with appropriately.
  66. *
  67. * Because the nested interrupt handler needs to deal with the current
  68. * stack state in whatever form its in, we keep things simple by only
  69. * using a single register which is pushed/popped on the stack.
  70. */
  71. .macro POP_FS
  72. 1:
  73. popw %fs
  74. .pushsection .fixup, "ax"
  75. 2: movw $0, (%esp)
  76. jmp 1b
  77. .popsection
  78. _ASM_EXTABLE(1b,2b)
  79. .endm
  80. ENTRY(xen_iret)
  81. /* test eflags for special cases */
  82. testl $(X86_EFLAGS_VM | XEN_EFLAGS_NMI), 8(%esp)
  83. jnz hyper_iret
  84. push %eax
  85. ESP_OFFSET=4 # bytes pushed onto stack
  86. /* Store vcpu_info pointer for easy access */
  87. #ifdef CONFIG_SMP
  88. pushw %fs
  89. movl $(__KERNEL_PERCPU), %eax
  90. movl %eax, %fs
  91. movl %fs:xen_vcpu, %eax
  92. POP_FS
  93. #else
  94. movl %ss:xen_vcpu, %eax
  95. #endif
  96. /* check IF state we're restoring */
  97. testb $X86_EFLAGS_IF>>8, 8+1+ESP_OFFSET(%esp)
  98. /*
  99. * Maybe enable events. Once this happens we could get a
  100. * recursive event, so the critical region starts immediately
  101. * afterwards. However, if that happens we don't end up
  102. * resuming the code, so we don't have to be worried about
  103. * being preempted to another CPU.
  104. */
  105. setz %ss:XEN_vcpu_info_mask(%eax)
  106. xen_iret_start_crit:
  107. /* check for unmasked and pending */
  108. cmpw $0x0001, %ss:XEN_vcpu_info_pending(%eax)
  109. /*
  110. * If there's something pending, mask events again so we can
  111. * jump back into xen_hypervisor_callback. Otherwise do not
  112. * touch XEN_vcpu_info_mask.
  113. */
  114. jne 1f
  115. movb $1, %ss:XEN_vcpu_info_mask(%eax)
  116. 1: popl %eax
  117. /*
  118. * From this point on the registers are restored and the stack
  119. * updated, so we don't need to worry about it if we're
  120. * preempted
  121. */
  122. iret_restore_end:
  123. /*
  124. * Jump to hypervisor_callback after fixing up the stack.
  125. * Events are masked, so jumping out of the critical region is
  126. * OK.
  127. */
  128. je xen_hypervisor_callback
  129. 1: iret
  130. xen_iret_end_crit:
  131. _ASM_EXTABLE(1b, iret_exc)
  132. hyper_iret:
  133. /* put this out of line since its very rarely used */
  134. jmp hypercall_page + __HYPERVISOR_iret * 32
  135. .globl xen_iret_start_crit, xen_iret_end_crit
  136. /*
  137. * This is called by xen_hypervisor_callback in entry.S when it sees
  138. * that the EIP at the time of interrupt was between
  139. * xen_iret_start_crit and xen_iret_end_crit. We're passed the EIP in
  140. * %eax so we can do a more refined determination of what to do.
  141. *
  142. * The stack format at this point is:
  143. * ----------------
  144. * ss : (ss/esp may be present if we came from usermode)
  145. * esp :
  146. * eflags } outer exception info
  147. * cs }
  148. * eip }
  149. * ---------------- <- edi (copy dest)
  150. * eax : outer eax if it hasn't been restored
  151. * ----------------
  152. * eflags } nested exception info
  153. * cs } (no ss/esp because we're nested
  154. * eip } from the same ring)
  155. * orig_eax }<- esi (copy src)
  156. * - - - - - - - -
  157. * fs }
  158. * es }
  159. * ds } SAVE_ALL state
  160. * eax }
  161. * : :
  162. * ebx }<- esp
  163. * ----------------
  164. *
  165. * In order to deliver the nested exception properly, we need to shift
  166. * everything from the return addr up to the error code so it sits
  167. * just under the outer exception info. This means that when we
  168. * handle the exception, we do it in the context of the outer
  169. * exception rather than starting a new one.
  170. *
  171. * The only caveat is that if the outer eax hasn't been restored yet
  172. * (ie, it's still on stack), we need to insert its value into the
  173. * SAVE_ALL state before going on, since it's usermode state which we
  174. * eventually need to restore.
  175. */
  176. ENTRY(xen_iret_crit_fixup)
  177. /*
  178. * Paranoia: Make sure we're really coming from kernel space.
  179. * One could imagine a case where userspace jumps into the
  180. * critical range address, but just before the CPU delivers a
  181. * GP, it decides to deliver an interrupt instead. Unlikely?
  182. * Definitely. Easy to avoid? Yes. The Intel documents
  183. * explicitly say that the reported EIP for a bad jump is the
  184. * jump instruction itself, not the destination, but some
  185. * virtual environments get this wrong.
  186. */
  187. movl PT_CS(%esp), %ecx
  188. andl $SEGMENT_RPL_MASK, %ecx
  189. cmpl $USER_RPL, %ecx
  190. je 2f
  191. lea PT_ORIG_EAX(%esp), %esi
  192. lea PT_EFLAGS(%esp), %edi
  193. /*
  194. * If eip is before iret_restore_end then stack
  195. * hasn't been restored yet.
  196. */
  197. cmp $iret_restore_end, %eax
  198. jae 1f
  199. movl 0+4(%edi), %eax /* copy EAX (just above top of frame) */
  200. movl %eax, PT_EAX(%esp)
  201. lea ESP_OFFSET(%edi), %edi /* move dest up over saved regs */
  202. /* set up the copy */
  203. 1: std
  204. mov $PT_EIP / 4, %ecx /* saved regs up to orig_eax */
  205. rep movsl
  206. cld
  207. lea 4(%edi), %esp /* point esp to new frame */
  208. 2: jmp xen_do_upcall