powersave.S 1.8 KB

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  1. /*
  2. * Copyright (C) 2006-2007 PA Semi, Inc
  3. *
  4. * Maintained by: Olof Johansson <olof@lixom.net>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. *
  19. */
  20. #include <asm/processor.h>
  21. #include <asm/page.h>
  22. #include <asm/ppc_asm.h>
  23. #include <asm/cputable.h>
  24. #include <asm/cache.h>
  25. #include <asm/thread_info.h>
  26. #include <asm/asm-offsets.h>
  27. /* Power savings opcodes since not all binutils have them at this time */
  28. #define DOZE .long 0x4c000324
  29. #define NAP .long 0x4c000364
  30. #define SLEEP .long 0x4c0003a4
  31. #define RVW .long 0x4c0003e4
  32. /* Common sequence to do before going to any of the
  33. * powersavings modes.
  34. */
  35. #define PRE_SLEEP_SEQUENCE \
  36. std r3,8(r1); \
  37. ptesync ; \
  38. ld r3,8(r1); \
  39. 1: cmpd r3,r3; \
  40. bne 1b
  41. _doze:
  42. PRE_SLEEP_SEQUENCE
  43. DOZE
  44. b .
  45. _GLOBAL(idle_spin)
  46. blr
  47. _GLOBAL(idle_doze)
  48. LOAD_REG_ADDR(r3, _doze)
  49. b sleep_common
  50. /* Add more modes here later */
  51. sleep_common:
  52. mflr r0
  53. std r0, 16(r1)
  54. stdu r1,-64(r1)
  55. #ifdef CONFIG_PPC_PASEMI_CPUFREQ
  56. std r3, 48(r1)
  57. /* Only do power savings when in astate 0 */
  58. bl check_astate
  59. cmpwi r3,0
  60. bne 1f
  61. ld r3, 48(r1)
  62. #endif
  63. LOAD_REG_IMMEDIATE(r6,MSR_DR|MSR_IR|MSR_ME|MSR_EE)
  64. mfmsr r4
  65. andc r5,r4,r6
  66. mtmsrd r5,0
  67. mtctr r3
  68. bctrl
  69. mtmsrd r4,0
  70. 1: addi r1,r1,64
  71. ld r0,16(r1)
  72. mtlr r0
  73. blr