bcm7362.dtsi 3.9 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "brcm,bcm7362";
  5. cpus {
  6. #address-cells = <1>;
  7. #size-cells = <0>;
  8. mips-hpt-frequency = <375000000>;
  9. cpu@0 {
  10. compatible = "brcm,bmips4380";
  11. device_type = "cpu";
  12. reg = <0>;
  13. };
  14. cpu@1 {
  15. compatible = "brcm,bmips4380";
  16. device_type = "cpu";
  17. reg = <1>;
  18. };
  19. };
  20. aliases {
  21. uart0 = &uart0;
  22. uart1 = &uart1;
  23. uart2 = &uart2;
  24. };
  25. cpu_intc: cpu_intc {
  26. #address-cells = <0>;
  27. compatible = "mti,cpu-interrupt-controller";
  28. interrupt-controller;
  29. #interrupt-cells = <1>;
  30. };
  31. clocks {
  32. uart_clk: uart_clk {
  33. compatible = "fixed-clock";
  34. #clock-cells = <0>;
  35. clock-frequency = <81000000>;
  36. };
  37. };
  38. rdb {
  39. #address-cells = <1>;
  40. #size-cells = <1>;
  41. compatible = "simple-bus";
  42. ranges = <0 0x10000000 0x01000000>;
  43. periph_intc: periph_intc@411400 {
  44. compatible = "brcm,bcm7038-l1-intc";
  45. reg = <0x411400 0x30>, <0x411600 0x30>;
  46. interrupt-controller;
  47. #interrupt-cells = <1>;
  48. interrupt-parent = <&cpu_intc>;
  49. interrupts = <2>, <3>;
  50. };
  51. sun_l2_intc: sun_l2_intc@403000 {
  52. compatible = "brcm,l2-intc";
  53. reg = <0x403000 0x30>;
  54. interrupt-controller;
  55. #interrupt-cells = <1>;
  56. interrupt-parent = <&periph_intc>;
  57. interrupts = <48>;
  58. };
  59. gisb-arb@400000 {
  60. compatible = "brcm,bcm7400-gisb-arb";
  61. reg = <0x400000 0xdc>;
  62. native-endian;
  63. interrupt-parent = <&sun_l2_intc>;
  64. interrupts = <0>, <2>;
  65. brcm,gisb-arb-master-mask = <0x2f3>;
  66. brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
  67. "rdc_0", "raaga_0",
  68. "avd_0", "jtag_0";
  69. };
  70. upg_irq0_intc: upg_irq0_intc@406600 {
  71. compatible = "brcm,bcm7120-l2-intc";
  72. reg = <0x406600 0x8>;
  73. brcm,int-map-mask = <0x44>;
  74. brcm,int-fwd-mask = <0x70000>;
  75. interrupt-controller;
  76. #interrupt-cells = <1>;
  77. interrupt-parent = <&periph_intc>;
  78. interrupts = <56>;
  79. };
  80. sun_top_ctrl: syscon@404000 {
  81. compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
  82. reg = <0x404000 0x51c>;
  83. little-endian;
  84. };
  85. reboot {
  86. compatible = "brcm,brcmstb-reboot";
  87. syscon = <&sun_top_ctrl 0x304 0x308>;
  88. };
  89. uart0: serial@406800 {
  90. compatible = "ns16550a";
  91. reg = <0x406800 0x20>;
  92. reg-io-width = <0x4>;
  93. reg-shift = <0x2>;
  94. native-endian;
  95. interrupt-parent = <&periph_intc>;
  96. interrupts = <61>;
  97. clocks = <&uart_clk>;
  98. status = "disabled";
  99. };
  100. uart1: serial@406840 {
  101. compatible = "ns16550a";
  102. reg = <0x406840 0x20>;
  103. reg-io-width = <0x4>;
  104. reg-shift = <0x2>;
  105. native-endian;
  106. interrupt-parent = <&periph_intc>;
  107. interrupts = <62>;
  108. clocks = <&uart_clk>;
  109. status = "disabled";
  110. };
  111. uart2: serial@406880 {
  112. compatible = "ns16550a";
  113. reg = <0x406880 0x20>;
  114. reg-io-width = <0x4>;
  115. reg-shift = <0x2>;
  116. native-endian;
  117. interrupt-parent = <&periph_intc>;
  118. interrupts = <63>;
  119. clocks = <&uart_clk>;
  120. status = "disabled";
  121. };
  122. enet0: ethernet@430000 {
  123. phy-mode = "internal";
  124. phy-handle = <&phy1>;
  125. mac-address = [ 00 10 18 36 23 1a ];
  126. compatible = "brcm,genet-v2";
  127. #address-cells = <0x1>;
  128. #size-cells = <0x1>;
  129. reg = <0x430000 0x4c8c>;
  130. interrupts = <24>, <25>;
  131. interrupt-parent = <&periph_intc>;
  132. status = "disabled";
  133. mdio@e14 {
  134. compatible = "brcm,genet-mdio-v2";
  135. #address-cells = <0x1>;
  136. #size-cells = <0x0>;
  137. reg = <0xe14 0x8>;
  138. phy1: ethernet-phy@1 {
  139. max-speed = <100>;
  140. reg = <0x1>;
  141. compatible = "brcm,40nm-ephy",
  142. "ethernet-phy-ieee802.3-c22";
  143. };
  144. };
  145. };
  146. ehci0: usb@480300 {
  147. compatible = "brcm,bcm7362-ehci", "generic-ehci";
  148. reg = <0x480300 0x100>;
  149. native-endian;
  150. interrupt-parent = <&periph_intc>;
  151. interrupts = <65>;
  152. status = "disabled";
  153. };
  154. ohci0: usb@480400 {
  155. compatible = "brcm,bcm7362-ohci", "generic-ohci";
  156. reg = <0x480400 0x100>;
  157. native-endian;
  158. no-big-frame-no;
  159. interrupt-parent = <&periph_intc>;
  160. interrupts = <66>;
  161. status = "disabled";
  162. };
  163. };
  164. };