db1300.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867
  1. /*
  2. * DBAu1300 init and platform device setup.
  3. *
  4. * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/dma-mapping.h>
  8. #include <linux/gpio.h>
  9. #include <linux/gpio_keys.h>
  10. #include <linux/init.h>
  11. #include <linux/input.h> /* KEY_* codes */
  12. #include <linux/i2c.h>
  13. #include <linux/io.h>
  14. #include <linux/leds.h>
  15. #include <linux/ata_platform.h>
  16. #include <linux/mmc/host.h>
  17. #include <linux/module.h>
  18. #include <linux/mtd/mtd.h>
  19. #include <linux/mtd/nand.h>
  20. #include <linux/mtd/partitions.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/smsc911x.h>
  23. #include <linux/wm97xx.h>
  24. #include <asm/mach-au1x00/au1000.h>
  25. #include <asm/mach-au1x00/au1100_mmc.h>
  26. #include <asm/mach-au1x00/au1200fb.h>
  27. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  28. #include <asm/mach-au1x00/au1xxx_psc.h>
  29. #include <asm/mach-db1x00/bcsr.h>
  30. #include <asm/mach-au1x00/prom.h>
  31. #include "platform.h"
  32. /* FPGA (external mux) interrupt sources */
  33. #define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1)
  34. #define DB1300_IDE_INT (DB1300_FIRST_INT + 0)
  35. #define DB1300_ETH_INT (DB1300_FIRST_INT + 1)
  36. #define DB1300_CF_INT (DB1300_FIRST_INT + 2)
  37. #define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4)
  38. #define DB1300_HDMI_INT (DB1300_FIRST_INT + 5)
  39. #define DB1300_DC_INT (DB1300_FIRST_INT + 6)
  40. #define DB1300_FLASH_INT (DB1300_FIRST_INT + 7)
  41. #define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8)
  42. #define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9)
  43. #define DB1300_AC97_INT (DB1300_FIRST_INT + 10)
  44. #define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11)
  45. #define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12)
  46. #define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13)
  47. #define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14)
  48. #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
  49. #define DB1300_LAST_INT (DB1300_FIRST_INT + 15)
  50. /* SMSC9210 CS */
  51. #define DB1300_ETH_PHYS_ADDR 0x19000000
  52. #define DB1300_ETH_PHYS_END 0x197fffff
  53. /* ATA CS */
  54. #define DB1300_IDE_PHYS_ADDR 0x18800000
  55. #define DB1300_IDE_REG_SHIFT 5
  56. #define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT)
  57. /* NAND CS */
  58. #define DB1300_NAND_PHYS_ADDR 0x20000000
  59. #define DB1300_NAND_PHYS_END 0x20000fff
  60. static struct i2c_board_info db1300_i2c_devs[] __initdata = {
  61. { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */
  62. { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
  63. };
  64. /* multifunction pins to assign to GPIO controller */
  65. static int db1300_gpio_pins[] __initdata = {
  66. AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1,
  67. AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX,
  68. AU1300_PIN_EXTCLK1,
  69. -1, /* terminator */
  70. };
  71. /* multifunction pins to assign to device functions */
  72. static int db1300_dev_pins[] __initdata = {
  73. /* wake-from-str pins 0-3 */
  74. AU1300_PIN_WAKE0,
  75. /* external clock sources for PSC0 */
  76. AU1300_PIN_EXTCLK0,
  77. /* 8bit MMC interface on SD0: 6-9 */
  78. AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6,
  79. AU1300_PIN_SD0DAT7,
  80. /* UART1 pins: 11-18 */
  81. AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR,
  82. AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR,
  83. AU1300_PIN_U1RX, AU1300_PIN_U1TX,
  84. /* UART0 pins: 19-24 */
  85. AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR,
  86. AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR,
  87. /* UART2: 25-26 */
  88. AU1300_PIN_U2RX, AU1300_PIN_U2TX,
  89. /* UART3: 27-28 */
  90. AU1300_PIN_U3RX, AU1300_PIN_U3TX,
  91. /* LCD controller PWMs, ext pixclock: 30-31 */
  92. AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN,
  93. /* SD1 interface: 32-37 */
  94. AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2,
  95. AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK,
  96. /* SD2 interface: 38-43 */
  97. AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2,
  98. AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK,
  99. /* PSC0/1 clocks: 44-45 */
  100. AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK,
  101. /* PSCs: 46-49/50-53/54-57/58-61 */
  102. AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0,
  103. AU1300_PIN_PSC0D1,
  104. AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0,
  105. AU1300_PIN_PSC1D1,
  106. AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0,
  107. AU1300_PIN_PSC2D1,
  108. AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0,
  109. AU1300_PIN_PSC3D1,
  110. /* PCMCIA interface: 62-70 */
  111. AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16,
  112. AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT,
  113. AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW,
  114. /* camera interface H/V sync inputs: 71-72 */
  115. AU1300_PIN_CIMLS, AU1300_PIN_CIMFS,
  116. /* PSC2/3 clocks: 73-74 */
  117. AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK,
  118. -1, /* terminator */
  119. };
  120. static void __init db1300_gpio_config(void)
  121. {
  122. int *i;
  123. i = &db1300_dev_pins[0];
  124. while (*i != -1)
  125. au1300_pinfunc_to_dev(*i++);
  126. i = &db1300_gpio_pins[0];
  127. while (*i != -1)
  128. au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */
  129. au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
  130. }
  131. /**********************************************************************/
  132. static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
  133. unsigned int ctrl)
  134. {
  135. struct nand_chip *this = mtd->priv;
  136. unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
  137. ioaddr &= 0xffffff00;
  138. if (ctrl & NAND_CLE) {
  139. ioaddr += MEM_STNAND_CMD;
  140. } else if (ctrl & NAND_ALE) {
  141. ioaddr += MEM_STNAND_ADDR;
  142. } else {
  143. /* assume we want to r/w real data by default */
  144. ioaddr += MEM_STNAND_DATA;
  145. }
  146. this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
  147. if (cmd != NAND_CMD_NONE) {
  148. __raw_writeb(cmd, this->IO_ADDR_W);
  149. wmb();
  150. }
  151. }
  152. static int au1300_nand_device_ready(struct mtd_info *mtd)
  153. {
  154. return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
  155. }
  156. static struct mtd_partition db1300_nand_parts[] = {
  157. {
  158. .name = "NAND FS 0",
  159. .offset = 0,
  160. .size = 8 * 1024 * 1024,
  161. },
  162. {
  163. .name = "NAND FS 1",
  164. .offset = MTDPART_OFS_APPEND,
  165. .size = MTDPART_SIZ_FULL
  166. },
  167. };
  168. struct platform_nand_data db1300_nand_platdata = {
  169. .chip = {
  170. .nr_chips = 1,
  171. .chip_offset = 0,
  172. .nr_partitions = ARRAY_SIZE(db1300_nand_parts),
  173. .partitions = db1300_nand_parts,
  174. .chip_delay = 20,
  175. },
  176. .ctrl = {
  177. .dev_ready = au1300_nand_device_ready,
  178. .cmd_ctrl = au1300_nand_cmd_ctrl,
  179. },
  180. };
  181. static struct resource db1300_nand_res[] = {
  182. [0] = {
  183. .start = DB1300_NAND_PHYS_ADDR,
  184. .end = DB1300_NAND_PHYS_ADDR + 0xff,
  185. .flags = IORESOURCE_MEM,
  186. },
  187. };
  188. static struct platform_device db1300_nand_dev = {
  189. .name = "gen_nand",
  190. .num_resources = ARRAY_SIZE(db1300_nand_res),
  191. .resource = db1300_nand_res,
  192. .id = -1,
  193. .dev = {
  194. .platform_data = &db1300_nand_platdata,
  195. }
  196. };
  197. /**********************************************************************/
  198. static struct resource db1300_eth_res[] = {
  199. [0] = {
  200. .start = DB1300_ETH_PHYS_ADDR,
  201. .end = DB1300_ETH_PHYS_END,
  202. .flags = IORESOURCE_MEM,
  203. },
  204. [1] = {
  205. .start = DB1300_ETH_INT,
  206. .end = DB1300_ETH_INT,
  207. .flags = IORESOURCE_IRQ,
  208. },
  209. };
  210. static struct smsc911x_platform_config db1300_eth_config = {
  211. .phy_interface = PHY_INTERFACE_MODE_MII,
  212. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  213. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  214. .flags = SMSC911X_USE_32BIT,
  215. };
  216. static struct platform_device db1300_eth_dev = {
  217. .name = "smsc911x",
  218. .id = -1,
  219. .num_resources = ARRAY_SIZE(db1300_eth_res),
  220. .resource = db1300_eth_res,
  221. .dev = {
  222. .platform_data = &db1300_eth_config,
  223. },
  224. };
  225. /**********************************************************************/
  226. static struct resource au1300_psc1_res[] = {
  227. [0] = {
  228. .start = AU1300_PSC1_PHYS_ADDR,
  229. .end = AU1300_PSC1_PHYS_ADDR + 0x0fff,
  230. .flags = IORESOURCE_MEM,
  231. },
  232. [1] = {
  233. .start = AU1300_PSC1_INT,
  234. .end = AU1300_PSC1_INT,
  235. .flags = IORESOURCE_IRQ,
  236. },
  237. [2] = {
  238. .start = AU1300_DSCR_CMD0_PSC1_TX,
  239. .end = AU1300_DSCR_CMD0_PSC1_TX,
  240. .flags = IORESOURCE_DMA,
  241. },
  242. [3] = {
  243. .start = AU1300_DSCR_CMD0_PSC1_RX,
  244. .end = AU1300_DSCR_CMD0_PSC1_RX,
  245. .flags = IORESOURCE_DMA,
  246. },
  247. };
  248. static struct platform_device db1300_ac97_dev = {
  249. .name = "au1xpsc_ac97",
  250. .id = 1, /* PSC ID. match with AC97 codec ID! */
  251. .num_resources = ARRAY_SIZE(au1300_psc1_res),
  252. .resource = au1300_psc1_res,
  253. };
  254. /**********************************************************************/
  255. static struct resource au1300_psc2_res[] = {
  256. [0] = {
  257. .start = AU1300_PSC2_PHYS_ADDR,
  258. .end = AU1300_PSC2_PHYS_ADDR + 0x0fff,
  259. .flags = IORESOURCE_MEM,
  260. },
  261. [1] = {
  262. .start = AU1300_PSC2_INT,
  263. .end = AU1300_PSC2_INT,
  264. .flags = IORESOURCE_IRQ,
  265. },
  266. [2] = {
  267. .start = AU1300_DSCR_CMD0_PSC2_TX,
  268. .end = AU1300_DSCR_CMD0_PSC2_TX,
  269. .flags = IORESOURCE_DMA,
  270. },
  271. [3] = {
  272. .start = AU1300_DSCR_CMD0_PSC2_RX,
  273. .end = AU1300_DSCR_CMD0_PSC2_RX,
  274. .flags = IORESOURCE_DMA,
  275. },
  276. };
  277. static struct platform_device db1300_i2s_dev = {
  278. .name = "au1xpsc_i2s",
  279. .id = 2, /* PSC ID */
  280. .num_resources = ARRAY_SIZE(au1300_psc2_res),
  281. .resource = au1300_psc2_res,
  282. };
  283. /**********************************************************************/
  284. static struct resource au1300_psc3_res[] = {
  285. [0] = {
  286. .start = AU1300_PSC3_PHYS_ADDR,
  287. .end = AU1300_PSC3_PHYS_ADDR + 0x0fff,
  288. .flags = IORESOURCE_MEM,
  289. },
  290. [1] = {
  291. .start = AU1300_PSC3_INT,
  292. .end = AU1300_PSC3_INT,
  293. .flags = IORESOURCE_IRQ,
  294. },
  295. [2] = {
  296. .start = AU1300_DSCR_CMD0_PSC3_TX,
  297. .end = AU1300_DSCR_CMD0_PSC3_TX,
  298. .flags = IORESOURCE_DMA,
  299. },
  300. [3] = {
  301. .start = AU1300_DSCR_CMD0_PSC3_RX,
  302. .end = AU1300_DSCR_CMD0_PSC3_RX,
  303. .flags = IORESOURCE_DMA,
  304. },
  305. };
  306. static struct platform_device db1300_i2c_dev = {
  307. .name = "au1xpsc_smbus",
  308. .id = 0, /* bus number */
  309. .num_resources = ARRAY_SIZE(au1300_psc3_res),
  310. .resource = au1300_psc3_res,
  311. };
  312. /**********************************************************************/
  313. /* proper key assignments when facing the LCD panel. For key assignments
  314. * according to the schematics swap up with down and left with right.
  315. * I chose to use it to emulate the arrow keys of a keyboard.
  316. */
  317. static struct gpio_keys_button db1300_5waysw_arrowkeys[] = {
  318. {
  319. .code = KEY_DOWN,
  320. .gpio = AU1300_PIN_LCDPWM0,
  321. .type = EV_KEY,
  322. .debounce_interval = 1,
  323. .active_low = 1,
  324. .desc = "5waysw-down",
  325. },
  326. {
  327. .code = KEY_UP,
  328. .gpio = AU1300_PIN_PSC2SYNC1,
  329. .type = EV_KEY,
  330. .debounce_interval = 1,
  331. .active_low = 1,
  332. .desc = "5waysw-up",
  333. },
  334. {
  335. .code = KEY_RIGHT,
  336. .gpio = AU1300_PIN_WAKE3,
  337. .type = EV_KEY,
  338. .debounce_interval = 1,
  339. .active_low = 1,
  340. .desc = "5waysw-right",
  341. },
  342. {
  343. .code = KEY_LEFT,
  344. .gpio = AU1300_PIN_WAKE2,
  345. .type = EV_KEY,
  346. .debounce_interval = 1,
  347. .active_low = 1,
  348. .desc = "5waysw-left",
  349. },
  350. {
  351. .code = KEY_ENTER,
  352. .gpio = AU1300_PIN_WAKE1,
  353. .type = EV_KEY,
  354. .debounce_interval = 1,
  355. .active_low = 1,
  356. .desc = "5waysw-push",
  357. },
  358. };
  359. static struct gpio_keys_platform_data db1300_5waysw_data = {
  360. .buttons = db1300_5waysw_arrowkeys,
  361. .nbuttons = ARRAY_SIZE(db1300_5waysw_arrowkeys),
  362. .rep = 1,
  363. .name = "db1300-5wayswitch",
  364. };
  365. static struct platform_device db1300_5waysw_dev = {
  366. .name = "gpio-keys",
  367. .dev = {
  368. .platform_data = &db1300_5waysw_data,
  369. },
  370. };
  371. /**********************************************************************/
  372. static struct pata_platform_info db1300_ide_info = {
  373. .ioport_shift = DB1300_IDE_REG_SHIFT,
  374. };
  375. #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT)
  376. static struct resource db1300_ide_res[] = {
  377. [0] = {
  378. .start = DB1300_IDE_PHYS_ADDR,
  379. .end = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1,
  380. .flags = IORESOURCE_MEM,
  381. },
  382. [1] = {
  383. .start = DB1300_IDE_PHYS_ADDR + IDE_ALT_START,
  384. .end = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1,
  385. .flags = IORESOURCE_MEM,
  386. },
  387. [2] = {
  388. .start = DB1300_IDE_INT,
  389. .end = DB1300_IDE_INT,
  390. .flags = IORESOURCE_IRQ,
  391. },
  392. };
  393. static struct platform_device db1300_ide_dev = {
  394. .dev = {
  395. .platform_data = &db1300_ide_info,
  396. },
  397. .name = "pata_platform",
  398. .resource = db1300_ide_res,
  399. .num_resources = ARRAY_SIZE(db1300_ide_res),
  400. };
  401. /**********************************************************************/
  402. static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
  403. {
  404. void(*mmc_cd)(struct mmc_host *, unsigned long);
  405. /* disable the one currently screaming. No other way to shut it up */
  406. if (irq == DB1300_SD1_INSERT_INT) {
  407. disable_irq_nosync(DB1300_SD1_INSERT_INT);
  408. enable_irq(DB1300_SD1_EJECT_INT);
  409. } else {
  410. disable_irq_nosync(DB1300_SD1_EJECT_INT);
  411. enable_irq(DB1300_SD1_INSERT_INT);
  412. }
  413. /* link against CONFIG_MMC=m. We can only be called once MMC core has
  414. * initialized the controller, so symbol_get() should always succeed.
  415. */
  416. mmc_cd = symbol_get(mmc_detect_change);
  417. mmc_cd(ptr, msecs_to_jiffies(500));
  418. symbol_put(mmc_detect_change);
  419. return IRQ_HANDLED;
  420. }
  421. static int db1300_mmc_card_readonly(void *mmc_host)
  422. {
  423. /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
  424. return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP;
  425. }
  426. static int db1300_mmc_card_inserted(void *mmc_host)
  427. {
  428. return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */
  429. }
  430. static int db1300_mmc_cd_setup(void *mmc_host, int en)
  431. {
  432. int ret;
  433. if (en) {
  434. ret = request_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd, 0,
  435. "sd_insert", mmc_host);
  436. if (ret)
  437. goto out;
  438. ret = request_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd, 0,
  439. "sd_eject", mmc_host);
  440. if (ret) {
  441. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  442. goto out;
  443. }
  444. if (db1300_mmc_card_inserted(mmc_host))
  445. enable_irq(DB1300_SD1_EJECT_INT);
  446. else
  447. enable_irq(DB1300_SD1_INSERT_INT);
  448. } else {
  449. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  450. free_irq(DB1300_SD1_EJECT_INT, mmc_host);
  451. }
  452. ret = 0;
  453. out:
  454. return ret;
  455. }
  456. static void db1300_mmcled_set(struct led_classdev *led,
  457. enum led_brightness brightness)
  458. {
  459. if (brightness != LED_OFF)
  460. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
  461. else
  462. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
  463. }
  464. static struct led_classdev db1300_mmc_led = {
  465. .brightness_set = db1300_mmcled_set,
  466. };
  467. struct au1xmmc_platform_data db1300_sd1_platdata = {
  468. .cd_setup = db1300_mmc_cd_setup,
  469. .card_inserted = db1300_mmc_card_inserted,
  470. .card_readonly = db1300_mmc_card_readonly,
  471. .led = &db1300_mmc_led,
  472. };
  473. static struct resource au1300_sd1_res[] = {
  474. [0] = {
  475. .start = AU1300_SD1_PHYS_ADDR,
  476. .end = AU1300_SD1_PHYS_ADDR,
  477. .flags = IORESOURCE_MEM,
  478. },
  479. [1] = {
  480. .start = AU1300_SD1_INT,
  481. .end = AU1300_SD1_INT,
  482. .flags = IORESOURCE_IRQ,
  483. },
  484. [2] = {
  485. .start = AU1300_DSCR_CMD0_SDMS_TX1,
  486. .end = AU1300_DSCR_CMD0_SDMS_TX1,
  487. .flags = IORESOURCE_DMA,
  488. },
  489. [3] = {
  490. .start = AU1300_DSCR_CMD0_SDMS_RX1,
  491. .end = AU1300_DSCR_CMD0_SDMS_RX1,
  492. .flags = IORESOURCE_DMA,
  493. },
  494. };
  495. static struct platform_device db1300_sd1_dev = {
  496. .dev = {
  497. .platform_data = &db1300_sd1_platdata,
  498. },
  499. .name = "au1xxx-mmc",
  500. .id = 1,
  501. .resource = au1300_sd1_res,
  502. .num_resources = ARRAY_SIZE(au1300_sd1_res),
  503. };
  504. /**********************************************************************/
  505. static int db1300_movinand_inserted(void *mmc_host)
  506. {
  507. return 0; /* disable for now, it doesn't work yet */
  508. }
  509. static int db1300_movinand_readonly(void *mmc_host)
  510. {
  511. return 0;
  512. }
  513. static void db1300_movinand_led_set(struct led_classdev *led,
  514. enum led_brightness brightness)
  515. {
  516. if (brightness != LED_OFF)
  517. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
  518. else
  519. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
  520. }
  521. static struct led_classdev db1300_movinand_led = {
  522. .brightness_set = db1300_movinand_led_set,
  523. };
  524. struct au1xmmc_platform_data db1300_sd0_platdata = {
  525. .card_inserted = db1300_movinand_inserted,
  526. .card_readonly = db1300_movinand_readonly,
  527. .led = &db1300_movinand_led,
  528. .mask_host_caps = MMC_CAP_NEEDS_POLL,
  529. };
  530. static struct resource au1300_sd0_res[] = {
  531. [0] = {
  532. .start = AU1100_SD0_PHYS_ADDR,
  533. .end = AU1100_SD0_PHYS_ADDR,
  534. .flags = IORESOURCE_MEM,
  535. },
  536. [1] = {
  537. .start = AU1300_SD0_INT,
  538. .end = AU1300_SD0_INT,
  539. .flags = IORESOURCE_IRQ,
  540. },
  541. [2] = {
  542. .start = AU1300_DSCR_CMD0_SDMS_TX0,
  543. .end = AU1300_DSCR_CMD0_SDMS_TX0,
  544. .flags = IORESOURCE_DMA,
  545. },
  546. [3] = {
  547. .start = AU1300_DSCR_CMD0_SDMS_RX0,
  548. .end = AU1300_DSCR_CMD0_SDMS_RX0,
  549. .flags = IORESOURCE_DMA,
  550. },
  551. };
  552. static struct platform_device db1300_sd0_dev = {
  553. .dev = {
  554. .platform_data = &db1300_sd0_platdata,
  555. },
  556. .name = "au1xxx-mmc",
  557. .id = 0,
  558. .resource = au1300_sd0_res,
  559. .num_resources = ARRAY_SIZE(au1300_sd0_res),
  560. };
  561. /**********************************************************************/
  562. static struct platform_device db1300_wm9715_dev = {
  563. .name = "wm9712-codec",
  564. .id = 1, /* ID of PSC for AC97 audio, see asoc glue! */
  565. };
  566. static struct platform_device db1300_ac97dma_dev = {
  567. .name = "au1xpsc-pcm",
  568. .id = 1, /* PSC ID */
  569. };
  570. static struct platform_device db1300_i2sdma_dev = {
  571. .name = "au1xpsc-pcm",
  572. .id = 2, /* PSC ID */
  573. };
  574. static struct platform_device db1300_sndac97_dev = {
  575. .name = "db1300-ac97",
  576. };
  577. static struct platform_device db1300_sndi2s_dev = {
  578. .name = "db1300-i2s",
  579. };
  580. /**********************************************************************/
  581. static int db1300fb_panel_index(void)
  582. {
  583. return 9; /* DB1300_800x480 */
  584. }
  585. static int db1300fb_panel_init(void)
  586. {
  587. /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  588. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD,
  589. BCSR_BOARD_LCDBL);
  590. return 0;
  591. }
  592. static int db1300fb_panel_shutdown(void)
  593. {
  594. /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  595. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL,
  596. BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD);
  597. return 0;
  598. }
  599. static struct au1200fb_platdata db1300fb_pd = {
  600. .panel_index = db1300fb_panel_index,
  601. .panel_init = db1300fb_panel_init,
  602. .panel_shutdown = db1300fb_panel_shutdown,
  603. };
  604. static struct resource au1300_lcd_res[] = {
  605. [0] = {
  606. .start = AU1200_LCD_PHYS_ADDR,
  607. .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
  608. .flags = IORESOURCE_MEM,
  609. },
  610. [1] = {
  611. .start = AU1300_LCD_INT,
  612. .end = AU1300_LCD_INT,
  613. .flags = IORESOURCE_IRQ,
  614. }
  615. };
  616. static u64 au1300_lcd_dmamask = DMA_BIT_MASK(32);
  617. static struct platform_device db1300_lcd_dev = {
  618. .name = "au1200-lcd",
  619. .id = 0,
  620. .dev = {
  621. .dma_mask = &au1300_lcd_dmamask,
  622. .coherent_dma_mask = DMA_BIT_MASK(32),
  623. .platform_data = &db1300fb_pd,
  624. },
  625. .num_resources = ARRAY_SIZE(au1300_lcd_res),
  626. .resource = au1300_lcd_res,
  627. };
  628. /**********************************************************************/
  629. static void db1300_wm97xx_irqen(struct wm97xx *wm, int enable)
  630. {
  631. if (enable)
  632. enable_irq(DB1300_AC97_PEN_INT);
  633. else
  634. disable_irq_nosync(DB1300_AC97_PEN_INT);
  635. }
  636. static struct wm97xx_mach_ops db1300_wm97xx_ops = {
  637. .irq_enable = db1300_wm97xx_irqen,
  638. .irq_gpio = WM97XX_GPIO_3,
  639. };
  640. static int db1300_wm97xx_probe(struct platform_device *pdev)
  641. {
  642. struct wm97xx *wm = platform_get_drvdata(pdev);
  643. /* external pendown indicator */
  644. wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN,
  645. WM97XX_GPIO_POL_LOW, WM97XX_GPIO_STICKY,
  646. WM97XX_GPIO_WAKE);
  647. /* internal "virtual" pendown gpio */
  648. wm97xx_config_gpio(wm, WM97XX_GPIO_3, WM97XX_GPIO_OUT,
  649. WM97XX_GPIO_POL_LOW, WM97XX_GPIO_NOTSTICKY,
  650. WM97XX_GPIO_NOWAKE);
  651. wm->pen_irq = DB1300_AC97_PEN_INT;
  652. return wm97xx_register_mach_ops(wm, &db1300_wm97xx_ops);
  653. }
  654. static struct platform_driver db1300_wm97xx_driver = {
  655. .driver.name = "wm97xx-touch",
  656. .driver.owner = THIS_MODULE,
  657. .probe = db1300_wm97xx_probe,
  658. };
  659. /**********************************************************************/
  660. static struct platform_device *db1300_dev[] __initdata = {
  661. &db1300_eth_dev,
  662. &db1300_i2c_dev,
  663. &db1300_5waysw_dev,
  664. &db1300_nand_dev,
  665. &db1300_ide_dev,
  666. &db1300_sd0_dev,
  667. &db1300_sd1_dev,
  668. &db1300_lcd_dev,
  669. &db1300_ac97_dev,
  670. &db1300_i2s_dev,
  671. &db1300_wm9715_dev,
  672. &db1300_ac97dma_dev,
  673. &db1300_i2sdma_dev,
  674. &db1300_sndac97_dev,
  675. &db1300_sndi2s_dev,
  676. };
  677. int __init db1300_dev_setup(void)
  678. {
  679. int swapped, cpldirq;
  680. struct clk *c;
  681. /* setup CPLD IRQ muxer */
  682. cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1);
  683. irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH);
  684. bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq);
  685. /* insert/eject IRQs: one always triggers so don't enable them
  686. * when doing request_irq() on them. DB1200 has this bug too.
  687. */
  688. irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN);
  689. irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN);
  690. irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN);
  691. irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN);
  692. /*
  693. * setup board
  694. */
  695. prom_get_ethernet_addr(&db1300_eth_config.mac[0]);
  696. i2c_register_board_info(0, db1300_i2c_devs,
  697. ARRAY_SIZE(db1300_i2c_devs));
  698. if (platform_driver_register(&db1300_wm97xx_driver))
  699. pr_warn("DB1300: failed to init touch pen irq support!\n");
  700. /* Audio PSC clock is supplied by codecs (PSC1, 2) */
  701. __raw_writel(PSC_SEL_CLK_SERCLK,
  702. (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
  703. wmb();
  704. __raw_writel(PSC_SEL_CLK_SERCLK,
  705. (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
  706. wmb();
  707. /* I2C driver wants 50MHz, get as close as possible */
  708. c = clk_get(NULL, "psc3_intclk");
  709. if (!IS_ERR(c)) {
  710. clk_set_rate(c, 50000000);
  711. clk_prepare_enable(c);
  712. clk_put(c);
  713. }
  714. __raw_writel(PSC_SEL_CLK_INTCLK,
  715. (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
  716. wmb();
  717. /* enable power to USB ports */
  718. bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR);
  719. /* although it is socket #0, it uses the CPLD bits which previous boards
  720. * have used for socket #1.
  721. */
  722. db1x_register_pcmcia_socket(
  723. AU1000_PCMCIA_ATTR_PHYS_ADDR,
  724. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1,
  725. AU1000_PCMCIA_MEM_PHYS_ADDR,
  726. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x00400000 - 1,
  727. AU1000_PCMCIA_IO_PHYS_ADDR,
  728. AU1000_PCMCIA_IO_PHYS_ADDR + 0x00010000 - 1,
  729. DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1);
  730. swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
  731. db1x_register_norflash(64 << 20, 2, swapped);
  732. return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
  733. }
  734. int __init db1300_board_setup(void)
  735. {
  736. unsigned short whoami;
  737. bcsr_init(DB1300_BCSR_PHYS_ADDR,
  738. DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS);
  739. whoami = bcsr_read(BCSR_WHOAMI);
  740. if (BCSR_WHOAMI_BOARD(whoami) != BCSR_WHOAMI_DB1300)
  741. return -ENODEV;
  742. db1300_gpio_config();
  743. printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t"
  744. "BoardID %d CPLD Rev %d DaughtercardID %d\n",
  745. BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami),
  746. BCSR_WHOAMI_DCID(whoami));
  747. /* enable UARTs, YAMON only enables #2 */
  748. alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
  749. alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
  750. alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);
  751. return 0;
  752. }