mvme16xhw.h 2.1 KB

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  1. #ifndef _M68K_MVME16xHW_H_
  2. #define _M68K_MVME16xHW_H_
  3. #include <asm/irq.h>
  4. typedef struct {
  5. u_char ack_icr,
  6. flt_icr,
  7. sel_icr,
  8. pe_icr,
  9. bsy_icr,
  10. spare1,
  11. isr,
  12. cr,
  13. spare2,
  14. spare3,
  15. spare4,
  16. data;
  17. } MVMElp, *MVMElpPtr;
  18. #define MVME_LPR_BASE 0xfff42030
  19. #define mvmelp ((*(volatile MVMElpPtr)(MVME_LPR_BASE)))
  20. typedef struct {
  21. unsigned char
  22. ctrl,
  23. bcd_sec,
  24. bcd_min,
  25. bcd_hr,
  26. bcd_dow,
  27. bcd_dom,
  28. bcd_mth,
  29. bcd_year;
  30. } MK48T08_t, *MK48T08ptr_t;
  31. #define RTC_WRITE 0x80
  32. #define RTC_READ 0x40
  33. #define RTC_STOP 0x20
  34. #define MVME_RTC_BASE 0xfffc1ff8
  35. #define MVME_I596_BASE 0xfff46000
  36. #define MVME_SCC_A_ADDR 0xfff45005
  37. #define MVME_SCC_B_ADDR 0xfff45001
  38. #define MVME_SCC_PCLK 10000000
  39. #define MVME162_IRQ_TYPE_PRIO 0
  40. #define MVME167_IRQ_PRN (IRQ_USER+20)
  41. #define MVME16x_IRQ_I596 (IRQ_USER+23)
  42. #define MVME16x_IRQ_SCSI (IRQ_USER+21)
  43. #define MVME16x_IRQ_FLY (IRQ_USER+63)
  44. #define MVME167_IRQ_SER_ERR (IRQ_USER+28)
  45. #define MVME167_IRQ_SER_MODEM (IRQ_USER+29)
  46. #define MVME167_IRQ_SER_TX (IRQ_USER+30)
  47. #define MVME167_IRQ_SER_RX (IRQ_USER+31)
  48. #define MVME16x_IRQ_TIMER (IRQ_USER+25)
  49. #define MVME167_IRQ_ABORT (IRQ_USER+46)
  50. #define MVME162_IRQ_ABORT (IRQ_USER+30)
  51. /* SCC interrupts, for MVME162 */
  52. #define MVME162_IRQ_SCC_BASE (IRQ_USER+0)
  53. #define MVME162_IRQ_SCCB_TX (IRQ_USER+0)
  54. #define MVME162_IRQ_SCCB_STAT (IRQ_USER+2)
  55. #define MVME162_IRQ_SCCB_RX (IRQ_USER+4)
  56. #define MVME162_IRQ_SCCB_SPCOND (IRQ_USER+6)
  57. #define MVME162_IRQ_SCCA_TX (IRQ_USER+8)
  58. #define MVME162_IRQ_SCCA_STAT (IRQ_USER+10)
  59. #define MVME162_IRQ_SCCA_RX (IRQ_USER+12)
  60. #define MVME162_IRQ_SCCA_SPCOND (IRQ_USER+14)
  61. /* MVME162 version register */
  62. #define MVME162_VERSION_REG 0xfff4202e
  63. extern unsigned short mvme16x_config;
  64. /* Lower 8 bits must match the revision register in the MC2 chip */
  65. #define MVME16x_CONFIG_SPEED_32 0x0001
  66. #define MVME16x_CONFIG_NO_VMECHIP2 0x0002
  67. #define MVME16x_CONFIG_NO_SCSICHIP 0x0004
  68. #define MVME16x_CONFIG_NO_ETHERNET 0x0008
  69. #define MVME16x_CONFIG_GOT_FPU 0x0010
  70. #define MVME16x_CONFIG_GOT_LP 0x0100
  71. #define MVME16x_CONFIG_GOT_CD2401 0x0200
  72. #define MVME16x_CONFIG_GOT_SCCA 0x0400
  73. #define MVME16x_CONFIG_GOT_SCCB 0x0800
  74. #endif