iomv.c 2.2 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2000-2003, 2006 Silicon Graphics, Inc. All rights reserved.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/acpi.h>
  10. #include <asm/io.h>
  11. #include <asm/delay.h>
  12. #include <asm/vga.h>
  13. #include <asm/sn/nodepda.h>
  14. #include <asm/sn/simulator.h>
  15. #include <asm/sn/pda.h>
  16. #include <asm/sn/sn_cpuid.h>
  17. #include <asm/sn/shub_mmr.h>
  18. #include <asm/sn/acpi.h>
  19. #define IS_LEGACY_VGA_IOPORT(p) \
  20. (((p) >= 0x3b0 && (p) <= 0x3bb) || ((p) >= 0x3c0 && (p) <= 0x3df))
  21. /**
  22. * sn_io_addr - convert an in/out port to an i/o address
  23. * @port: port to convert
  24. *
  25. * Legacy in/out instructions are converted to ld/st instructions
  26. * on IA64. This routine will convert a port number into a valid
  27. * SN i/o address. Used by sn_in*() and sn_out*().
  28. */
  29. void *sn_io_addr(unsigned long port)
  30. {
  31. if (!IS_RUNNING_ON_SIMULATOR()) {
  32. if (IS_LEGACY_VGA_IOPORT(port))
  33. return (__ia64_mk_io_addr(port));
  34. /* On sn2, legacy I/O ports don't point at anything */
  35. if (port < (64 * 1024))
  36. return NULL;
  37. if (SN_ACPI_BASE_SUPPORT())
  38. return (__ia64_mk_io_addr(port));
  39. else
  40. return ((void *)(port | __IA64_UNCACHED_OFFSET));
  41. } else {
  42. /* but the simulator uses them... */
  43. unsigned long addr;
  44. /*
  45. * word align port, but need more than 10 bits
  46. * for accessing registers in bedrock local block
  47. * (so we don't do port&0xfff)
  48. */
  49. addr = (is_shub2() ? 0xc00000028c000000UL : 0xc0000087cc000000UL) | ((port >> 2) << 12);
  50. if ((port >= 0x1f0 && port <= 0x1f7) || port == 0x3f6 || port == 0x3f7)
  51. addr |= port;
  52. return (void *)addr;
  53. }
  54. }
  55. EXPORT_SYMBOL(sn_io_addr);
  56. /**
  57. * __sn_mmiowb - I/O space memory barrier
  58. *
  59. * See arch/ia64/include/asm/io.h and Documentation/DocBook/deviceiobook.tmpl
  60. * for details.
  61. *
  62. * On SN2, we wait for the PIO_WRITE_STATUS SHub register to clear.
  63. * See PV 871084 for details about the WAR about zero value.
  64. *
  65. */
  66. void __sn_mmiowb(void)
  67. {
  68. volatile unsigned long *adr = pda->pio_write_status_addr;
  69. unsigned long val = pda->pio_write_status_val;
  70. while ((*adr & SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK) != val)
  71. cpu_relax();
  72. }
  73. EXPORT_SYMBOL(__sn_mmiowb);