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CHIP-linux-l...
/
arch
/
blackfin
/
mach-bf609
/
scb.c

scb.c 8.2 KB
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  1. /*
    2. 

  2.  * arch/blackfin/mach-common/scb-init.c - reprogram system cross bar priority
    3. 

  3.  *
    4. 

  4.  * Copyright 2012 Analog Devices Inc.
    5. 

  5.  *
    6. 

  6.  * Licensed under the GPL-2 or later.
    7. 

  7.  */
    8. 

  8. 

  9. #include <asm/blackfin.h>
    10. 

  10. #include <asm/scb.h>
    11. 

  11. 

  12. struct scb_mi_prio scb_data[] = {
    13. 

  13. #ifdef CONFIG_SCB0_MI0
    14. 

  14. 	{ REG_SCB0_ARBR0, REG_SCB0_ARBW0, 32, {
    15. 

  15. 		CONFIG_SCB0_MI0_SLOT0,
    16. 

  16. 		CONFIG_SCB0_MI0_SLOT1,
    17. 

  17. 		CONFIG_SCB0_MI0_SLOT2,
    18. 

  18. 		CONFIG_SCB0_MI0_SLOT3,
    19. 

  19. 		CONFIG_SCB0_MI0_SLOT4,
    20. 

  20. 		CONFIG_SCB0_MI0_SLOT5,
    21. 

  21. 		CONFIG_SCB0_MI0_SLOT6,
    22. 

  22. 		CONFIG_SCB0_MI0_SLOT7,
    23. 

  23. 		CONFIG_SCB0_MI0_SLOT8,
    24. 

  24. 		CONFIG_SCB0_MI0_SLOT9,
    25. 

  25. 		CONFIG_SCB0_MI0_SLOT10,
    26. 

  26. 		CONFIG_SCB0_MI0_SLOT11,
    27. 

  27. 		CONFIG_SCB0_MI0_SLOT12,
    28. 

  28. 		CONFIG_SCB0_MI0_SLOT13,
    29. 

  29. 		CONFIG_SCB0_MI0_SLOT14,
    30. 

  30. 		CONFIG_SCB0_MI0_SLOT15,
    31. 

  31. 		CONFIG_SCB0_MI0_SLOT16,
    32. 

  32. 		CONFIG_SCB0_MI0_SLOT17,
    33. 

  33. 		CONFIG_SCB0_MI0_SLOT18,
    34. 

  34. 		CONFIG_SCB0_MI0_SLOT19,
    35. 

  35. 		CONFIG_SCB0_MI0_SLOT20,
    36. 

  36. 		CONFIG_SCB0_MI0_SLOT21,
    37. 

  37. 		CONFIG_SCB0_MI0_SLOT22,
    38. 

  38. 		CONFIG_SCB0_MI0_SLOT23,
    39. 

  39. 		CONFIG_SCB0_MI0_SLOT24,
    40. 

  40. 		CONFIG_SCB0_MI0_SLOT25,
    41. 

  41. 		CONFIG_SCB0_MI0_SLOT26,
    42. 

  42. 		CONFIG_SCB0_MI0_SLOT27,
    43. 

  43. 		CONFIG_SCB0_MI0_SLOT28,
    44. 

  44. 		CONFIG_SCB0_MI0_SLOT29,
    45. 

  45. 		CONFIG_SCB0_MI0_SLOT30,
    46. 

  46. 		CONFIG_SCB0_MI0_SLOT31
    47. 

  47. 		},
    48. 

  48. 	},
    49. 

  49. #endif
    50. 

  50. #ifdef CONFIG_SCB0_MI1
    51. 

  51. 	{ REG_SCB0_ARBR1, REG_SCB0_ARBW1, 32, {
    52. 

  52. 		CONFIG_SCB0_MI1_SLOT0,
    53. 

  53. 		CONFIG_SCB0_MI1_SLOT1,
    54. 

  54. 		CONFIG_SCB0_MI1_SLOT2,
    55. 

  55. 		CONFIG_SCB0_MI1_SLOT3,
    56. 

  56. 		CONFIG_SCB0_MI1_SLOT4,
    57. 

  57. 		CONFIG_SCB0_MI1_SLOT5,
    58. 

  58. 		CONFIG_SCB0_MI1_SLOT6,
    59. 

  59. 		CONFIG_SCB0_MI1_SLOT7,
    60. 

  60. 		CONFIG_SCB0_MI1_SLOT8,
    61. 

  61. 		CONFIG_SCB0_MI1_SLOT9,
    62. 

  62. 		CONFIG_SCB0_MI1_SLOT10,
    63. 

  63. 		CONFIG_SCB0_MI1_SLOT11,
    64. 

  64. 		CONFIG_SCB0_MI1_SLOT12,
    65. 

  65. 		CONFIG_SCB0_MI1_SLOT13,
    66. 

  66. 		CONFIG_SCB0_MI1_SLOT14,
    67. 

  67. 		CONFIG_SCB0_MI1_SLOT15,
    68. 

  68. 		CONFIG_SCB0_MI1_SLOT16,
    69. 

  69. 		CONFIG_SCB0_MI1_SLOT17,
    70. 

  70. 		CONFIG_SCB0_MI1_SLOT18,
    71. 

  71. 		CONFIG_SCB0_MI1_SLOT19,
    72. 

  72. 		CONFIG_SCB0_MI1_SLOT20,
    73. 

  73. 		CONFIG_SCB0_MI1_SLOT21,
    74. 

  74. 		CONFIG_SCB0_MI1_SLOT22,
    75. 

  75. 		CONFIG_SCB0_MI1_SLOT23,
    76. 

  76. 		CONFIG_SCB0_MI1_SLOT24,
    77. 

  77. 		CONFIG_SCB0_MI1_SLOT25,
    78. 

  78. 		CONFIG_SCB0_MI1_SLOT26,
    79. 

  79. 		CONFIG_SCB0_MI1_SLOT27,
    80. 

  80. 		CONFIG_SCB0_MI1_SLOT28,
    81. 

  81. 		CONFIG_SCB0_MI1_SLOT29,
    82. 

  82. 		CONFIG_SCB0_MI1_SLOT30,
    83. 

  83. 		CONFIG_SCB0_MI1_SLOT31
    84. 

  84. 		},
    85. 

  85. 	},
    86. 

  86. #endif
    87. 

  87. #ifdef CONFIG_SCB0_MI2
    88. 

  88. 	{ REG_SCB0_ARBR2, REG_SCB0_ARBW2, 32, {
    89. 

  89. 		CONFIG_SCB0_MI2_SLOT0,
    90. 

  90. 		CONFIG_SCB0_MI2_SLOT1,
    91. 

  91. 		CONFIG_SCB0_MI2_SLOT2,
    92. 

  92. 		CONFIG_SCB0_MI2_SLOT3,
    93. 

  93. 		CONFIG_SCB0_MI2_SLOT4,
    94. 

  94. 		CONFIG_SCB0_MI2_SLOT5,
    95. 

  95. 		CONFIG_SCB0_MI2_SLOT6,
    96. 

  96. 		CONFIG_SCB0_MI2_SLOT7,
    97. 

  97. 		CONFIG_SCB0_MI2_SLOT8,
    98. 

  98. 		CONFIG_SCB0_MI2_SLOT9,
    99. 

  99. 		CONFIG_SCB0_MI2_SLOT10,
    100. 

  100. 		CONFIG_SCB0_MI2_SLOT11,
    101. 

  101. 		CONFIG_SCB0_MI2_SLOT12,
    102. 

  102. 		CONFIG_SCB0_MI2_SLOT13,
    103. 

  103. 		CONFIG_SCB0_MI2_SLOT14,
    104. 

  104. 		CONFIG_SCB0_MI2_SLOT15,
    105. 

  105. 		CONFIG_SCB0_MI2_SLOT16,
    106. 

  106. 		CONFIG_SCB0_MI2_SLOT17,
    107. 

  107. 		CONFIG_SCB0_MI2_SLOT18,
    108. 

  108. 		CONFIG_SCB0_MI2_SLOT19,
    109. 

  109. 		CONFIG_SCB0_MI2_SLOT20,
    110. 

  110. 		CONFIG_SCB0_MI2_SLOT21,
    111. 

  111. 		CONFIG_SCB0_MI2_SLOT22,
    112. 

  112. 		CONFIG_SCB0_MI2_SLOT23,
    113. 

  113. 		CONFIG_SCB0_MI2_SLOT24,
    114. 

  114. 		CONFIG_SCB0_MI2_SLOT25,
    115. 

  115. 		CONFIG_SCB0_MI2_SLOT26,
    116. 

  116. 		CONFIG_SCB0_MI2_SLOT27,
    117. 

  117. 		CONFIG_SCB0_MI2_SLOT28,
    118. 

  118. 		CONFIG_SCB0_MI2_SLOT29,
    119. 

  119. 		CONFIG_SCB0_MI2_SLOT30,
    120. 

  120. 		CONFIG_SCB0_MI2_SLOT31
    121. 

  121. 		},
    122. 

  122. 	},
    123. 

  123. #endif
    124. 

  124. #ifdef CONFIG_SCB0_MI3
    125. 

  125. 	{ REG_SCB0_ARBR3, REG_SCB0_ARBW3, 32, {
    126. 

  126. 		CONFIG_SCB0_MI3_SLOT0,
    127. 

  127. 		CONFIG_SCB0_MI3_SLOT1,
    128. 

  128. 		CONFIG_SCB0_MI3_SLOT2,
    129. 

  129. 		CONFIG_SCB0_MI3_SLOT3,
    130. 

  130. 		CONFIG_SCB0_MI3_SLOT4,
    131. 

  131. 		CONFIG_SCB0_MI3_SLOT5,
    132. 

  132. 		CONFIG_SCB0_MI3_SLOT6,
    133. 

  133. 		CONFIG_SCB0_MI3_SLOT7,
    134. 

  134. 		CONFIG_SCB0_MI3_SLOT8,
    135. 

  135. 		CONFIG_SCB0_MI3_SLOT9,
    136. 

  136. 		CONFIG_SCB0_MI3_SLOT10,
    137. 

  137. 		CONFIG_SCB0_MI3_SLOT11,
    138. 

  138. 		CONFIG_SCB0_MI3_SLOT12,
    139. 

  139. 		CONFIG_SCB0_MI3_SLOT13,
    140. 

  140. 		CONFIG_SCB0_MI3_SLOT14,
    141. 

  141. 		CONFIG_SCB0_MI3_SLOT15,
    142. 

  142. 		CONFIG_SCB0_MI3_SLOT16,
    143. 

  143. 		CONFIG_SCB0_MI3_SLOT17,
    144. 

  144. 		CONFIG_SCB0_MI3_SLOT18,
    145. 

  145. 		CONFIG_SCB0_MI3_SLOT19,
    146. 

  146. 		CONFIG_SCB0_MI3_SLOT20,
    147. 

  147. 		CONFIG_SCB0_MI3_SLOT21,
    148. 

  148. 		CONFIG_SCB0_MI3_SLOT22,
    149. 

  149. 		CONFIG_SCB0_MI3_SLOT23,
    150. 

  150. 		CONFIG_SCB0_MI3_SLOT24,
    151. 

  151. 		CONFIG_SCB0_MI3_SLOT25,
    152. 

  152. 		CONFIG_SCB0_MI3_SLOT26,
    153. 

  153. 		CONFIG_SCB0_MI3_SLOT27,
    154. 

  154. 		CONFIG_SCB0_MI3_SLOT28,
    155. 

  155. 		CONFIG_SCB0_MI3_SLOT29,
    156. 

  156. 		CONFIG_SCB0_MI3_SLOT30,
    157. 

  157. 		CONFIG_SCB0_MI3_SLOT31
    158. 

  158. 		},
    159. 

  159. 	},
    160. 

  160. #endif
    161. 

  161. #ifdef CONFIG_SCB0_MI4
    162. 

  162. 	{ REG_SCB0_ARBR4, REG_SCB4_ARBW0, 32, {
    163. 

  163. 		CONFIG_SCB0_MI4_SLOT0,
    164. 

  164. 		CONFIG_SCB0_MI4_SLOT1,
    165. 

  165. 		CONFIG_SCB0_MI4_SLOT2,
    166. 

  166. 		CONFIG_SCB0_MI4_SLOT3,
    167. 

  167. 		CONFIG_SCB0_MI4_SLOT4,
    168. 

  168. 		CONFIG_SCB0_MI4_SLOT5,
    169. 

  169. 		CONFIG_SCB0_MI4_SLOT6,
    170. 

  170. 		CONFIG_SCB0_MI4_SLOT7,
    171. 

  171. 		CONFIG_SCB0_MI4_SLOT8,
    172. 

  172. 		CONFIG_SCB0_MI4_SLOT9,
    173. 

  173. 		CONFIG_SCB0_MI4_SLOT10,
    174. 

  174. 		CONFIG_SCB0_MI4_SLOT11,
    175. 

  175. 		CONFIG_SCB0_MI4_SLOT12,
    176. 

  176. 		CONFIG_SCB0_MI4_SLOT13,
    177. 

  177. 		CONFIG_SCB0_MI4_SLOT14,
    178. 

  178. 		CONFIG_SCB0_MI4_SLOT15,
    179. 

  179. 		CONFIG_SCB0_MI4_SLOT16,
    180. 

  180. 		CONFIG_SCB0_MI4_SLOT17,
    181. 

  181. 		CONFIG_SCB0_MI4_SLOT18,
    182. 

  182. 		CONFIG_SCB0_MI4_SLOT19,
    183. 

  183. 		CONFIG_SCB0_MI4_SLOT20,
    184. 

  184. 		CONFIG_SCB0_MI4_SLOT21,
    185. 

  185. 		CONFIG_SCB0_MI4_SLOT22,
    186. 

  186. 		CONFIG_SCB0_MI4_SLOT23,
    187. 

  187. 		CONFIG_SCB0_MI4_SLOT24,
    188. 

  188. 		CONFIG_SCB0_MI4_SLOT25,
    189. 

  189. 		CONFIG_SCB0_MI4_SLOT26,
    190. 

  190. 		CONFIG_SCB0_MI4_SLOT27,
    191. 

  191. 		CONFIG_SCB0_MI4_SLOT28,
    192. 

  192. 		CONFIG_SCB0_MI4_SLOT29,
    193. 

  193. 		CONFIG_SCB0_MI4_SLOT30,
    194. 

  194. 		CONFIG_SCB0_MI4_SLOT31
    195. 

  195. 		},
    196. 

  196. 	},
    197. 

  197. #endif
    198. 

  198. #ifdef CONFIG_SCB0_MI5
    199. 

  199. 	{ REG_SCB0_ARBR5, REG_SCB0_ARBW5, 16, {
    200. 

  200. 		CONFIG_SCB0_MI5_SLOT0,
    201. 

  201. 		CONFIG_SCB0_MI5_SLOT1,
    202. 

  202. 		CONFIG_SCB0_MI5_SLOT2,
    203. 

  203. 		CONFIG_SCB0_MI5_SLOT3,
    204. 

  204. 		CONFIG_SCB0_MI5_SLOT4,
    205. 

  205. 		CONFIG_SCB0_MI5_SLOT5,
    206. 

  206. 		CONFIG_SCB0_MI5_SLOT6,
    207. 

  207. 		CONFIG_SCB0_MI5_SLOT7,
    208. 

  208. 		CONFIG_SCB0_MI5_SLOT8,
    209. 

  209. 		CONFIG_SCB0_MI5_SLOT9,
    210. 

  210. 		CONFIG_SCB0_MI5_SLOT10,
    211. 

  211. 		CONFIG_SCB0_MI5_SLOT11,
    212. 

  212. 		CONFIG_SCB0_MI5_SLOT12,
    213. 

  213. 		CONFIG_SCB0_MI5_SLOT13,
    214. 

  214. 		CONFIG_SCB0_MI5_SLOT14,
    215. 

  215. 		CONFIG_SCB0_MI5_SLOT15
    216. 

  216. 		},
    217. 

  217. 	},
    218. 

  218. #endif
    219. 

  219. #ifdef CONFIG_SCB1_MI0
    220. 

  220. 	{ REG_SCB1_ARBR0, REG_SCB1_ARBW0, 20, {
    221. 

  221. 		CONFIG_SCB1_MI0_SLOT0,
    222. 

  222. 		CONFIG_SCB1_MI0_SLOT1,
    223. 

  223. 		CONFIG_SCB1_MI0_SLOT2,
    224. 

  224. 		CONFIG_SCB1_MI0_SLOT3,
    225. 

  225. 		CONFIG_SCB1_MI0_SLOT4,
    226. 

  226. 		CONFIG_SCB1_MI0_SLOT5,
    227. 

  227. 		CONFIG_SCB1_MI0_SLOT6,
    228. 

  228. 		CONFIG_SCB1_MI0_SLOT7,
    229. 

  229. 		CONFIG_SCB1_MI0_SLOT8,
    230. 

  230. 		CONFIG_SCB1_MI0_SLOT9,
    231. 

  231. 		CONFIG_SCB1_MI0_SLOT10,
    232. 

  232. 		CONFIG_SCB1_MI0_SLOT11,
    233. 

  233. 		CONFIG_SCB1_MI0_SLOT12,
    234. 

  234. 		CONFIG_SCB1_MI0_SLOT13,
    235. 

  235. 		CONFIG_SCB1_MI0_SLOT14,
    236. 

  236. 		CONFIG_SCB1_MI0_SLOT15,
    237. 

  237. 		CONFIG_SCB1_MI0_SLOT16,
    238. 

  238. 		CONFIG_SCB1_MI0_SLOT17,
    239. 

  239. 		CONFIG_SCB1_MI0_SLOT18,
    240. 

  240. 		CONFIG_SCB1_MI0_SLOT19
    241. 

  241. 		},
    242. 

  242. 	},
    243. 

  243. #endif
    244. 

  244. #ifdef CONFIG_SCB2_MI0
    245. 

  245. 	{ REG_SCB2_ARBR0, REG_SCB2_ARBW0, 10, {
    246. 

  246. 		CONFIG_SCB2_MI0_SLOT0,
    247. 

  247. 		CONFIG_SCB2_MI0_SLOT1,
    248. 

  248. 		CONFIG_SCB2_MI0_SLOT2,
    249. 

  249. 		CONFIG_SCB2_MI0_SLOT3,
    250. 

  250. 		CONFIG_SCB2_MI0_SLOT4,
    251. 

  251. 		CONFIG_SCB2_MI0_SLOT5,
    252. 

  252. 		CONFIG_SCB2_MI0_SLOT6,
    253. 

  253. 		CONFIG_SCB2_MI0_SLOT7,
    254. 

  254. 		CONFIG_SCB2_MI0_SLOT8,
    255. 

  255. 		CONFIG_SCB2_MI0_SLOT9
    256. 

  256. 		},
    257. 

  257. 	},
    258. 

  258. #endif
    259. 

  259. #ifdef CONFIG_SCB3_MI0
    260. 

  260. 	{ REG_SCB3_ARBR0, REG_SCB3_ARBW0, 16, {
    261. 

  261. 		CONFIG_SCB3_MI0_SLOT0,
    262. 

  262. 		CONFIG_SCB3_MI0_SLOT1,
    263. 

  263. 		CONFIG_SCB3_MI0_SLOT2,
    264. 

  264. 		CONFIG_SCB3_MI0_SLOT3,
    265. 

  265. 		CONFIG_SCB3_MI0_SLOT4,
    266. 

  266. 		CONFIG_SCB3_MI0_SLOT5,
    267. 

  267. 		CONFIG_SCB3_MI0_SLOT6,
    268. 

  268. 		CONFIG_SCB3_MI0_SLOT7,
    269. 

  269. 		CONFIG_SCB3_MI0_SLOT8,
    270. 

  270. 		CONFIG_SCB3_MI0_SLOT9,
    271. 

  271. 		CONFIG_SCB3_MI0_SLOT10,
    272. 

  272. 		CONFIG_SCB3_MI0_SLOT11,
    273. 

  273. 		CONFIG_SCB3_MI0_SLOT12,
    274. 

  274. 		CONFIG_SCB3_MI0_SLOT13,
    275. 

  275. 		CONFIG_SCB3_MI0_SLOT14,
    276. 

  276. 		CONFIG_SCB3_MI0_SLOT15
    277. 

  277. 		},
    278. 

  278. 	},
    279. 

  279. #endif
    280. 

  280. #ifdef CONFIG_SCB4_MI0
    281. 

  281. 	{ REG_SCB4_ARBR0, REG_SCB4_ARBW0, 16, {
    282. 

  282. 		CONFIG_SCB4_MI0_SLOT0,
    283. 

  283. 		CONFIG_SCB4_MI0_SLOT1,
    284. 

  284. 		CONFIG_SCB4_MI0_SLOT2,
    285. 

  285. 		CONFIG_SCB4_MI0_SLOT3,
    286. 

  286. 		CONFIG_SCB4_MI0_SLOT4,
    287. 

  287. 		CONFIG_SCB4_MI0_SLOT5,
    288. 

  288. 		CONFIG_SCB4_MI0_SLOT6,
    289. 

  289. 		CONFIG_SCB4_MI0_SLOT7,
    290. 

  290. 		CONFIG_SCB4_MI0_SLOT8,
    291. 

  291. 		CONFIG_SCB4_MI0_SLOT9,
    292. 

  292. 		CONFIG_SCB4_MI0_SLOT10,
    293. 

  293. 		CONFIG_SCB4_MI0_SLOT11,
    294. 

  294. 		CONFIG_SCB4_MI0_SLOT12,
    295. 

  295. 		CONFIG_SCB4_MI0_SLOT13,
    296. 

  296. 		CONFIG_SCB4_MI0_SLOT14,
    297. 

  297. 		CONFIG_SCB4_MI0_SLOT15
    298. 

  298. 		},
    299. 

  299. 	},
    300. 

  300. #endif
    301. 

  301. #ifdef CONFIG_SCB5_MI0
    302. 

  302. 	{ REG_SCB5_ARBR0, REG_SCB5_ARBW0, 8, {
    303. 

  303. 		CONFIG_SCB5_MI0_SLOT0,
    304. 

  304. 		CONFIG_SCB5_MI0_SLOT1,
    305. 

  305. 		CONFIG_SCB5_MI0_SLOT2,
    306. 

  306. 		CONFIG_SCB5_MI0_SLOT3,
    307. 

  307. 		CONFIG_SCB5_MI0_SLOT4,
    308. 

  308. 		CONFIG_SCB5_MI0_SLOT5,
    309. 

  309. 		CONFIG_SCB5_MI0_SLOT6,
    310. 

  310. 		CONFIG_SCB5_MI0_SLOT7
    311. 

  311. 		},
    312. 

  312. 	},
    313. 

  313. #endif
    314. 

  314. #ifdef CONFIG_SCB6_MI0
    315. 

  315. 	{ REG_SCB6_ARBR0, REG_SCB6_ARBW0, 4, {
    316. 

  316. 		CONFIG_SCB6_MI0_SLOT0,
    317. 

  317. 		CONFIG_SCB6_MI0_SLOT1,
    318. 

  318. 		CONFIG_SCB6_MI0_SLOT2,
    319. 

  319. 		CONFIG_SCB6_MI0_SLOT3
    320. 

  320. 		},
    321. 

  321. 	},
    322. 

  322. #endif
    323. 

  323. #ifdef CONFIG_SCB7_MI0
    324. 

  324. 	{ REG_SCB7_ARBR0, REG_SCB7_ARBW0, 6, {
    325. 

  325. 		CONFIG_SCB7_MI0_SLOT0,
    326. 

  326. 		CONFIG_SCB7_MI0_SLOT1,
    327. 

  327. 		CONFIG_SCB7_MI0_SLOT2,
    328. 

  328. 		CONFIG_SCB7_MI0_SLOT3,
    329. 

  329. 		CONFIG_SCB7_MI0_SLOT4,
    330. 

  330. 		CONFIG_SCB7_MI0_SLOT5
    331. 

  331. 		},
    332. 

  332. 	},
    333. 

  333. #endif
    334. 

  334. #ifdef CONFIG_SCB8_MI0
    335. 

  335. 	{ REG_SCB8_ARBR0, REG_SCB8_ARBW0, 8, {
    336. 

  336. 		CONFIG_SCB8_MI0_SLOT0,
    337. 

  337. 		CONFIG_SCB8_MI0_SLOT1,
    338. 

  338. 		CONFIG_SCB8_MI0_SLOT2,
    339. 

  339. 		CONFIG_SCB8_MI0_SLOT3,
    340. 

  340. 		CONFIG_SCB8_MI0_SLOT4,
    341. 

  341. 		CONFIG_SCB8_MI0_SLOT5,
    342. 

  342. 		CONFIG_SCB8_MI0_SLOT6,
    343. 

  343. 		CONFIG_SCB8_MI0_SLOT7
    344. 

  344. 		},
    345. 

  345. 	},
    346. 

  346. #endif
    347. 

  347. #ifdef CONFIG_SCB9_MI0
    348. 

  348. 	{ REG_SCB9_ARBR0, REG_SCB9_ARBW0, 10, {
    349. 

  349. 		CONFIG_SCB9_MI0_SLOT0,
    350. 

  350. 		CONFIG_SCB9_MI0_SLOT1,
    351. 

  351. 		CONFIG_SCB9_MI0_SLOT2,
    352. 

  352. 		CONFIG_SCB9_MI0_SLOT3,
    353. 

  353. 		CONFIG_SCB9_MI0_SLOT4,
    354. 

  354. 		CONFIG_SCB9_MI0_SLOT5,
    355. 

  355. 		CONFIG_SCB9_MI0_SLOT6,
    356. 

  356. 		CONFIG_SCB9_MI0_SLOT7,
    357. 

  357. 		CONFIG_SCB9_MI0_SLOT8,
    358. 

  358. 		CONFIG_SCB9_MI0_SLOT9
    359. 

  359. 		},
    360. 

  360. 	},
    361. 

  361. #endif
    362. 

  362. 	{ 0, }
    363. 

  363. };
    364. 

  364.