dwc3.txt 2.3 KB

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  1. synopsys DWC3 CORE
  2. DWC3- USB3 CONTROLLER
  3. Required properties:
  4. - compatible: must be "snps,dwc3"
  5. - reg : Address and length of the register set for the device
  6. - interrupts: Interrupts used by the dwc3 controller.
  7. Optional properties:
  8. - usb-phy : array of phandle for the PHY device. The first element
  9. in the array is expected to be a handle to the USB2/HS PHY and
  10. the second element is expected to be a handle to the USB3/SS PHY
  11. - phys: from the *Generic PHY* bindings
  12. - phy-names: from the *Generic PHY* bindings
  13. - tx-fifo-resize: determines if the FIFO *has* to be reallocated.
  14. - snps,usb3_lpm_capable: determines if platform is USB3 LPM capable
  15. - snps,disable_scramble_quirk: true when SW should disable data scrambling.
  16. Only really useful for FPGA builds.
  17. - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
  18. - snps,lpm-nyet-threshold: LPM NYET threshold
  19. - snps,u2exit_lfps_quirk: set if we want to enable u2exit lfps quirk
  20. - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
  21. - snps,req_p1p2p3_quirk: when set, the core will always request for
  22. P1/P2/P3 transition sequence.
  23. - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
  24. amount of 8B10B errors occur.
  25. - snps,del_phy_power_chg_quirk: when set core will delay PHY power change
  26. from P0 to P1/P2/P3.
  27. - snps,lfps_filter_quirk: when set core will filter LFPS reception.
  28. - snps,rx_detect_poll_quirk: when set core will disable a 400us delay to start
  29. Polling LFPS after RX.Detect.
  30. - snps,tx_de_emphasis_quirk: when set core will set Tx de-emphasis value.
  31. - snps,tx_de_emphasis: the value driven to the PHY is controlled by the
  32. LTSSM during USB3 Compliance mode.
  33. - snps,dis_u3_susphy_quirk: when set core will disable USB3 suspend phy.
  34. - snps,dis_u2_susphy_quirk: when set core will disable USB2 suspend phy.
  35. - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
  36. utmi_l1_suspend_n, false when asserts utmi_sleep_n
  37. - snps,hird-threshold: HIRD threshold
  38. - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for
  39. UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3.
  40. This is usually a subnode to DWC3 glue to which it is connected.
  41. dwc3@4a030000 {
  42. compatible = "snps,dwc3";
  43. reg = <0x4a030000 0xcfff>;
  44. interrupts = <0 92 4>
  45. usb-phy = <&usb2_phy>, <&usb3,phy>;
  46. tx-fifo-resize;
  47. };