sdhci-msm.txt 1.7 KB

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  1. * Qualcomm SDHCI controller (sdhci-msm)
  2. This file documents differences between the core properties in mmc.txt
  3. and the properties used by the sdhci-msm driver.
  4. Required properties:
  5. - compatible: Should contain "qcom,sdhci-msm-v4".
  6. - reg: Base address and length of the register in the following order:
  7. - Host controller register map (required)
  8. - SD Core register map (required)
  9. - interrupts: Should contain an interrupt-specifiers for the interrupts:
  10. - Host controller interrupt (required)
  11. - pinctrl-names: Should contain only one value - "default".
  12. - pinctrl-0: Should specify pin control groups used for this controller.
  13. - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
  14. - clock-names: Should contain the following:
  15. "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
  16. "core" - SDC MMC clock (MCLK) (required)
  17. "bus" - SDCC bus voter clock (optional)
  18. Example:
  19. sdhc_1: sdhci@f9824900 {
  20. compatible = "qcom,sdhci-msm-v4";
  21. reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
  22. interrupts = <0 123 0>;
  23. bus-width = <8>;
  24. non-removable;
  25. vmmc-supply = <&pm8941_l20>;
  26. vqmmc-supply = <&pm8941_s3>;
  27. pinctrl-names = "default";
  28. pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_data>;
  29. clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
  30. clock-names = "core", "iface";
  31. };
  32. sdhc_2: sdhci@f98a4900 {
  33. compatible = "qcom,sdhci-msm-v4";
  34. reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
  35. interrupts = <0 125 0>;
  36. bus-width = <4>;
  37. cd-gpios = <&msmgpio 62 0x1>;
  38. vmmc-supply = <&pm8941_l21>;
  39. vqmmc-supply = <&pm8941_l13>;
  40. pinctrl-names = "default";
  41. pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data>;
  42. clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
  43. clock-names = "core", "iface";
  44. };