timer.txt 1.6 KB

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  1. OMAP Timer bindings
  2. Required properties:
  3. - compatible: Should be set to one of the below. Please note that
  4. OMAP44xx devices have timer instances that are 100%
  5. register compatible with OMAP3xxx devices as well as
  6. newer timers that are not 100% register compatible.
  7. So for OMAP44xx devices timer instances may use
  8. different compatible strings.
  9. ti,omap2420-timer (applicable to OMAP24xx devices)
  10. ti,omap3430-timer (applicable to OMAP3xxx/44xx devices)
  11. ti,omap4430-timer (applicable to OMAP44xx devices)
  12. ti,omap5430-timer (applicable to OMAP543x devices)
  13. ti,am335x-timer (applicable to AM335x devices)
  14. ti,am335x-timer-1ms (applicable to AM335x devices)
  15. - reg: Contains timer register address range (base address and
  16. length).
  17. - interrupts: Contains the interrupt information for the timer. The
  18. format is being dependent on which interrupt controller
  19. the OMAP device uses.
  20. - ti,hwmods: Name of the hwmod associated to the timer, "timer<X>",
  21. where <X> is the instance number of the timer from the
  22. HW spec.
  23. Optional properties:
  24. - ti,timer-alwon: Indicates the timer is in an alway-on power domain.
  25. - ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
  26. addition to the ARM CPU.
  27. - ti,timer-pwm: Indicates the timer can generate a PWM output.
  28. - ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
  29. and therefore cannot be used by the kernel.
  30. Example:
  31. timer12: timer@48304000 {
  32. compatible = "ti,omap3430-timer";
  33. reg = <0x48304000 0x400>;
  34. interrupts = <95>;
  35. ti,hwmods = "timer12"
  36. ti,timer-alwon;
  37. ti,timer-secure;
  38. };