intc.txt 2.1 KB

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  1. * Marvell MMP Interrupt controller
  2. Required properties:
  3. - compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or
  4. "mrvl,mmp2-mux-intc"
  5. - reg : Address and length of the register set of the interrupt controller.
  6. If the interrupt controller is intc, address and length means the range
  7. of the whold interrupt controller. If the interrupt controller is mux-intc,
  8. address and length means one register. Since address of mux-intc is in the
  9. range of intc. mux-intc is secondary interrupt controller.
  10. - reg-names : Name of the register set of the interrupt controller. It's
  11. only required in mux-intc interrupt controller.
  12. - interrupts : Should be the port interrupt shared by mux interrupts. It's
  13. only required in mux-intc interrupt controller.
  14. - interrupt-controller : Identifies the node as an interrupt controller.
  15. - #interrupt-cells : Specifies the number of cells needed to encode an
  16. interrupt source.
  17. - mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt
  18. controller.
  19. - mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge
  20. detection first.
  21. Example:
  22. intc: interrupt-controller@d4282000 {
  23. compatible = "mrvl,mmp2-intc";
  24. interrupt-controller;
  25. #interrupt-cells = <1>;
  26. reg = <0xd4282000 0x1000>;
  27. mrvl,intc-nr-irqs = <64>;
  28. };
  29. intcmux4@d4282150 {
  30. compatible = "mrvl,mmp2-mux-intc";
  31. interrupts = <4>;
  32. interrupt-controller;
  33. #interrupt-cells = <1>;
  34. reg = <0x150 0x4>, <0x168 0x4>;
  35. reg-names = "mux status", "mux mask";
  36. mrvl,intc-nr-irqs = <2>;
  37. };
  38. * Marvell Orion Interrupt controller
  39. Required properties
  40. - compatible : Should be "marvell,orion-intc".
  41. - #interrupt-cells: Specifies the number of cells needed to encode an
  42. interrupt source. Supported value is <1>.
  43. - interrupt-controller : Declare this node to be an interrupt controller.
  44. - reg : Interrupt mask address. A list of 4 byte ranges, one per controller.
  45. One entry in the list represents 32 interrupts.
  46. Example:
  47. intc: interrupt-controller {
  48. compatible = "marvell,orion-intc", "marvell,intc";
  49. interrupt-controller;
  50. #interrupt-cells = <1>;
  51. reg = <0xfed20204 0x04>,
  52. <0xfed20214 0x04>;
  53. };