mediatek,infracfg.txt 879 B

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  1. Mediatek infracfg controller
  2. ============================
  3. The Mediatek infracfg controller provides various clocks and reset
  4. outputs to the system.
  5. Required Properties:
  6. - compatible: Should be:
  7. - "mediatek,mt8135-infracfg", "syscon"
  8. - "mediatek,mt8173-infracfg", "syscon"
  9. - #clock-cells: Must be 1
  10. - #reset-cells: Must be 1
  11. The infracfg controller uses the common clk binding from
  12. Documentation/devicetree/bindings/clock/clock-bindings.txt
  13. The available clocks are defined in dt-bindings/clock/mt*-clk.h.
  14. Also it uses the common reset controller binding from
  15. Documentation/devicetree/bindings/reset/reset.txt.
  16. The available reset outputs are defined in
  17. dt-bindings/reset-controller/mt*-resets.h
  18. Example:
  19. infracfg: power-controller@10001000 {
  20. compatible = "mediatek,mt8173-infracfg", "syscon";
  21. reg = <0 0x10001000 0 0x1000>;
  22. #clock-cells = <1>;
  23. #reset-cells = <1>;
  24. };