atmel-at91.txt 4.7 KB

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  1. Atmel AT91 device tree bindings.
  2. ================================
  3. Boards with a SoC of the Atmel AT91 or SMART family shall have the following
  4. properties:
  5. Required root node properties:
  6. compatible: must be one of:
  7. * "atmel,at91rm9200"
  8. * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
  9. the specific SoC family or compatible:
  10. o "atmel,at91sam9260"
  11. o "atmel,at91sam9261"
  12. o "atmel,at91sam9263"
  13. o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
  14. SoC compatible:
  15. - "atmel,at91sam9g15"
  16. - "atmel,at91sam9g25"
  17. - "atmel,at91sam9g35"
  18. - "atmel,at91sam9x25"
  19. - "atmel,at91sam9x35"
  20. o "atmel,at91sam9g20"
  21. o "atmel,at91sam9g45"
  22. o "atmel,at91sam9n12"
  23. o "atmel,at91sam9rl"
  24. o "atmel,at91sam9xe"
  25. * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
  26. SoC family:
  27. o "atmel,sama5d3" shall be extended with the specific SoC compatible:
  28. - "atmel,sama5d31"
  29. - "atmel,sama5d33"
  30. - "atmel,sama5d34"
  31. - "atmel,sama5d35"
  32. - "atmel,sama5d36"
  33. o "atmel,sama5d4" shall be extended with the specific SoC compatible:
  34. - "atmel,sama5d41"
  35. - "atmel,sama5d42"
  36. - "atmel,sama5d43"
  37. - "atmel,sama5d44"
  38. PIT Timer required properties:
  39. - compatible: Should be "atmel,at91sam9260-pit"
  40. - reg: Should contain registers location and length
  41. - interrupts: Should contain interrupt for the PIT which is the IRQ line
  42. shared across all System Controller members.
  43. System Timer (ST) required properties:
  44. - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
  45. - reg: Should contain registers location and length
  46. - interrupts: Should contain interrupt for the ST which is the IRQ line
  47. shared across all System Controller members.
  48. Its subnodes can be:
  49. - watchdog: compatible should be "atmel,at91rm9200-wdt"
  50. TC/TCLIB Timer required properties:
  51. - compatible: Should be "atmel,<chip>-tcb".
  52. <chip> can be "at91rm9200" or "at91sam9x5"
  53. - reg: Should contain registers location and length
  54. - interrupts: Should contain all interrupts for the TC block
  55. Note that you can specify several interrupt cells if the TC
  56. block has one interrupt per channel.
  57. - clock-names: tuple listing input clock names.
  58. Required elements: "t0_clk"
  59. Optional elements: "t1_clk", "t2_clk"
  60. - clocks: phandles to input clocks.
  61. Examples:
  62. One interrupt per TC block:
  63. tcb0: timer@fff7c000 {
  64. compatible = "atmel,at91rm9200-tcb";
  65. reg = <0xfff7c000 0x100>;
  66. interrupts = <18 4>;
  67. clocks = <&tcb0_clk>;
  68. clock-names = "t0_clk";
  69. };
  70. One interrupt per TC channel in a TC block:
  71. tcb1: timer@fffdc000 {
  72. compatible = "atmel,at91rm9200-tcb";
  73. reg = <0xfffdc000 0x100>;
  74. interrupts = <26 4 27 4 28 4>;
  75. clocks = <&tcb1_clk>;
  76. clock-names = "t0_clk";
  77. };
  78. RSTC Reset Controller required properties:
  79. - compatible: Should be "atmel,<chip>-rstc".
  80. <chip> can be "at91sam9260" or "at91sam9g45"
  81. - reg: Should contain registers location and length
  82. Example:
  83. rstc@fffffd00 {
  84. compatible = "atmel,at91sam9260-rstc";
  85. reg = <0xfffffd00 0x10>;
  86. };
  87. RAMC SDRAM/DDR Controller required properties:
  88. - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
  89. "atmel,at91sam9260-sdramc",
  90. "atmel,at91sam9g45-ddramc",
  91. "atmel,sama5d3-ddramc",
  92. - reg: Should contain registers location and length
  93. Examples:
  94. ramc0: ramc@ffffe800 {
  95. compatible = "atmel,at91sam9g45-ddramc";
  96. reg = <0xffffe800 0x200>;
  97. };
  98. SHDWC Shutdown Controller
  99. required properties:
  100. - compatible: Should be "atmel,<chip>-shdwc".
  101. <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
  102. - reg: Should contain registers location and length
  103. optional properties:
  104. - atmel,wakeup-mode: String, operation mode of the wakeup mode.
  105. Supported values are: "none", "high", "low", "any".
  106. - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
  107. optional at91sam9260 properties:
  108. - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
  109. optional at91sam9rl properties:
  110. - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
  111. - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
  112. optional at91sam9x5 properties:
  113. - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
  114. Example:
  115. rstc@fffffd00 {
  116. compatible = "atmel,at91sam9260-rstc";
  117. reg = <0xfffffd00 0x10>;
  118. };
  119. Special Function Registers (SFR)
  120. Special Function Registers (SFR) manage specific aspects of the integrated
  121. memory, bridge implementations, processor and other functionality not controlled
  122. elsewhere.
  123. required properties:
  124. - compatible: Should be "atmel,<chip>-sfr", "syscon".
  125. <chip> can be "sama5d3" or "sama5d4".
  126. - reg: Should contain registers location and length
  127. sfr@f0038000 {
  128. compatible = "atmel,sama5d3-sfr", "syscon";
  129. reg = <0xf0038000 0x60>;
  130. };