fup-boolean.awlpro 148 KB

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  1. <?xml version="1.0" encoding="UTF-8" standalone="yes"?>
  2. <!-- Awlsim project file generated by awlsim-0.66.0-pre -->
  3. <awlsim_project date_create="2012-08-13 00:00:00.000000"
  4. date_modify="2018-07-08 18:00:23.429434"
  5. format_version="1">
  6. <!-- CPU core configuration -->
  7. <cpu>
  8. <!-- CPU core feature specification -->
  9. <specs call_stack_size="256"
  10. nr_accus="2"
  11. nr_counters="256"
  12. nr_flags="2048"
  13. nr_inputs="128"
  14. nr_localbytes="1024"
  15. nr_outputs="128"
  16. nr_timers="256"
  17. parenthesis_stack_size="7" />
  18. <!-- CPU core configuration -->
  19. <config clock_memory_byte="-1"
  20. cycle_time_limit_us="1000000"
  21. ext_insns_enable="1"
  22. mnemonics="2"
  23. ob_startinfo_enable="0"
  24. run_time_limit_us="-1" />
  25. </cpu>
  26. <!-- AWL/STL language configuration -->
  27. <language_awl>
  28. <!-- AWL/STL source code -->
  29. <source enabled="1"
  30. name="Main"
  31. type="0"><![CDATA[
  32. ORGANIZATION_BLOCK OB 1
  33. BEGIN
  34. CALL "FC_TEST_assign"
  35. CALL "FC_TEST_and_and_or"
  36. CALL "FC_TEST_branch"
  37. CALL "FC_TEST_not_1"
  38. CALL "FC_TEST_not_2"
  39. CALL "FC_TEST_sr_1"
  40. CALL "FC_TEST_sr_2"
  41. CALL "FC_TEST_sr_3"
  42. CALL "FC_TEST_sr_4"
  43. CALL "FC_TEST_sr_5"
  44. CALL "FC_TEST_sr_6"
  45. CALL "FC_TEST_edge_1"
  46. CALL "FC_TEST_edge_2"
  47. CALL SFC 46 // STOP CPU
  48. END_ORGANIZATION_BLOCK
  49. ]]></source>
  50. <!-- AWL/STL source code -->
  51. <source enabled="1"
  52. name="TEST assign"
  53. type="0"><![CDATA[
  54. FUNCTION "FC_TEST_assign" : VOID
  55. BEGIN
  56. // Test: "FC_assign"
  57. // Equations:
  58. // OUT0 = IN0 * IN1
  59. // OUT1 = IN0 * IN1
  60. // OUT2 = IN0 * IN1
  61. CALL "FC_assign" (
  62. IN0 := FALSE,
  63. IN1 := FALSE,
  64. OUT0 := M 0.0,
  65. OUT1 := M 0.1,
  66. OUT2 := M 0.2,
  67. )
  68. __ASSERT== M 0.0, FALSE
  69. __ASSERT== M 0.1, FALSE
  70. __ASSERT== M 0.2, FALSE
  71. CALL "FC_assign" (
  72. IN0 := TRUE,
  73. IN1 := FALSE,
  74. OUT0 := M 0.0,
  75. OUT1 := M 0.1,
  76. OUT2 := M 0.2,
  77. )
  78. __ASSERT== M 0.0, FALSE
  79. __ASSERT== M 0.1, FALSE
  80. __ASSERT== M 0.2, FALSE
  81. CALL "FC_assign" (
  82. IN0 := FALSE,
  83. IN1 := TRUE,
  84. OUT0 := M 0.0,
  85. OUT1 := M 0.1,
  86. OUT2 := M 0.2,
  87. )
  88. __ASSERT== M 0.0, FALSE
  89. __ASSERT== M 0.1, FALSE
  90. __ASSERT== M 0.2, FALSE
  91. CALL "FC_assign" (
  92. IN0 := TRUE,
  93. IN1 := TRUE,
  94. OUT0 := M 0.0,
  95. OUT1 := M 0.1,
  96. OUT2 := M 0.2,
  97. )
  98. __ASSERT== M 0.0, TRUE
  99. __ASSERT== M 0.1, TRUE
  100. __ASSERT== M 0.2, TRUE
  101. BE
  102. END_FUNCTION
  103. ]]></source>
  104. <!-- AWL/STL source code -->
  105. <source enabled="1"
  106. name="TEST and_and_or"
  107. type="0"><![CDATA[
  108. FUNCTION "FC_TEST_and_and_or" : VOID
  109. BEGIN
  110. // Test: "FC_and_and_or"
  111. // Equations:
  112. // RET_VAL = (INP0 * INP1) + (INP2 * INP3)
  113. CALL "FC_and_and_or" (
  114. INP0 := FALSE,
  115. INP1 := FALSE,
  116. INP2 := FALSE,
  117. INP3 := FALSE,
  118. RET_VAL := M 0.0,
  119. )
  120. __ASSERT== M 0.0, FALSE
  121. CALL "FC_and_and_or" (
  122. INP0 := TRUE,
  123. INP1 := FALSE,
  124. INP2 := FALSE,
  125. INP3 := FALSE,
  126. RET_VAL := M 0.0,
  127. )
  128. __ASSERT== M 0.0, FALSE
  129. CALL "FC_and_and_or" (
  130. INP0 := FALSE,
  131. INP1 := TRUE,
  132. INP2 := FALSE,
  133. INP3 := FALSE,
  134. RET_VAL := M 0.0,
  135. )
  136. __ASSERT== M 0.0, FALSE
  137. CALL "FC_and_and_or" (
  138. INP0 := TRUE,
  139. INP1 := TRUE,
  140. INP2 := FALSE,
  141. INP3 := FALSE,
  142. RET_VAL := M 0.0,
  143. )
  144. __ASSERT== M 0.0, TRUE
  145. CALL "FC_and_and_or" (
  146. INP0 := FALSE,
  147. INP1 := FALSE,
  148. INP2 := TRUE,
  149. INP3 := FALSE,
  150. RET_VAL := M 0.0,
  151. )
  152. __ASSERT== M 0.0, FALSE
  153. CALL "FC_and_and_or" (
  154. INP0 := TRUE,
  155. INP1 := FALSE,
  156. INP2 := TRUE,
  157. INP3 := FALSE,
  158. RET_VAL := M 0.0,
  159. )
  160. __ASSERT== M 0.0, FALSE
  161. CALL "FC_and_and_or" (
  162. INP0 := FALSE,
  163. INP1 := TRUE,
  164. INP2 := TRUE,
  165. INP3 := FALSE,
  166. RET_VAL := M 0.0,
  167. )
  168. __ASSERT== M 0.0, FALSE
  169. CALL "FC_and_and_or" (
  170. INP0 := TRUE,
  171. INP1 := TRUE,
  172. INP2 := TRUE,
  173. INP3 := FALSE,
  174. RET_VAL := M 0.0,
  175. )
  176. __ASSERT== M 0.0, TRUE
  177. CALL "FC_and_and_or" (
  178. INP0 := FALSE,
  179. INP1 := FALSE,
  180. INP2 := FALSE,
  181. INP3 := TRUE,
  182. RET_VAL := M 0.0,
  183. )
  184. __ASSERT== M 0.0, FALSE
  185. CALL "FC_and_and_or" (
  186. INP0 := TRUE,
  187. INP1 := FALSE,
  188. INP2 := FALSE,
  189. INP3 := TRUE,
  190. RET_VAL := M 0.0,
  191. )
  192. __ASSERT== M 0.0, FALSE
  193. CALL "FC_and_and_or" (
  194. INP0 := FALSE,
  195. INP1 := TRUE,
  196. INP2 := FALSE,
  197. INP3 := TRUE,
  198. RET_VAL := M 0.0,
  199. )
  200. __ASSERT== M 0.0, FALSE
  201. CALL "FC_and_and_or" (
  202. INP0 := TRUE,
  203. INP1 := TRUE,
  204. INP2 := FALSE,
  205. INP3 := TRUE,
  206. RET_VAL := M 0.0,
  207. )
  208. __ASSERT== M 0.0, TRUE
  209. CALL "FC_and_and_or" (
  210. INP0 := FALSE,
  211. INP1 := FALSE,
  212. INP2 := TRUE,
  213. INP3 := TRUE,
  214. RET_VAL := M 0.0,
  215. )
  216. __ASSERT== M 0.0, TRUE
  217. CALL "FC_and_and_or" (
  218. INP0 := TRUE,
  219. INP1 := FALSE,
  220. INP2 := TRUE,
  221. INP3 := TRUE,
  222. RET_VAL := M 0.0,
  223. )
  224. __ASSERT== M 0.0, TRUE
  225. CALL "FC_and_and_or" (
  226. INP0 := FALSE,
  227. INP1 := TRUE,
  228. INP2 := TRUE,
  229. INP3 := TRUE,
  230. RET_VAL := M 0.0,
  231. )
  232. __ASSERT== M 0.0, TRUE
  233. CALL "FC_and_and_or" (
  234. INP0 := TRUE,
  235. INP1 := TRUE,
  236. INP2 := TRUE,
  237. INP3 := TRUE,
  238. RET_VAL := M 0.0,
  239. )
  240. __ASSERT== M 0.0, TRUE
  241. BE
  242. END_FUNCTION
  243. ]]></source>
  244. <!-- AWL/STL source code -->
  245. <source enabled="1"
  246. name="TEST branch"
  247. type="0"><![CDATA[
  248. FUNCTION "FC_TEST_branch" : VOID
  249. BEGIN
  250. // Test: "FC_branch"
  251. // Equations:
  252. // OUT10 = (IN00 :+: IN01) * IN10
  253. // OUT20 = (IN00 :+: IN01) * IN20
  254. // OUT40 = IN30 * IN40
  255. // OUT50 = IN30 * IN50
  256. // OUT60 = IN60 :+: IN61
  257. // OUT61 = IN60 :+: IN61
  258. // OUT70 = (IN60 :+: IN61) :+: IN70
  259. // OUT80 = IN80 :+: IN81
  260. // OUT81 = IN80 :+: IN81
  261. // OUT90 = (IN80 :+: IN81) :+: IN90
  262. CALL "FC_branch" (
  263. IN00 := FALSE,
  264. IN01 := FALSE,
  265. IN10 := FALSE,
  266. IN20 := FALSE,
  267. IN30 := FALSE,
  268. IN40 := FALSE,
  269. IN50 := FALSE,
  270. IN60 := FALSE,
  271. IN61 := FALSE,
  272. IN70 := FALSE,
  273. IN80 := FALSE,
  274. IN81 := FALSE,
  275. IN90 := FALSE,
  276. OUT10 := M 0.0,
  277. OUT20 := M 0.1,
  278. OUT40 := M 0.2,
  279. OUT50 := M 0.3,
  280. OUT60 := M 0.4,
  281. OUT61 := M 0.5,
  282. OUT70 := M 0.6,
  283. OUT80 := M 0.7,
  284. OUT81 := M 1.0,
  285. OUT90 := M 1.1,
  286. )
  287. __ASSERT== M 0.0, FALSE
  288. __ASSERT== M 0.1, FALSE
  289. __ASSERT== M 0.2, FALSE
  290. __ASSERT== M 0.3, FALSE
  291. __ASSERT== M 0.4, FALSE
  292. __ASSERT== M 0.5, FALSE
  293. __ASSERT== M 0.6, FALSE
  294. __ASSERT== M 0.7, FALSE
  295. __ASSERT== M 1.0, FALSE
  296. __ASSERT== M 1.1, FALSE
  297. CALL "FC_branch" (
  298. IN00 := FALSE,
  299. IN01 := TRUE,
  300. IN10 := FALSE,
  301. IN20 := FALSE,
  302. IN30 := FALSE,
  303. IN40 := FALSE,
  304. IN50 := FALSE,
  305. IN60 := FALSE,
  306. IN61 := FALSE,
  307. IN70 := FALSE,
  308. IN80 := FALSE,
  309. IN81 := FALSE,
  310. IN90 := FALSE,
  311. OUT10 := M 0.0,
  312. OUT20 := M 0.1,
  313. OUT40 := M 0.2,
  314. OUT50 := M 0.3,
  315. OUT60 := M 0.4,
  316. OUT61 := M 0.5,
  317. OUT70 := M 0.6,
  318. OUT80 := M 0.7,
  319. OUT81 := M 1.0,
  320. OUT90 := M 1.1,
  321. )
  322. __ASSERT== M 0.0, FALSE
  323. __ASSERT== M 0.1, FALSE
  324. __ASSERT== M 0.2, FALSE
  325. __ASSERT== M 0.3, FALSE
  326. __ASSERT== M 0.4, FALSE
  327. __ASSERT== M 0.5, FALSE
  328. __ASSERT== M 0.6, FALSE
  329. __ASSERT== M 0.7, FALSE
  330. __ASSERT== M 1.0, FALSE
  331. __ASSERT== M 1.1, FALSE
  332. CALL "FC_branch" (
  333. IN00 := TRUE,
  334. IN01 := FALSE,
  335. IN10 := FALSE,
  336. IN20 := FALSE,
  337. IN30 := FALSE,
  338. IN40 := FALSE,
  339. IN50 := FALSE,
  340. IN60 := FALSE,
  341. IN61 := FALSE,
  342. IN70 := FALSE,
  343. IN80 := FALSE,
  344. IN81 := FALSE,
  345. IN90 := FALSE,
  346. OUT10 := M 0.0,
  347. OUT20 := M 0.1,
  348. OUT40 := M 0.2,
  349. OUT50 := M 0.3,
  350. OUT60 := M 0.4,
  351. OUT61 := M 0.5,
  352. OUT70 := M 0.6,
  353. OUT80 := M 0.7,
  354. OUT81 := M 1.0,
  355. OUT90 := M 1.1,
  356. )
  357. __ASSERT== M 0.0, FALSE
  358. __ASSERT== M 0.1, FALSE
  359. __ASSERT== M 0.2, FALSE
  360. __ASSERT== M 0.3, FALSE
  361. __ASSERT== M 0.4, FALSE
  362. __ASSERT== M 0.5, FALSE
  363. __ASSERT== M 0.6, FALSE
  364. __ASSERT== M 0.7, FALSE
  365. __ASSERT== M 1.0, FALSE
  366. __ASSERT== M 1.1, FALSE
  367. CALL "FC_branch" (
  368. IN00 := TRUE,
  369. IN01 := FALSE,
  370. IN10 := TRUE,
  371. IN20 := FALSE,
  372. IN30 := FALSE,
  373. IN40 := FALSE,
  374. IN50 := FALSE,
  375. IN60 := FALSE,
  376. IN61 := FALSE,
  377. IN70 := FALSE,
  378. IN80 := FALSE,
  379. IN81 := FALSE,
  380. IN90 := FALSE,
  381. OUT10 := M 0.0,
  382. OUT20 := M 0.1,
  383. OUT40 := M 0.2,
  384. OUT50 := M 0.3,
  385. OUT60 := M 0.4,
  386. OUT61 := M 0.5,
  387. OUT70 := M 0.6,
  388. OUT80 := M 0.7,
  389. OUT81 := M 1.0,
  390. OUT90 := M 1.1,
  391. )
  392. __ASSERT== M 0.0, TRUE
  393. __ASSERT== M 0.1, FALSE
  394. __ASSERT== M 0.2, FALSE
  395. __ASSERT== M 0.3, FALSE
  396. __ASSERT== M 0.4, FALSE
  397. __ASSERT== M 0.5, FALSE
  398. __ASSERT== M 0.6, FALSE
  399. __ASSERT== M 0.7, FALSE
  400. __ASSERT== M 1.0, FALSE
  401. __ASSERT== M 1.1, FALSE
  402. CALL "FC_branch" (
  403. IN00 := TRUE,
  404. IN01 := FALSE,
  405. IN10 := FALSE,
  406. IN20 := TRUE,
  407. IN30 := FALSE,
  408. IN40 := FALSE,
  409. IN50 := FALSE,
  410. IN60 := FALSE,
  411. IN61 := FALSE,
  412. IN70 := FALSE,
  413. IN80 := FALSE,
  414. IN81 := FALSE,
  415. IN90 := FALSE,
  416. OUT10 := M 0.0,
  417. OUT20 := M 0.1,
  418. OUT40 := M 0.2,
  419. OUT50 := M 0.3,
  420. OUT60 := M 0.4,
  421. OUT61 := M 0.5,
  422. OUT70 := M 0.6,
  423. OUT80 := M 0.7,
  424. OUT81 := M 1.0,
  425. OUT90 := M 1.1,
  426. )
  427. __ASSERT== M 0.0, FALSE
  428. __ASSERT== M 0.1, TRUE
  429. __ASSERT== M 0.2, FALSE
  430. __ASSERT== M 0.3, FALSE
  431. __ASSERT== M 0.4, FALSE
  432. __ASSERT== M 0.5, FALSE
  433. __ASSERT== M 0.6, FALSE
  434. __ASSERT== M 0.7, FALSE
  435. __ASSERT== M 1.0, FALSE
  436. __ASSERT== M 1.1, FALSE
  437. CALL "FC_branch" (
  438. IN00 := TRUE,
  439. IN01 := FALSE,
  440. IN10 := TRUE,
  441. IN20 := TRUE,
  442. IN30 := FALSE,
  443. IN40 := FALSE,
  444. IN50 := FALSE,
  445. IN60 := FALSE,
  446. IN61 := FALSE,
  447. IN70 := FALSE,
  448. IN80 := FALSE,
  449. IN81 := FALSE,
  450. IN90 := FALSE,
  451. OUT10 := M 0.0,
  452. OUT20 := M 0.1,
  453. OUT40 := M 0.2,
  454. OUT50 := M 0.3,
  455. OUT60 := M 0.4,
  456. OUT61 := M 0.5,
  457. OUT70 := M 0.6,
  458. OUT80 := M 0.7,
  459. OUT81 := M 1.0,
  460. OUT90 := M 1.1,
  461. )
  462. __ASSERT== M 0.0, TRUE
  463. __ASSERT== M 0.1, TRUE
  464. __ASSERT== M 0.2, FALSE
  465. __ASSERT== M 0.3, FALSE
  466. __ASSERT== M 0.4, FALSE
  467. __ASSERT== M 0.5, FALSE
  468. __ASSERT== M 0.6, FALSE
  469. __ASSERT== M 0.7, FALSE
  470. __ASSERT== M 1.0, FALSE
  471. __ASSERT== M 1.1, FALSE
  472. CALL "FC_branch" (
  473. IN00 := TRUE,
  474. IN01 := FALSE,
  475. IN10 := TRUE,
  476. IN20 := TRUE,
  477. IN30 := TRUE,
  478. IN40 := FALSE,
  479. IN50 := FALSE,
  480. IN60 := FALSE,
  481. IN61 := FALSE,
  482. IN70 := FALSE,
  483. IN80 := FALSE,
  484. IN81 := FALSE,
  485. IN90 := FALSE,
  486. OUT10 := M 0.0,
  487. OUT20 := M 0.1,
  488. OUT40 := M 0.2,
  489. OUT50 := M 0.3,
  490. OUT60 := M 0.4,
  491. OUT61 := M 0.5,
  492. OUT70 := M 0.6,
  493. OUT80 := M 0.7,
  494. OUT81 := M 1.0,
  495. OUT90 := M 1.1,
  496. )
  497. __ASSERT== M 0.0, TRUE
  498. __ASSERT== M 0.1, TRUE
  499. __ASSERT== M 0.2, FALSE
  500. __ASSERT== M 0.3, FALSE
  501. __ASSERT== M 0.4, FALSE
  502. __ASSERT== M 0.5, FALSE
  503. __ASSERT== M 0.6, FALSE
  504. __ASSERT== M 0.7, FALSE
  505. __ASSERT== M 1.0, FALSE
  506. __ASSERT== M 1.1, FALSE
  507. CALL "FC_branch" (
  508. IN00 := TRUE,
  509. IN01 := FALSE,
  510. IN10 := TRUE,
  511. IN20 := TRUE,
  512. IN30 := FALSE,
  513. IN40 := TRUE,
  514. IN50 := FALSE,
  515. IN60 := FALSE,
  516. IN61 := FALSE,
  517. IN70 := FALSE,
  518. IN80 := FALSE,
  519. IN81 := FALSE,
  520. IN90 := FALSE,
  521. OUT10 := M 0.0,
  522. OUT20 := M 0.1,
  523. OUT40 := M 0.2,
  524. OUT50 := M 0.3,
  525. OUT60 := M 0.4,
  526. OUT61 := M 0.5,
  527. OUT70 := M 0.6,
  528. OUT80 := M 0.7,
  529. OUT81 := M 1.0,
  530. OUT90 := M 1.1,
  531. )
  532. __ASSERT== M 0.0, TRUE
  533. __ASSERT== M 0.1, TRUE
  534. __ASSERT== M 0.2, FALSE
  535. __ASSERT== M 0.3, FALSE
  536. __ASSERT== M 0.4, FALSE
  537. __ASSERT== M 0.5, FALSE
  538. __ASSERT== M 0.6, FALSE
  539. __ASSERT== M 0.7, FALSE
  540. __ASSERT== M 1.0, FALSE
  541. __ASSERT== M 1.1, FALSE
  542. CALL "FC_branch" (
  543. IN00 := TRUE,
  544. IN01 := FALSE,
  545. IN10 := TRUE,
  546. IN20 := TRUE,
  547. IN30 := TRUE,
  548. IN40 := TRUE,
  549. IN50 := FALSE,
  550. IN60 := FALSE,
  551. IN61 := FALSE,
  552. IN70 := FALSE,
  553. IN80 := FALSE,
  554. IN81 := FALSE,
  555. IN90 := FALSE,
  556. OUT10 := M 0.0,
  557. OUT20 := M 0.1,
  558. OUT40 := M 0.2,
  559. OUT50 := M 0.3,
  560. OUT60 := M 0.4,
  561. OUT61 := M 0.5,
  562. OUT70 := M 0.6,
  563. OUT80 := M 0.7,
  564. OUT81 := M 1.0,
  565. OUT90 := M 1.1,
  566. )
  567. __ASSERT== M 0.0, TRUE
  568. __ASSERT== M 0.1, TRUE
  569. __ASSERT== M 0.2, TRUE
  570. __ASSERT== M 0.3, FALSE
  571. __ASSERT== M 0.4, FALSE
  572. __ASSERT== M 0.5, FALSE
  573. __ASSERT== M 0.6, FALSE
  574. __ASSERT== M 0.7, FALSE
  575. __ASSERT== M 1.0, FALSE
  576. __ASSERT== M 1.1, FALSE
  577. CALL "FC_branch" (
  578. IN00 := TRUE,
  579. IN01 := FALSE,
  580. IN10 := TRUE,
  581. IN20 := TRUE,
  582. IN30 := FALSE,
  583. IN40 := FALSE,
  584. IN50 := TRUE,
  585. IN60 := FALSE,
  586. IN61 := FALSE,
  587. IN70 := FALSE,
  588. IN80 := FALSE,
  589. IN81 := FALSE,
  590. IN90 := FALSE,
  591. OUT10 := M 0.0,
  592. OUT20 := M 0.1,
  593. OUT40 := M 0.2,
  594. OUT50 := M 0.3,
  595. OUT60 := M 0.4,
  596. OUT61 := M 0.5,
  597. OUT70 := M 0.6,
  598. OUT80 := M 0.7,
  599. OUT81 := M 1.0,
  600. OUT90 := M 1.1,
  601. )
  602. __ASSERT== M 0.0, TRUE
  603. __ASSERT== M 0.1, TRUE
  604. __ASSERT== M 0.2, FALSE
  605. __ASSERT== M 0.3, FALSE
  606. __ASSERT== M 0.4, FALSE
  607. __ASSERT== M 0.5, FALSE
  608. __ASSERT== M 0.6, FALSE
  609. __ASSERT== M 0.7, FALSE
  610. __ASSERT== M 1.0, FALSE
  611. __ASSERT== M 1.1, FALSE
  612. CALL "FC_branch" (
  613. IN00 := TRUE,
  614. IN01 := FALSE,
  615. IN10 := TRUE,
  616. IN20 := TRUE,
  617. IN30 := TRUE,
  618. IN40 := FALSE,
  619. IN50 := TRUE,
  620. IN60 := FALSE,
  621. IN61 := FALSE,
  622. IN70 := FALSE,
  623. IN80 := FALSE,
  624. IN81 := FALSE,
  625. IN90 := FALSE,
  626. OUT10 := M 0.0,
  627. OUT20 := M 0.1,
  628. OUT40 := M 0.2,
  629. OUT50 := M 0.3,
  630. OUT60 := M 0.4,
  631. OUT61 := M 0.5,
  632. OUT70 := M 0.6,
  633. OUT80 := M 0.7,
  634. OUT81 := M 1.0,
  635. OUT90 := M 1.1,
  636. )
  637. __ASSERT== M 0.0, TRUE
  638. __ASSERT== M 0.1, TRUE
  639. __ASSERT== M 0.2, FALSE
  640. __ASSERT== M 0.3, TRUE
  641. __ASSERT== M 0.4, FALSE
  642. __ASSERT== M 0.5, FALSE
  643. __ASSERT== M 0.6, FALSE
  644. __ASSERT== M 0.7, FALSE
  645. __ASSERT== M 1.0, FALSE
  646. __ASSERT== M 1.1, FALSE
  647. CALL "FC_branch" (
  648. IN00 := TRUE,
  649. IN01 := FALSE,
  650. IN10 := TRUE,
  651. IN20 := TRUE,
  652. IN30 := FALSE,
  653. IN40 := TRUE,
  654. IN50 := TRUE,
  655. IN60 := FALSE,
  656. IN61 := FALSE,
  657. IN70 := FALSE,
  658. IN80 := FALSE,
  659. IN81 := FALSE,
  660. IN90 := FALSE,
  661. OUT10 := M 0.0,
  662. OUT20 := M 0.1,
  663. OUT40 := M 0.2,
  664. OUT50 := M 0.3,
  665. OUT60 := M 0.4,
  666. OUT61 := M 0.5,
  667. OUT70 := M 0.6,
  668. OUT80 := M 0.7,
  669. OUT81 := M 1.0,
  670. OUT90 := M 1.1,
  671. )
  672. __ASSERT== M 0.0, TRUE
  673. __ASSERT== M 0.1, TRUE
  674. __ASSERT== M 0.2, FALSE
  675. __ASSERT== M 0.3, FALSE
  676. __ASSERT== M 0.4, FALSE
  677. __ASSERT== M 0.5, FALSE
  678. __ASSERT== M 0.6, FALSE
  679. __ASSERT== M 0.7, FALSE
  680. __ASSERT== M 1.0, FALSE
  681. __ASSERT== M 1.1, FALSE
  682. CALL "FC_branch" (
  683. IN00 := TRUE,
  684. IN01 := FALSE,
  685. IN10 := TRUE,
  686. IN20 := TRUE,
  687. IN30 := TRUE,
  688. IN40 := TRUE,
  689. IN50 := TRUE,
  690. IN60 := FALSE,
  691. IN61 := FALSE,
  692. IN70 := FALSE,
  693. IN80 := FALSE,
  694. IN81 := FALSE,
  695. IN90 := FALSE,
  696. OUT10 := M 0.0,
  697. OUT20 := M 0.1,
  698. OUT40 := M 0.2,
  699. OUT50 := M 0.3,
  700. OUT60 := M 0.4,
  701. OUT61 := M 0.5,
  702. OUT70 := M 0.6,
  703. OUT80 := M 0.7,
  704. OUT81 := M 1.0,
  705. OUT90 := M 1.1,
  706. )
  707. __ASSERT== M 0.0, TRUE
  708. __ASSERT== M 0.1, TRUE
  709. __ASSERT== M 0.2, TRUE
  710. __ASSERT== M 0.3, TRUE
  711. __ASSERT== M 0.4, FALSE
  712. __ASSERT== M 0.5, FALSE
  713. __ASSERT== M 0.6, FALSE
  714. __ASSERT== M 0.7, FALSE
  715. __ASSERT== M 1.0, FALSE
  716. __ASSERT== M 1.1, FALSE
  717. CALL "FC_branch" (
  718. IN00 := FALSE,
  719. IN01 := FALSE,
  720. IN10 := FALSE,
  721. IN20 := FALSE,
  722. IN30 := FALSE,
  723. IN40 := FALSE,
  724. IN50 := FALSE,
  725. IN60 := FALSE,
  726. IN61 := FALSE,
  727. IN70 := FALSE,
  728. IN80 := FALSE,
  729. IN81 := FALSE,
  730. IN90 := FALSE,
  731. OUT10 := M 0.0,
  732. OUT20 := M 0.1,
  733. OUT40 := M 0.2,
  734. OUT50 := M 0.3,
  735. OUT60 := M 0.4,
  736. OUT61 := M 0.5,
  737. OUT70 := M 0.6,
  738. OUT80 := M 0.7,
  739. OUT81 := M 1.0,
  740. OUT90 := M 1.1,
  741. )
  742. __ASSERT== M 0.0, FALSE
  743. __ASSERT== M 0.1, FALSE
  744. __ASSERT== M 0.2, FALSE
  745. __ASSERT== M 0.3, FALSE
  746. __ASSERT== M 0.4, FALSE
  747. __ASSERT== M 0.5, FALSE
  748. __ASSERT== M 0.6, FALSE
  749. __ASSERT== M 0.7, FALSE
  750. __ASSERT== M 1.0, FALSE
  751. __ASSERT== M 1.1, FALSE
  752. CALL "FC_branch" (
  753. IN00 := FALSE,
  754. IN01 := FALSE,
  755. IN10 := FALSE,
  756. IN20 := FALSE,
  757. IN30 := FALSE,
  758. IN40 := FALSE,
  759. IN50 := FALSE,
  760. IN60 := TRUE,
  761. IN61 := FALSE,
  762. IN70 := FALSE,
  763. IN80 := TRUE,
  764. IN81 := FALSE,
  765. IN90 := FALSE,
  766. OUT10 := M 0.0,
  767. OUT20 := M 0.1,
  768. OUT40 := M 0.2,
  769. OUT50 := M 0.3,
  770. OUT60 := M 0.4,
  771. OUT61 := M 0.5,
  772. OUT70 := M 0.6,
  773. OUT80 := M 0.7,
  774. OUT81 := M 1.0,
  775. OUT90 := M 1.1,
  776. )
  777. __ASSERT== M 0.0, FALSE
  778. __ASSERT== M 0.1, FALSE
  779. __ASSERT== M 0.2, FALSE
  780. __ASSERT== M 0.3, FALSE
  781. __ASSERT== M 0.4, TRUE
  782. __ASSERT== M 0.5, TRUE
  783. __ASSERT== M 0.6, TRUE
  784. __ASSERT== M 0.7, TRUE
  785. __ASSERT== M 1.0, TRUE
  786. __ASSERT== M 1.1, TRUE
  787. CALL "FC_branch" (
  788. IN00 := FALSE,
  789. IN01 := FALSE,
  790. IN10 := FALSE,
  791. IN20 := FALSE,
  792. IN30 := FALSE,
  793. IN40 := FALSE,
  794. IN50 := FALSE,
  795. IN60 := FALSE,
  796. IN61 := TRUE,
  797. IN70 := FALSE,
  798. IN80 := FALSE,
  799. IN81 := TRUE,
  800. IN90 := FALSE,
  801. OUT10 := M 0.0,
  802. OUT20 := M 0.1,
  803. OUT40 := M 0.2,
  804. OUT50 := M 0.3,
  805. OUT60 := M 0.4,
  806. OUT61 := M 0.5,
  807. OUT70 := M 0.6,
  808. OUT80 := M 0.7,
  809. OUT81 := M 1.0,
  810. OUT90 := M 1.1,
  811. )
  812. __ASSERT== M 0.0, FALSE
  813. __ASSERT== M 0.1, FALSE
  814. __ASSERT== M 0.2, FALSE
  815. __ASSERT== M 0.3, FALSE
  816. __ASSERT== M 0.4, TRUE
  817. __ASSERT== M 0.5, TRUE
  818. __ASSERT== M 0.6, TRUE
  819. __ASSERT== M 0.7, TRUE
  820. __ASSERT== M 1.0, TRUE
  821. __ASSERT== M 1.1, TRUE
  822. CALL "FC_branch" (
  823. IN00 := FALSE,
  824. IN01 := FALSE,
  825. IN10 := FALSE,
  826. IN20 := FALSE,
  827. IN30 := FALSE,
  828. IN40 := FALSE,
  829. IN50 := FALSE,
  830. IN60 := TRUE,
  831. IN61 := TRUE,
  832. IN70 := FALSE,
  833. IN80 := TRUE,
  834. IN81 := TRUE,
  835. IN90 := FALSE,
  836. OUT10 := M 0.0,
  837. OUT20 := M 0.1,
  838. OUT40 := M 0.2,
  839. OUT50 := M 0.3,
  840. OUT60 := M 0.4,
  841. OUT61 := M 0.5,
  842. OUT70 := M 0.6,
  843. OUT80 := M 0.7,
  844. OUT81 := M 1.0,
  845. OUT90 := M 1.1,
  846. )
  847. __ASSERT== M 0.0, FALSE
  848. __ASSERT== M 0.1, FALSE
  849. __ASSERT== M 0.2, FALSE
  850. __ASSERT== M 0.3, FALSE
  851. __ASSERT== M 0.4, FALSE
  852. __ASSERT== M 0.5, FALSE
  853. __ASSERT== M 0.6, FALSE
  854. __ASSERT== M 0.7, FALSE
  855. __ASSERT== M 1.0, FALSE
  856. __ASSERT== M 1.1, FALSE
  857. CALL "FC_branch" (
  858. IN00 := FALSE,
  859. IN01 := FALSE,
  860. IN10 := FALSE,
  861. IN20 := FALSE,
  862. IN30 := FALSE,
  863. IN40 := FALSE,
  864. IN50 := FALSE,
  865. IN60 := FALSE,
  866. IN61 := FALSE,
  867. IN70 := TRUE,
  868. IN80 := FALSE,
  869. IN81 := FALSE,
  870. IN90 := TRUE,
  871. OUT10 := M 0.0,
  872. OUT20 := M 0.1,
  873. OUT40 := M 0.2,
  874. OUT50 := M 0.3,
  875. OUT60 := M 0.4,
  876. OUT61 := M 0.5,
  877. OUT70 := M 0.6,
  878. OUT80 := M 0.7,
  879. OUT81 := M 1.0,
  880. OUT90 := M 1.1,
  881. )
  882. __ASSERT== M 0.0, FALSE
  883. __ASSERT== M 0.1, FALSE
  884. __ASSERT== M 0.2, FALSE
  885. __ASSERT== M 0.3, FALSE
  886. __ASSERT== M 0.4, FALSE
  887. __ASSERT== M 0.5, FALSE
  888. __ASSERT== M 0.6, TRUE
  889. __ASSERT== M 0.7, FALSE
  890. __ASSERT== M 1.0, FALSE
  891. __ASSERT== M 1.1, TRUE
  892. CALL "FC_branch" (
  893. IN00 := FALSE,
  894. IN01 := FALSE,
  895. IN10 := FALSE,
  896. IN20 := FALSE,
  897. IN30 := FALSE,
  898. IN40 := FALSE,
  899. IN50 := FALSE,
  900. IN60 := TRUE,
  901. IN61 := FALSE,
  902. IN70 := TRUE,
  903. IN80 := TRUE,
  904. IN81 := FALSE,
  905. IN90 := TRUE,
  906. OUT10 := M 0.0,
  907. OUT20 := M 0.1,
  908. OUT40 := M 0.2,
  909. OUT50 := M 0.3,
  910. OUT60 := M 0.4,
  911. OUT61 := M 0.5,
  912. OUT70 := M 0.6,
  913. OUT80 := M 0.7,
  914. OUT81 := M 1.0,
  915. OUT90 := M 1.1,
  916. )
  917. __ASSERT== M 0.0, FALSE
  918. __ASSERT== M 0.1, FALSE
  919. __ASSERT== M 0.2, FALSE
  920. __ASSERT== M 0.3, FALSE
  921. __ASSERT== M 0.4, TRUE
  922. __ASSERT== M 0.5, TRUE
  923. __ASSERT== M 0.6, FALSE
  924. __ASSERT== M 0.7, TRUE
  925. __ASSERT== M 1.0, TRUE
  926. __ASSERT== M 1.1, FALSE
  927. CALL "FC_branch" (
  928. IN00 := FALSE,
  929. IN01 := FALSE,
  930. IN10 := FALSE,
  931. IN20 := FALSE,
  932. IN30 := FALSE,
  933. IN40 := FALSE,
  934. IN50 := FALSE,
  935. IN60 := FALSE,
  936. IN61 := TRUE,
  937. IN70 := TRUE,
  938. IN80 := FALSE,
  939. IN81 := TRUE,
  940. IN90 := TRUE,
  941. OUT10 := M 0.0,
  942. OUT20 := M 0.1,
  943. OUT40 := M 0.2,
  944. OUT50 := M 0.3,
  945. OUT60 := M 0.4,
  946. OUT61 := M 0.5,
  947. OUT70 := M 0.6,
  948. OUT80 := M 0.7,
  949. OUT81 := M 1.0,
  950. OUT90 := M 1.1,
  951. )
  952. __ASSERT== M 0.0, FALSE
  953. __ASSERT== M 0.1, FALSE
  954. __ASSERT== M 0.2, FALSE
  955. __ASSERT== M 0.3, FALSE
  956. __ASSERT== M 0.4, TRUE
  957. __ASSERT== M 0.5, TRUE
  958. __ASSERT== M 0.6, FALSE
  959. __ASSERT== M 0.7, TRUE
  960. __ASSERT== M 1.0, TRUE
  961. __ASSERT== M 1.1, FALSE
  962. CALL "FC_branch" (
  963. IN00 := FALSE,
  964. IN01 := FALSE,
  965. IN10 := FALSE,
  966. IN20 := FALSE,
  967. IN30 := FALSE,
  968. IN40 := FALSE,
  969. IN50 := FALSE,
  970. IN60 := TRUE,
  971. IN61 := TRUE,
  972. IN70 := TRUE,
  973. IN80 := TRUE,
  974. IN81 := TRUE,
  975. IN90 := TRUE,
  976. OUT10 := M 0.0,
  977. OUT20 := M 0.1,
  978. OUT40 := M 0.2,
  979. OUT50 := M 0.3,
  980. OUT60 := M 0.4,
  981. OUT61 := M 0.5,
  982. OUT70 := M 0.6,
  983. OUT80 := M 0.7,
  984. OUT81 := M 1.0,
  985. OUT90 := M 1.1,
  986. )
  987. __ASSERT== M 0.0, FALSE
  988. __ASSERT== M 0.1, FALSE
  989. __ASSERT== M 0.2, FALSE
  990. __ASSERT== M 0.3, FALSE
  991. __ASSERT== M 0.4, FALSE
  992. __ASSERT== M 0.5, FALSE
  993. __ASSERT== M 0.6, TRUE
  994. __ASSERT== M 0.7, FALSE
  995. __ASSERT== M 1.0, FALSE
  996. __ASSERT== M 1.1, TRUE
  997. BE
  998. END_FUNCTION
  999. ]]></source>
  1000. <!-- AWL/STL source code -->
  1001. <source enabled="1"
  1002. name="TEST not 1"
  1003. type="0"><![CDATA[
  1004. FUNCTION "FC_TEST_not_1" : VOID
  1005. BEGIN
  1006. L 0
  1007. T MD 0
  1008. CALL "FC_not_1" (
  1009. // VAR_INPUT
  1010. IN00 := FALSE, // BOOL
  1011. IN01 := FALSE, // BOOL
  1012. IN10 := FALSE, // BOOL
  1013. IN20 := FALSE, // BOOL
  1014. // VAR_OUTPUT
  1015. OUT10 := M 0.0, // BOOL
  1016. OUT20 := M 0.1, // BOOL
  1017. )
  1018. __ASSERT== M 0.0, FALSE
  1019. __ASSERT== M 0.1, TRUE
  1020. L 0
  1021. T MD 0
  1022. CALL "FC_not_1" (
  1023. // VAR_INPUT
  1024. IN00 := TRUE, // BOOL
  1025. IN01 := FALSE, // BOOL
  1026. IN10 := FALSE, // BOOL
  1027. IN20 := FALSE, // BOOL
  1028. // VAR_OUTPUT
  1029. OUT10 := M 0.0, // BOOL
  1030. OUT20 := M 0.1, // BOOL
  1031. )
  1032. __ASSERT== M 0.0, FALSE
  1033. __ASSERT== M 0.1, TRUE
  1034. L 0
  1035. T MD 0
  1036. CALL "FC_not_1" (
  1037. // VAR_INPUT
  1038. IN00 := FALSE, // BOOL
  1039. IN01 := TRUE, // BOOL
  1040. IN10 := FALSE, // BOOL
  1041. IN20 := FALSE, // BOOL
  1042. // VAR_OUTPUT
  1043. OUT10 := M 0.0, // BOOL
  1044. OUT20 := M 0.1, // BOOL
  1045. )
  1046. __ASSERT== M 0.0, TRUE
  1047. __ASSERT== M 0.1, TRUE
  1048. L 0
  1049. T MD 0
  1050. CALL "FC_not_1" (
  1051. // VAR_INPUT
  1052. IN00 := TRUE, // BOOL
  1053. IN01 := TRUE, // BOOL
  1054. IN10 := FALSE, // BOOL
  1055. IN20 := FALSE, // BOOL
  1056. // VAR_OUTPUT
  1057. OUT10 := M 0.0, // BOOL
  1058. OUT20 := M 0.1, // BOOL
  1059. )
  1060. __ASSERT== M 0.0, FALSE
  1061. __ASSERT== M 0.1, TRUE
  1062. L 0
  1063. T MD 0
  1064. CALL "FC_not_1" (
  1065. // VAR_INPUT
  1066. IN00 := FALSE, // BOOL
  1067. IN01 := FALSE, // BOOL
  1068. IN10 := TRUE, // BOOL
  1069. IN20 := FALSE, // BOOL
  1070. // VAR_OUTPUT
  1071. OUT10 := M 0.0, // BOOL
  1072. OUT20 := M 0.1, // BOOL
  1073. )
  1074. __ASSERT== M 0.0, FALSE
  1075. __ASSERT== M 0.1, TRUE
  1076. L 0
  1077. T MD 0
  1078. CALL "FC_not_1" (
  1079. // VAR_INPUT
  1080. IN00 := TRUE, // BOOL
  1081. IN01 := FALSE, // BOOL
  1082. IN10 := TRUE, // BOOL
  1083. IN20 := FALSE, // BOOL
  1084. // VAR_OUTPUT
  1085. OUT10 := M 0.0, // BOOL
  1086. OUT20 := M 0.1, // BOOL
  1087. )
  1088. __ASSERT== M 0.0, FALSE
  1089. __ASSERT== M 0.1, TRUE
  1090. L 0
  1091. T MD 0
  1092. CALL "FC_not_1" (
  1093. // VAR_INPUT
  1094. IN00 := FALSE, // BOOL
  1095. IN01 := TRUE, // BOOL
  1096. IN10 := TRUE, // BOOL
  1097. IN20 := FALSE, // BOOL
  1098. // VAR_OUTPUT
  1099. OUT10 := M 0.0, // BOOL
  1100. OUT20 := M 0.1, // BOOL
  1101. )
  1102. __ASSERT== M 0.0, FALSE
  1103. __ASSERT== M 0.1, TRUE
  1104. L 0
  1105. T MD 0
  1106. CALL "FC_not_1" (
  1107. // VAR_INPUT
  1108. IN00 := TRUE, // BOOL
  1109. IN01 := TRUE, // BOOL
  1110. IN10 := TRUE, // BOOL
  1111. IN20 := FALSE, // BOOL
  1112. // VAR_OUTPUT
  1113. OUT10 := M 0.0, // BOOL
  1114. OUT20 := M 0.1, // BOOL
  1115. )
  1116. __ASSERT== M 0.0, FALSE
  1117. __ASSERT== M 0.1, TRUE
  1118. L 0
  1119. T MD 0
  1120. CALL "FC_not_1" (
  1121. // VAR_INPUT
  1122. IN00 := FALSE, // BOOL
  1123. IN01 := FALSE, // BOOL
  1124. IN10 := FALSE, // BOOL
  1125. IN20 := TRUE, // BOOL
  1126. // VAR_OUTPUT
  1127. OUT10 := M 0.0, // BOOL
  1128. OUT20 := M 0.1, // BOOL
  1129. )
  1130. __ASSERT== M 0.0, FALSE
  1131. __ASSERT== M 0.1, FALSE
  1132. L 0
  1133. T MD 0
  1134. CALL "FC_not_1" (
  1135. // VAR_INPUT
  1136. IN00 := TRUE, // BOOL
  1137. IN01 := FALSE, // BOOL
  1138. IN10 := FALSE, // BOOL
  1139. IN20 := TRUE, // BOOL
  1140. // VAR_OUTPUT
  1141. OUT10 := M 0.0, // BOOL
  1142. OUT20 := M 0.1, // BOOL
  1143. )
  1144. __ASSERT== M 0.0, FALSE
  1145. __ASSERT== M 0.1, FALSE
  1146. L 0
  1147. T MD 0
  1148. CALL "FC_not_1" (
  1149. // VAR_INPUT
  1150. IN00 := FALSE, // BOOL
  1151. IN01 := TRUE, // BOOL
  1152. IN10 := FALSE, // BOOL
  1153. IN20 := TRUE, // BOOL
  1154. // VAR_OUTPUT
  1155. OUT10 := M 0.0, // BOOL
  1156. OUT20 := M 0.1, // BOOL
  1157. )
  1158. __ASSERT== M 0.0, TRUE
  1159. __ASSERT== M 0.1, TRUE
  1160. L 0
  1161. T MD 0
  1162. CALL "FC_not_1" (
  1163. // VAR_INPUT
  1164. IN00 := TRUE, // BOOL
  1165. IN01 := TRUE, // BOOL
  1166. IN10 := FALSE, // BOOL
  1167. IN20 := TRUE, // BOOL
  1168. // VAR_OUTPUT
  1169. OUT10 := M 0.0, // BOOL
  1170. OUT20 := M 0.1, // BOOL
  1171. )
  1172. __ASSERT== M 0.0, FALSE
  1173. __ASSERT== M 0.1, FALSE
  1174. L 0
  1175. T MD 0
  1176. CALL "FC_not_1" (
  1177. // VAR_INPUT
  1178. IN00 := FALSE, // BOOL
  1179. IN01 := FALSE, // BOOL
  1180. IN10 := TRUE, // BOOL
  1181. IN20 := TRUE, // BOOL
  1182. // VAR_OUTPUT
  1183. OUT10 := M 0.0, // BOOL
  1184. OUT20 := M 0.1, // BOOL
  1185. )
  1186. __ASSERT== M 0.0, FALSE
  1187. __ASSERT== M 0.1, FALSE
  1188. L 0
  1189. T MD 0
  1190. CALL "FC_not_1" (
  1191. // VAR_INPUT
  1192. IN00 := TRUE, // BOOL
  1193. IN01 := FALSE, // BOOL
  1194. IN10 := TRUE, // BOOL
  1195. IN20 := TRUE, // BOOL
  1196. // VAR_OUTPUT
  1197. OUT10 := M 0.0, // BOOL
  1198. OUT20 := M 0.1, // BOOL
  1199. )
  1200. __ASSERT== M 0.0, FALSE
  1201. __ASSERT== M 0.1, FALSE
  1202. L 0
  1203. T MD 0
  1204. CALL "FC_not_1" (
  1205. // VAR_INPUT
  1206. IN00 := FALSE, // BOOL
  1207. IN01 := TRUE, // BOOL
  1208. IN10 := TRUE, // BOOL
  1209. IN20 := TRUE, // BOOL
  1210. // VAR_OUTPUT
  1211. OUT10 := M 0.0, // BOOL
  1212. OUT20 := M 0.1, // BOOL
  1213. )
  1214. __ASSERT== M 0.0, FALSE
  1215. __ASSERT== M 0.1, FALSE
  1216. L 0
  1217. T MD 0
  1218. CALL "FC_not_1" (
  1219. // VAR_INPUT
  1220. IN00 := TRUE, // BOOL
  1221. IN01 := TRUE, // BOOL
  1222. IN10 := TRUE, // BOOL
  1223. IN20 := TRUE, // BOOL
  1224. // VAR_OUTPUT
  1225. OUT10 := M 0.0, // BOOL
  1226. OUT20 := M 0.1, // BOOL
  1227. )
  1228. __ASSERT== M 0.0, FALSE
  1229. __ASSERT== M 0.1, FALSE
  1230. BE
  1231. END_FUNCTION
  1232. ]]></source>
  1233. <!-- AWL/STL source code -->
  1234. <source enabled="1"
  1235. name="TEST not 2"
  1236. type="0"><![CDATA[
  1237. FUNCTION "FC_TEST_not_2" : VOID
  1238. BEGIN
  1239. L 0
  1240. T MD 0
  1241. T MD 10
  1242. CALL "FC_not_2" (
  1243. // VAR_INPUT
  1244. IN01 := 4242, // INT
  1245. IN02 := FALSE, // BOOL
  1246. IN10 := FALSE, // BOOL
  1247. IN11 := 2424, // INT
  1248. IN12 := FALSE, // BOOL
  1249. // VAR_OUTPUT
  1250. OUT00 := MW 0, // INT
  1251. OUT01 := M 2.0, // BOOL
  1252. OUT10 := MW 10, // INT
  1253. OUT11 := M 12.0, // BOOL
  1254. )
  1255. __ASSERT== MW 0, 4242
  1256. __ASSERT== M 2.0, FALSE
  1257. __ASSERT== MW 10, 0
  1258. __ASSERT== M 12.0, TRUE
  1259. L 0
  1260. T MD 0
  1261. T MD 10
  1262. CALL "FC_not_2" (
  1263. // VAR_INPUT
  1264. IN01 := 4242, // INT
  1265. IN02 := TRUE, // BOOL
  1266. IN10 := FALSE, // BOOL
  1267. IN11 := 2424, // INT
  1268. IN12 := FALSE, // BOOL
  1269. // VAR_OUTPUT
  1270. OUT00 := MW 0, // INT
  1271. OUT01 := M 2.0, // BOOL
  1272. OUT10 := MW 10, // INT
  1273. OUT11 := M 12.0, // BOOL
  1274. )
  1275. __ASSERT== MW 0, 4242
  1276. __ASSERT== M 2.0, TRUE
  1277. __ASSERT== MW 10, 0
  1278. __ASSERT== M 12.0, TRUE
  1279. L 0
  1280. T MD 0
  1281. T MD 10
  1282. CALL "FC_not_2" (
  1283. // VAR_INPUT
  1284. IN01 := 4242, // INT
  1285. IN02 := FALSE, // BOOL
  1286. IN10 := TRUE, // BOOL
  1287. IN11 := 2424, // INT
  1288. IN12 := FALSE, // BOOL
  1289. // VAR_OUTPUT
  1290. OUT00 := MW 0, // INT
  1291. OUT01 := M 2.0, // BOOL
  1292. OUT10 := MW 10, // INT
  1293. OUT11 := M 12.0, // BOOL
  1294. )
  1295. __ASSERT== MW 0, 4242
  1296. __ASSERT== M 2.0, FALSE
  1297. __ASSERT== MW 10, 2424
  1298. __ASSERT== M 12.0, FALSE
  1299. L 0
  1300. T MD 0
  1301. T MD 10
  1302. CALL "FC_not_2" (
  1303. // VAR_INPUT
  1304. IN01 := 4242, // INT
  1305. IN02 := TRUE, // BOOL
  1306. IN10 := TRUE, // BOOL
  1307. IN11 := 2424, // INT
  1308. IN12 := FALSE, // BOOL
  1309. // VAR_OUTPUT
  1310. OUT00 := MW 0, // INT
  1311. OUT01 := M 2.0, // BOOL
  1312. OUT10 := MW 10, // INT
  1313. OUT11 := M 12.0, // BOOL
  1314. )
  1315. __ASSERT== MW 0, 4242
  1316. __ASSERT== M 2.0, TRUE
  1317. __ASSERT== MW 10, 2424
  1318. __ASSERT== M 12.0, FALSE
  1319. L 0
  1320. T MD 0
  1321. T MD 10
  1322. CALL "FC_not_2" (
  1323. // VAR_INPUT
  1324. IN01 := 4242, // INT
  1325. IN02 := FALSE, // BOOL
  1326. IN10 := FALSE, // BOOL
  1327. IN11 := 2424, // INT
  1328. IN12 := TRUE, // BOOL
  1329. // VAR_OUTPUT
  1330. OUT00 := MW 0, // INT
  1331. OUT01 := M 2.0, // BOOL
  1332. OUT10 := MW 10, // INT
  1333. OUT11 := M 12.0, // BOOL
  1334. )
  1335. __ASSERT== MW 0, 4242
  1336. __ASSERT== M 2.0, FALSE
  1337. __ASSERT== MW 10, 0
  1338. __ASSERT== M 12.0, FALSE
  1339. L 0
  1340. T MD 0
  1341. T MD 10
  1342. CALL "FC_not_2" (
  1343. // VAR_INPUT
  1344. IN01 := 4242, // INT
  1345. IN02 := TRUE, // BOOL
  1346. IN10 := FALSE, // BOOL
  1347. IN11 := 2424, // INT
  1348. IN12 := TRUE, // BOOL
  1349. // VAR_OUTPUT
  1350. OUT00 := MW 0, // INT
  1351. OUT01 := M 2.0, // BOOL
  1352. OUT10 := MW 10, // INT
  1353. OUT11 := M 12.0, // BOOL
  1354. )
  1355. __ASSERT== MW 0, 4242
  1356. __ASSERT== M 2.0, TRUE
  1357. __ASSERT== MW 10, 0
  1358. __ASSERT== M 12.0, FALSE
  1359. L 0
  1360. T MD 0
  1361. T MD 10
  1362. CALL "FC_not_2" (
  1363. // VAR_INPUT
  1364. IN01 := 4242, // INT
  1365. IN02 := FALSE, // BOOL
  1366. IN10 := TRUE, // BOOL
  1367. IN11 := 2424, // INT
  1368. IN12 := TRUE, // BOOL
  1369. // VAR_OUTPUT
  1370. OUT00 := MW 0, // INT
  1371. OUT01 := M 2.0, // BOOL
  1372. OUT10 := MW 10, // INT
  1373. OUT11 := M 12.0, // BOOL
  1374. )
  1375. __ASSERT== MW 0, 4242
  1376. __ASSERT== M 2.0, FALSE
  1377. __ASSERT== MW 10, 2424
  1378. __ASSERT== M 12.0, TRUE
  1379. L 0
  1380. T MD 0
  1381. T MD 10
  1382. CALL "FC_not_2" (
  1383. // VAR_INPUT
  1384. IN01 := 4242, // INT
  1385. IN02 := TRUE, // BOOL
  1386. IN10 := TRUE, // BOOL
  1387. IN11 := 2424, // INT
  1388. IN12 := TRUE, // BOOL
  1389. // VAR_OUTPUT
  1390. OUT00 := MW 0, // INT
  1391. OUT01 := M 2.0, // BOOL
  1392. OUT10 := MW 10, // INT
  1393. OUT11 := M 12.0, // BOOL
  1394. )
  1395. __ASSERT== MW 0, 4242
  1396. __ASSERT== M 2.0, TRUE
  1397. __ASSERT== MW 10, 2424
  1398. __ASSERT== M 12.0, TRUE
  1399. BE
  1400. END_FUNCTION
  1401. ]]></source>
  1402. <!-- AWL/STL source code -->
  1403. <source enabled="1"
  1404. name="TEST sr 1"
  1405. type="0"><![CDATA[
  1406. FUNCTION "FC_TEST_sr_1" : VOID
  1407. BEGIN
  1408. // Reset flip-flops
  1409. L 0
  1410. T MB 10
  1411. L 0
  1412. T MB 0
  1413. CALL "FC_sr_1" (
  1414. // VAR_INPUT
  1415. IN00 := FALSE, // BOOL
  1416. IN10 := FALSE, // BOOL
  1417. IN11 := FALSE, // BOOL
  1418. IN20 := FALSE, // BOOL
  1419. IN21 := FALSE, // BOOL
  1420. IN30 := FALSE, // BOOL
  1421. // VAR_OUTPUT
  1422. OUT20 := M 0.2, // BOOL
  1423. OUT30 := M 0.3, // BOOL
  1424. // VAR_IN_OUT
  1425. INOUT0 := M 10.0, // BOOL
  1426. INOUT1 := M 10.1, // BOOL
  1427. INOUT2 := M 10.2, // BOOL
  1428. INOUT3 := M 10.3, // BOOL
  1429. )
  1430. __ASSERT== M 0.2, FALSE
  1431. __ASSERT== M 0.3, FALSE
  1432. __ASSERT== M 10.0, FALSE
  1433. __ASSERT== M 10.1, FALSE
  1434. __ASSERT== M 10.2, FALSE
  1435. __ASSERT== M 10.3, FALSE
  1436. L 0
  1437. T MB 0
  1438. CALL "FC_sr_1" (
  1439. // VAR_INPUT
  1440. IN00 := TRUE, // BOOL
  1441. IN10 := TRUE, // BOOL
  1442. IN11 := FALSE, // BOOL
  1443. IN20 := TRUE, // BOOL
  1444. IN21 := FALSE, // BOOL
  1445. IN30 := TRUE, // BOOL
  1446. // VAR_OUTPUT
  1447. OUT20 := M 0.2, // BOOL
  1448. OUT30 := M 0.3, // BOOL
  1449. // VAR_IN_OUT
  1450. INOUT0 := M 10.0, // BOOL
  1451. INOUT1 := M 10.1, // BOOL
  1452. INOUT2 := M 10.2, // BOOL
  1453. INOUT3 := M 10.3, // BOOL
  1454. )
  1455. __ASSERT== M 0.2, TRUE
  1456. __ASSERT== M 0.3, TRUE
  1457. __ASSERT== M 10.0, TRUE
  1458. __ASSERT== M 10.1, TRUE
  1459. __ASSERT== M 10.2, TRUE
  1460. __ASSERT== M 10.3, TRUE
  1461. L 0
  1462. T MB 0
  1463. CALL "FC_sr_1" (
  1464. // VAR_INPUT
  1465. IN00 := FALSE, // BOOL
  1466. IN10 := FALSE, // BOOL
  1467. IN11 := FALSE, // BOOL
  1468. IN20 := FALSE, // BOOL
  1469. IN21 := FALSE, // BOOL
  1470. IN30 := FALSE, // BOOL
  1471. // VAR_OUTPUT
  1472. OUT20 := M 0.2, // BOOL
  1473. OUT30 := M 0.3, // BOOL
  1474. // VAR_IN_OUT
  1475. INOUT0 := M 10.0, // BOOL
  1476. INOUT1 := M 10.1, // BOOL
  1477. INOUT2 := M 10.2, // BOOL
  1478. INOUT3 := M 10.3, // BOOL
  1479. )
  1480. __ASSERT== M 0.2, TRUE
  1481. __ASSERT== M 0.3, TRUE
  1482. __ASSERT== M 10.0, TRUE
  1483. __ASSERT== M 10.1, TRUE
  1484. __ASSERT== M 10.2, TRUE
  1485. __ASSERT== M 10.3, TRUE
  1486. L 0
  1487. T MB 0
  1488. CALL "FC_sr_1" (
  1489. // VAR_INPUT
  1490. IN00 := FALSE, // BOOL
  1491. IN10 := FALSE, // BOOL
  1492. IN11 := TRUE, // BOOL
  1493. IN20 := FALSE, // BOOL
  1494. IN21 := TRUE, // BOOL
  1495. IN30 := FALSE, // BOOL
  1496. // VAR_OUTPUT
  1497. OUT20 := M 0.2, // BOOL
  1498. OUT30 := M 0.3, // BOOL
  1499. // VAR_IN_OUT
  1500. INOUT0 := M 10.0, // BOOL
  1501. INOUT1 := M 10.1, // BOOL
  1502. INOUT2 := M 10.2, // BOOL
  1503. INOUT3 := M 10.3, // BOOL
  1504. )
  1505. __ASSERT== M 0.2, FALSE
  1506. __ASSERT== M 0.3, TRUE
  1507. __ASSERT== M 10.0, TRUE
  1508. __ASSERT== M 10.1, FALSE
  1509. __ASSERT== M 10.2, FALSE
  1510. __ASSERT== M 10.3, TRUE
  1511. L 0
  1512. T MB 0
  1513. CALL "FC_sr_1" (
  1514. // VAR_INPUT
  1515. IN00 := TRUE, // BOOL
  1516. IN10 := FALSE, // BOOL
  1517. IN11 := TRUE, // BOOL
  1518. IN20 := FALSE, // BOOL
  1519. IN21 := TRUE, // BOOL
  1520. IN30 := FALSE, // BOOL
  1521. // VAR_OUTPUT
  1522. OUT20 := M 0.2, // BOOL
  1523. OUT30 := M 0.3, // BOOL
  1524. // VAR_IN_OUT
  1525. INOUT0 := M 10.0, // BOOL
  1526. INOUT1 := M 10.1, // BOOL
  1527. INOUT2 := M 10.2, // BOOL
  1528. INOUT3 := M 10.3, // BOOL
  1529. )
  1530. __ASSERT== M 0.2, FALSE
  1531. __ASSERT== M 0.3, TRUE
  1532. __ASSERT== M 10.0, TRUE
  1533. __ASSERT== M 10.1, FALSE
  1534. __ASSERT== M 10.2, FALSE
  1535. __ASSERT== M 10.3, TRUE
  1536. L 0
  1537. T MB 0
  1538. CALL "FC_sr_1" (
  1539. // VAR_INPUT
  1540. IN00 := TRUE, // BOOL
  1541. IN10 := TRUE, // BOOL
  1542. IN11 := TRUE, // BOOL
  1543. IN20 := FALSE, // BOOL
  1544. IN21 := TRUE, // BOOL
  1545. IN30 := FALSE, // BOOL
  1546. // VAR_OUTPUT
  1547. OUT20 := M 0.2, // BOOL
  1548. OUT30 := M 0.3, // BOOL
  1549. // VAR_IN_OUT
  1550. INOUT0 := M 10.0, // BOOL
  1551. INOUT1 := M 10.1, // BOOL
  1552. INOUT2 := M 10.2, // BOOL
  1553. INOUT3 := M 10.3, // BOOL
  1554. )
  1555. __ASSERT== M 0.2, FALSE
  1556. __ASSERT== M 0.3, TRUE
  1557. __ASSERT== M 10.0, TRUE
  1558. __ASSERT== M 10.1, FALSE
  1559. __ASSERT== M 10.2, FALSE
  1560. __ASSERT== M 10.3, TRUE
  1561. L 0
  1562. T MB 0
  1563. CALL "FC_sr_1" (
  1564. // VAR_INPUT
  1565. IN00 := TRUE, // BOOL
  1566. IN10 := TRUE, // BOOL
  1567. IN11 := TRUE, // BOOL
  1568. IN20 := TRUE, // BOOL
  1569. IN21 := TRUE, // BOOL
  1570. IN30 := FALSE, // BOOL
  1571. // VAR_OUTPUT
  1572. OUT20 := M 0.2, // BOOL
  1573. OUT30 := M 0.3, // BOOL
  1574. // VAR_IN_OUT
  1575. INOUT0 := M 10.0, // BOOL
  1576. INOUT1 := M 10.1, // BOOL
  1577. INOUT2 := M 10.2, // BOOL
  1578. INOUT3 := M 10.3, // BOOL
  1579. )
  1580. __ASSERT== M 0.2, FALSE
  1581. __ASSERT== M 0.3, TRUE
  1582. __ASSERT== M 10.0, TRUE
  1583. __ASSERT== M 10.1, FALSE
  1584. __ASSERT== M 10.2, FALSE
  1585. __ASSERT== M 10.3, TRUE
  1586. L 0
  1587. T MB 0
  1588. CALL "FC_sr_1" (
  1589. // VAR_INPUT
  1590. IN00 := TRUE, // BOOL
  1591. IN10 := TRUE, // BOOL
  1592. IN11 := TRUE, // BOOL
  1593. IN20 := TRUE, // BOOL
  1594. IN21 := TRUE, // BOOL
  1595. IN30 := TRUE, // BOOL
  1596. // VAR_OUTPUT
  1597. OUT20 := M 0.2, // BOOL
  1598. OUT30 := M 0.3, // BOOL
  1599. // VAR_IN_OUT
  1600. INOUT0 := M 10.0, // BOOL
  1601. INOUT1 := M 10.1, // BOOL
  1602. INOUT2 := M 10.2, // BOOL
  1603. INOUT3 := M 10.3, // BOOL
  1604. )
  1605. __ASSERT== M 0.2, FALSE
  1606. __ASSERT== M 0.3, TRUE
  1607. __ASSERT== M 10.0, TRUE
  1608. __ASSERT== M 10.1, FALSE
  1609. __ASSERT== M 10.2, FALSE
  1610. __ASSERT== M 10.3, TRUE
  1611. // Reset flip-flops
  1612. L 0
  1613. T MB 10
  1614. L 0
  1615. T MB 0
  1616. CALL "FC_sr_1" (
  1617. // VAR_INPUT
  1618. IN00 := TRUE, // BOOL
  1619. IN10 := FALSE, // BOOL
  1620. IN11 := FALSE, // BOOL
  1621. IN20 := FALSE, // BOOL
  1622. IN21 := FALSE, // BOOL
  1623. IN30 := FALSE, // BOOL
  1624. // VAR_OUTPUT
  1625. OUT20 := M 0.2, // BOOL
  1626. OUT30 := M 0.3, // BOOL
  1627. // VAR_IN_OUT
  1628. INOUT0 := M 10.0, // BOOL
  1629. INOUT1 := M 10.1, // BOOL
  1630. INOUT2 := M 10.2, // BOOL
  1631. INOUT3 := M 10.3, // BOOL
  1632. )
  1633. __ASSERT== M 0.2, FALSE
  1634. __ASSERT== M 0.3, FALSE
  1635. __ASSERT== M 10.0, TRUE
  1636. __ASSERT== M 10.1, FALSE
  1637. __ASSERT== M 10.2, FALSE
  1638. __ASSERT== M 10.3, FALSE
  1639. L 0
  1640. T MB 0
  1641. CALL "FC_sr_1" (
  1642. // VAR_INPUT
  1643. IN00 := FALSE, // BOOL
  1644. IN10 := TRUE, // BOOL
  1645. IN11 := FALSE, // BOOL
  1646. IN20 := FALSE, // BOOL
  1647. IN21 := FALSE, // BOOL
  1648. IN30 := FALSE, // BOOL
  1649. // VAR_OUTPUT
  1650. OUT20 := M 0.2, // BOOL
  1651. OUT30 := M 0.3, // BOOL
  1652. // VAR_IN_OUT
  1653. INOUT0 := M 10.0, // BOOL
  1654. INOUT1 := M 10.1, // BOOL
  1655. INOUT2 := M 10.2, // BOOL
  1656. INOUT3 := M 10.3, // BOOL
  1657. )
  1658. __ASSERT== M 0.2, FALSE
  1659. __ASSERT== M 0.3, FALSE
  1660. __ASSERT== M 10.0, TRUE
  1661. __ASSERT== M 10.1, TRUE
  1662. __ASSERT== M 10.2, FALSE
  1663. __ASSERT== M 10.3, FALSE
  1664. L 0
  1665. T MB 0
  1666. CALL "FC_sr_1" (
  1667. // VAR_INPUT
  1668. IN00 := FALSE, // BOOL
  1669. IN10 := FALSE, // BOOL
  1670. IN11 := FALSE, // BOOL
  1671. IN20 := TRUE, // BOOL
  1672. IN21 := FALSE, // BOOL
  1673. IN30 := FALSE, // BOOL
  1674. // VAR_OUTPUT
  1675. OUT20 := M 0.2, // BOOL
  1676. OUT30 := M 0.3, // BOOL
  1677. // VAR_IN_OUT
  1678. INOUT0 := M 10.0, // BOOL
  1679. INOUT1 := M 10.1, // BOOL
  1680. INOUT2 := M 10.2, // BOOL
  1681. INOUT3 := M 10.3, // BOOL
  1682. )
  1683. __ASSERT== M 0.2, TRUE
  1684. __ASSERT== M 0.3, FALSE
  1685. __ASSERT== M 10.0, TRUE
  1686. __ASSERT== M 10.1, TRUE
  1687. __ASSERT== M 10.2, TRUE
  1688. __ASSERT== M 10.3, FALSE
  1689. L 0
  1690. T MB 0
  1691. CALL "FC_sr_1" (
  1692. // VAR_INPUT
  1693. IN00 := FALSE, // BOOL
  1694. IN10 := FALSE, // BOOL
  1695. IN11 := FALSE, // BOOL
  1696. IN20 := FALSE, // BOOL
  1697. IN21 := FALSE, // BOOL
  1698. IN30 := TRUE, // BOOL
  1699. // VAR_OUTPUT
  1700. OUT20 := M 0.2, // BOOL
  1701. OUT30 := M 0.3, // BOOL
  1702. // VAR_IN_OUT
  1703. INOUT0 := M 10.0, // BOOL
  1704. INOUT1 := M 10.1, // BOOL
  1705. INOUT2 := M 10.2, // BOOL
  1706. INOUT3 := M 10.3, // BOOL
  1707. )
  1708. __ASSERT== M 0.2, TRUE
  1709. __ASSERT== M 0.3, TRUE
  1710. __ASSERT== M 10.0, TRUE
  1711. __ASSERT== M 10.1, TRUE
  1712. __ASSERT== M 10.2, TRUE
  1713. __ASSERT== M 10.3, TRUE
  1714. L 0
  1715. T MB 0
  1716. CALL "FC_sr_1" (
  1717. // VAR_INPUT
  1718. IN00 := FALSE, // BOOL
  1719. IN10 := FALSE, // BOOL
  1720. IN11 := TRUE, // BOOL
  1721. IN20 := FALSE, // BOOL
  1722. IN21 := FALSE, // BOOL
  1723. IN30 := FALSE, // BOOL
  1724. // VAR_OUTPUT
  1725. OUT20 := M 0.2, // BOOL
  1726. OUT30 := M 0.3, // BOOL
  1727. // VAR_IN_OUT
  1728. INOUT0 := M 10.0, // BOOL
  1729. INOUT1 := M 10.1, // BOOL
  1730. INOUT2 := M 10.2, // BOOL
  1731. INOUT3 := M 10.3, // BOOL
  1732. )
  1733. __ASSERT== M 0.2, TRUE
  1734. __ASSERT== M 0.3, TRUE
  1735. __ASSERT== M 10.0, TRUE
  1736. __ASSERT== M 10.1, FALSE
  1737. __ASSERT== M 10.2, TRUE
  1738. __ASSERT== M 10.3, TRUE
  1739. L 0
  1740. T MB 0
  1741. CALL "FC_sr_1" (
  1742. // VAR_INPUT
  1743. IN00 := FALSE, // BOOL
  1744. IN10 := FALSE, // BOOL
  1745. IN11 := FALSE, // BOOL
  1746. IN20 := FALSE, // BOOL
  1747. IN21 := TRUE, // BOOL
  1748. IN30 := FALSE, // BOOL
  1749. // VAR_OUTPUT
  1750. OUT20 := M 0.2, // BOOL
  1751. OUT30 := M 0.3, // BOOL
  1752. // VAR_IN_OUT
  1753. INOUT0 := M 10.0, // BOOL
  1754. INOUT1 := M 10.1, // BOOL
  1755. INOUT2 := M 10.2, // BOOL
  1756. INOUT3 := M 10.3, // BOOL
  1757. )
  1758. __ASSERT== M 0.2, FALSE
  1759. __ASSERT== M 0.3, TRUE
  1760. __ASSERT== M 10.0, TRUE
  1761. __ASSERT== M 10.1, FALSE
  1762. __ASSERT== M 10.2, FALSE
  1763. __ASSERT== M 10.3, TRUE
  1764. BE
  1765. END_FUNCTION
  1766. ]]></source>
  1767. <!-- AWL/STL source code -->
  1768. <source enabled="1"
  1769. name="TEST sr 2"
  1770. type="0"><![CDATA[
  1771. FUNCTION "FC_TEST_sr_2" : VOID
  1772. BEGIN
  1773. // Fet flip-flops
  1774. L W#16#FF
  1775. T MB 10
  1776. L 0
  1777. T MB 0
  1778. CALL "FC_sr_2" (
  1779. // VAR_INPUT
  1780. IN00 := FALSE, // BOOL
  1781. IN10 := FALSE, // BOOL
  1782. IN11 := FALSE, // BOOL
  1783. IN20 := FALSE, // BOOL
  1784. IN21 := FALSE, // BOOL
  1785. IN30 := FALSE, // BOOL
  1786. // VAR_OUTPUT
  1787. OUT20 := M 0.2, // BOOL
  1788. OUT30 := M 0.3, // BOOL
  1789. // VAR_IN_OUT
  1790. INOUT0 := M 10.0, // BOOL
  1791. INOUT1 := M 10.1, // BOOL
  1792. INOUT2 := M 10.2, // BOOL
  1793. INOUT3 := M 10.3, // BOOL
  1794. )
  1795. __ASSERT== M 0.2, TRUE
  1796. __ASSERT== M 0.3, TRUE
  1797. __ASSERT== M 10.0, TRUE
  1798. __ASSERT== M 10.1, TRUE
  1799. __ASSERT== M 10.2, TRUE
  1800. __ASSERT== M 10.3, TRUE
  1801. L 0
  1802. T MB 0
  1803. CALL "FC_sr_2" (
  1804. // VAR_INPUT
  1805. IN00 := TRUE, // BOOL
  1806. IN10 := TRUE, // BOOL
  1807. IN11 := FALSE, // BOOL
  1808. IN20 := TRUE, // BOOL
  1809. IN21 := FALSE, // BOOL
  1810. IN30 := TRUE, // BOOL
  1811. // VAR_OUTPUT
  1812. OUT20 := M 0.2, // BOOL
  1813. OUT30 := M 0.3, // BOOL
  1814. // VAR_IN_OUT
  1815. INOUT0 := M 10.0, // BOOL
  1816. INOUT1 := M 10.1, // BOOL
  1817. INOUT2 := M 10.2, // BOOL
  1818. INOUT3 := M 10.3, // BOOL
  1819. )
  1820. __ASSERT== M 0.2, FALSE
  1821. __ASSERT== M 0.3, FALSE
  1822. __ASSERT== M 10.0, FALSE
  1823. __ASSERT== M 10.1, FALSE
  1824. __ASSERT== M 10.2, FALSE
  1825. __ASSERT== M 10.3, FALSE
  1826. L 0
  1827. T MB 0
  1828. CALL "FC_sr_1" (
  1829. // VAR_INPUT
  1830. IN00 := FALSE, // BOOL
  1831. IN10 := FALSE, // BOOL
  1832. IN11 := FALSE, // BOOL
  1833. IN20 := FALSE, // BOOL
  1834. IN21 := FALSE, // BOOL
  1835. IN30 := FALSE, // BOOL
  1836. // VAR_OUTPUT
  1837. OUT20 := M 0.2, // BOOL
  1838. OUT30 := M 0.3, // BOOL
  1839. // VAR_IN_OUT
  1840. INOUT0 := M 10.0, // BOOL
  1841. INOUT1 := M 10.1, // BOOL
  1842. INOUT2 := M 10.2, // BOOL
  1843. INOUT3 := M 10.3, // BOOL
  1844. )
  1845. __ASSERT== M 0.2, FALSE
  1846. __ASSERT== M 0.3, FALSE
  1847. __ASSERT== M 10.0, FALSE
  1848. __ASSERT== M 10.1, FALSE
  1849. __ASSERT== M 10.2, FALSE
  1850. __ASSERT== M 10.3, FALSE
  1851. L 0
  1852. T MB 0
  1853. CALL "FC_sr_2" (
  1854. // VAR_INPUT
  1855. IN00 := FALSE, // BOOL
  1856. IN10 := FALSE, // BOOL
  1857. IN11 := TRUE, // BOOL
  1858. IN20 := FALSE, // BOOL
  1859. IN21 := TRUE, // BOOL
  1860. IN30 := FALSE, // BOOL
  1861. // VAR_OUTPUT
  1862. OUT20 := M 0.2, // BOOL
  1863. OUT30 := M 0.3, // BOOL
  1864. // VAR_IN_OUT
  1865. INOUT0 := M 10.0, // BOOL
  1866. INOUT1 := M 10.1, // BOOL
  1867. INOUT2 := M 10.2, // BOOL
  1868. INOUT3 := M 10.3, // BOOL
  1869. )
  1870. __ASSERT== M 0.2, TRUE
  1871. __ASSERT== M 0.3, FALSE
  1872. __ASSERT== M 10.0, FALSE
  1873. __ASSERT== M 10.1, TRUE
  1874. __ASSERT== M 10.2, TRUE
  1875. __ASSERT== M 10.3, FALSE
  1876. L 0
  1877. T MB 0
  1878. CALL "FC_sr_2" (
  1879. // VAR_INPUT
  1880. IN00 := TRUE, // BOOL
  1881. IN10 := FALSE, // BOOL
  1882. IN11 := TRUE, // BOOL
  1883. IN20 := FALSE, // BOOL
  1884. IN21 := TRUE, // BOOL
  1885. IN30 := FALSE, // BOOL
  1886. // VAR_OUTPUT
  1887. OUT20 := M 0.2, // BOOL
  1888. OUT30 := M 0.3, // BOOL
  1889. // VAR_IN_OUT
  1890. INOUT0 := M 10.0, // BOOL
  1891. INOUT1 := M 10.1, // BOOL
  1892. INOUT2 := M 10.2, // BOOL
  1893. INOUT3 := M 10.3, // BOOL
  1894. )
  1895. __ASSERT== M 0.2, TRUE
  1896. __ASSERT== M 0.3, FALSE
  1897. __ASSERT== M 10.0, FALSE
  1898. __ASSERT== M 10.1, TRUE
  1899. __ASSERT== M 10.2, TRUE
  1900. __ASSERT== M 10.3, FALSE
  1901. L 0
  1902. T MB 0
  1903. CALL "FC_sr_2" (
  1904. // VAR_INPUT
  1905. IN00 := TRUE, // BOOL
  1906. IN10 := TRUE, // BOOL
  1907. IN11 := TRUE, // BOOL
  1908. IN20 := FALSE, // BOOL
  1909. IN21 := TRUE, // BOOL
  1910. IN30 := FALSE, // BOOL
  1911. // VAR_OUTPUT
  1912. OUT20 := M 0.2, // BOOL
  1913. OUT30 := M 0.3, // BOOL
  1914. // VAR_IN_OUT
  1915. INOUT0 := M 10.0, // BOOL
  1916. INOUT1 := M 10.1, // BOOL
  1917. INOUT2 := M 10.2, // BOOL
  1918. INOUT3 := M 10.3, // BOOL
  1919. )
  1920. __ASSERT== M 0.2, TRUE
  1921. __ASSERT== M 0.3, FALSE
  1922. __ASSERT== M 10.0, FALSE
  1923. __ASSERT== M 10.1, TRUE
  1924. __ASSERT== M 10.2, TRUE
  1925. __ASSERT== M 10.3, FALSE
  1926. L 0
  1927. T MB 0
  1928. CALL "FC_sr_2" (
  1929. // VAR_INPUT
  1930. IN00 := TRUE, // BOOL
  1931. IN10 := TRUE, // BOOL
  1932. IN11 := TRUE, // BOOL
  1933. IN20 := TRUE, // BOOL
  1934. IN21 := TRUE, // BOOL
  1935. IN30 := FALSE, // BOOL
  1936. // VAR_OUTPUT
  1937. OUT20 := M 0.2, // BOOL
  1938. OUT30 := M 0.3, // BOOL
  1939. // VAR_IN_OUT
  1940. INOUT0 := M 10.0, // BOOL
  1941. INOUT1 := M 10.1, // BOOL
  1942. INOUT2 := M 10.2, // BOOL
  1943. INOUT3 := M 10.3, // BOOL
  1944. )
  1945. __ASSERT== M 0.2, TRUE
  1946. __ASSERT== M 0.3, FALSE
  1947. __ASSERT== M 10.0, FALSE
  1948. __ASSERT== M 10.1, TRUE
  1949. __ASSERT== M 10.2, TRUE
  1950. __ASSERT== M 10.3, FALSE
  1951. L 0
  1952. T MB 0
  1953. CALL "FC_sr_2" (
  1954. // VAR_INPUT
  1955. IN00 := TRUE, // BOOL
  1956. IN10 := TRUE, // BOOL
  1957. IN11 := TRUE, // BOOL
  1958. IN20 := TRUE, // BOOL
  1959. IN21 := TRUE, // BOOL
  1960. IN30 := TRUE, // BOOL
  1961. // VAR_OUTPUT
  1962. OUT20 := M 0.2, // BOOL
  1963. OUT30 := M 0.3, // BOOL
  1964. // VAR_IN_OUT
  1965. INOUT0 := M 10.0, // BOOL
  1966. INOUT1 := M 10.1, // BOOL
  1967. INOUT2 := M 10.2, // BOOL
  1968. INOUT3 := M 10.3, // BOOL
  1969. )
  1970. __ASSERT== M 0.2, TRUE
  1971. __ASSERT== M 0.3, FALSE
  1972. __ASSERT== M 10.0, FALSE
  1973. __ASSERT== M 10.1, TRUE
  1974. __ASSERT== M 10.2, TRUE
  1975. __ASSERT== M 10.3, FALSE
  1976. // Set flip-flops
  1977. L W#16#FF
  1978. T MB 10
  1979. L 0
  1980. T MB 0
  1981. CALL "FC_sr_2" (
  1982. // VAR_INPUT
  1983. IN00 := TRUE, // BOOL
  1984. IN10 := FALSE, // BOOL
  1985. IN11 := FALSE, // BOOL
  1986. IN20 := FALSE, // BOOL
  1987. IN21 := FALSE, // BOOL
  1988. IN30 := FALSE, // BOOL
  1989. // VAR_OUTPUT
  1990. OUT20 := M 0.2, // BOOL
  1991. OUT30 := M 0.3, // BOOL
  1992. // VAR_IN_OUT
  1993. INOUT0 := M 10.0, // BOOL
  1994. INOUT1 := M 10.1, // BOOL
  1995. INOUT2 := M 10.2, // BOOL
  1996. INOUT3 := M 10.3, // BOOL
  1997. )
  1998. __ASSERT== M 0.2, TRUE
  1999. __ASSERT== M 0.3, TRUE
  2000. __ASSERT== M 10.0, FALSE
  2001. __ASSERT== M 10.1, TRUE
  2002. __ASSERT== M 10.2, TRUE
  2003. __ASSERT== M 10.3, TRUE
  2004. L 0
  2005. T MB 0
  2006. CALL "FC_sr_2" (
  2007. // VAR_INPUT
  2008. IN00 := FALSE, // BOOL
  2009. IN10 := TRUE, // BOOL
  2010. IN11 := FALSE, // BOOL
  2011. IN20 := FALSE, // BOOL
  2012. IN21 := FALSE, // BOOL
  2013. IN30 := FALSE, // BOOL
  2014. // VAR_OUTPUT
  2015. OUT20 := M 0.2, // BOOL
  2016. OUT30 := M 0.3, // BOOL
  2017. // VAR_IN_OUT
  2018. INOUT0 := M 10.0, // BOOL
  2019. INOUT1 := M 10.1, // BOOL
  2020. INOUT2 := M 10.2, // BOOL
  2021. INOUT3 := M 10.3, // BOOL
  2022. )
  2023. __ASSERT== M 0.2, TRUE
  2024. __ASSERT== M 0.3, TRUE
  2025. __ASSERT== M 10.0, FALSE
  2026. __ASSERT== M 10.1, FALSE
  2027. __ASSERT== M 10.2, TRUE
  2028. __ASSERT== M 10.3, TRUE
  2029. L 0
  2030. T MB 0
  2031. CALL "FC_sr_2" (
  2032. // VAR_INPUT
  2033. IN00 := FALSE, // BOOL
  2034. IN10 := FALSE, // BOOL
  2035. IN11 := FALSE, // BOOL
  2036. IN20 := TRUE, // BOOL
  2037. IN21 := FALSE, // BOOL
  2038. IN30 := FALSE, // BOOL
  2039. // VAR_OUTPUT
  2040. OUT20 := M 0.2, // BOOL
  2041. OUT30 := M 0.3, // BOOL
  2042. // VAR_IN_OUT
  2043. INOUT0 := M 10.0, // BOOL
  2044. INOUT1 := M 10.1, // BOOL
  2045. INOUT2 := M 10.2, // BOOL
  2046. INOUT3 := M 10.3, // BOOL
  2047. )
  2048. __ASSERT== M 0.2, FALSE
  2049. __ASSERT== M 0.3, TRUE
  2050. __ASSERT== M 10.0, FALSE
  2051. __ASSERT== M 10.1, FALSE
  2052. __ASSERT== M 10.2, FALSE
  2053. __ASSERT== M 10.3, TRUE
  2054. L 0
  2055. T MB 0
  2056. CALL "FC_sr_2" (
  2057. // VAR_INPUT
  2058. IN00 := FALSE, // BOOL
  2059. IN10 := FALSE, // BOOL
  2060. IN11 := FALSE, // BOOL
  2061. IN20 := FALSE, // BOOL
  2062. IN21 := FALSE, // BOOL
  2063. IN30 := TRUE, // BOOL
  2064. // VAR_OUTPUT
  2065. OUT20 := M 0.2, // BOOL
  2066. OUT30 := M 0.3, // BOOL
  2067. // VAR_IN_OUT
  2068. INOUT0 := M 10.0, // BOOL
  2069. INOUT1 := M 10.1, // BOOL
  2070. INOUT2 := M 10.2, // BOOL
  2071. INOUT3 := M 10.3, // BOOL
  2072. )
  2073. __ASSERT== M 0.2, FALSE
  2074. __ASSERT== M 0.3, FALSE
  2075. __ASSERT== M 10.0, FALSE
  2076. __ASSERT== M 10.1, FALSE
  2077. __ASSERT== M 10.2, FALSE
  2078. __ASSERT== M 10.3, FALSE
  2079. L 0
  2080. T MB 0
  2081. CALL "FC_sr_2" (
  2082. // VAR_INPUT
  2083. IN00 := FALSE, // BOOL
  2084. IN10 := FALSE, // BOOL
  2085. IN11 := TRUE, // BOOL
  2086. IN20 := FALSE, // BOOL
  2087. IN21 := FALSE, // BOOL
  2088. IN30 := FALSE, // BOOL
  2089. // VAR_OUTPUT
  2090. OUT20 := M 0.2, // BOOL
  2091. OUT30 := M 0.3, // BOOL
  2092. // VAR_IN_OUT
  2093. INOUT0 := M 10.0, // BOOL
  2094. INOUT1 := M 10.1, // BOOL
  2095. INOUT2 := M 10.2, // BOOL
  2096. INOUT3 := M 10.3, // BOOL
  2097. )
  2098. __ASSERT== M 0.2, FALSE
  2099. __ASSERT== M 0.3, FALSE
  2100. __ASSERT== M 10.0, FALSE
  2101. __ASSERT== M 10.1, TRUE
  2102. __ASSERT== M 10.2, FALSE
  2103. __ASSERT== M 10.3, FALSE
  2104. L 0
  2105. T MB 0
  2106. CALL "FC_sr_2" (
  2107. // VAR_INPUT
  2108. IN00 := FALSE, // BOOL
  2109. IN10 := FALSE, // BOOL
  2110. IN11 := FALSE, // BOOL
  2111. IN20 := FALSE, // BOOL
  2112. IN21 := TRUE, // BOOL
  2113. IN30 := FALSE, // BOOL
  2114. // VAR_OUTPUT
  2115. OUT20 := M 0.2, // BOOL
  2116. OUT30 := M 0.3, // BOOL
  2117. // VAR_IN_OUT
  2118. INOUT0 := M 10.0, // BOOL
  2119. INOUT1 := M 10.1, // BOOL
  2120. INOUT2 := M 10.2, // BOOL
  2121. INOUT3 := M 10.3, // BOOL
  2122. )
  2123. __ASSERT== M 0.2, TRUE
  2124. __ASSERT== M 0.3, FALSE
  2125. __ASSERT== M 10.0, FALSE
  2126. __ASSERT== M 10.1, TRUE
  2127. __ASSERT== M 10.2, TRUE
  2128. __ASSERT== M 10.3, FALSE
  2129. BE
  2130. END_FUNCTION
  2131. ]]></source>
  2132. <!-- AWL/STL source code -->
  2133. <source enabled="1"
  2134. name="TEST sr 3"
  2135. type="0"><![CDATA[
  2136. FUNCTION "FC_TEST_sr_3" : VOID
  2137. BEGIN
  2138. // Reset flip-flops
  2139. L 0
  2140. T MB 10
  2141. CALL "FC_sr_3" (
  2142. // VAR_INPUT
  2143. IN0 := FALSE, // BOOL
  2144. IN1 := FALSE, // BOOL
  2145. IN2 := FALSE, // BOOL
  2146. IN3 := FALSE, // BOOL
  2147. // VAR_IN_OUT
  2148. INOUT0 := M 10.0, // BOOL
  2149. INOUT1 := M 10.1, // BOOL
  2150. INOUT2 := M 10.2, // BOOL
  2151. INOUT3 := M 10.3, // BOOL
  2152. )
  2153. __ASSERT== M 10.0, FALSE
  2154. __ASSERT== M 10.1, FALSE
  2155. __ASSERT== M 10.2, TRUE
  2156. __ASSERT== M 10.3, FALSE
  2157. CALL "FC_sr_3" (
  2158. // VAR_INPUT
  2159. IN0 := TRUE, // BOOL
  2160. IN1 := FALSE, // BOOL
  2161. IN2 := FALSE, // BOOL
  2162. IN3 := FALSE, // BOOL
  2163. // VAR_IN_OUT
  2164. INOUT0 := M 10.0, // BOOL
  2165. INOUT1 := M 10.1, // BOOL
  2166. INOUT2 := M 10.2, // BOOL
  2167. INOUT3 := M 10.3, // BOOL
  2168. )
  2169. __ASSERT== M 10.0, TRUE
  2170. __ASSERT== M 10.1, FALSE
  2171. __ASSERT== M 10.2, TRUE
  2172. __ASSERT== M 10.3, FALSE
  2173. CALL "FC_sr_3" (
  2174. // VAR_INPUT
  2175. IN0 := FALSE, // BOOL
  2176. IN1 := TRUE, // BOOL
  2177. IN2 := FALSE, // BOOL
  2178. IN3 := FALSE, // BOOL
  2179. // VAR_IN_OUT
  2180. INOUT0 := M 10.0, // BOOL
  2181. INOUT1 := M 10.1, // BOOL
  2182. INOUT2 := M 10.2, // BOOL
  2183. INOUT3 := M 10.3, // BOOL
  2184. )
  2185. __ASSERT== M 10.0, TRUE
  2186. __ASSERT== M 10.1, FALSE
  2187. __ASSERT== M 10.2, TRUE
  2188. __ASSERT== M 10.3, FALSE
  2189. CALL "FC_sr_3" (
  2190. // VAR_INPUT
  2191. IN0 := FALSE, // BOOL
  2192. IN1 := FALSE, // BOOL
  2193. IN2 := TRUE, // BOOL
  2194. IN3 := FALSE, // BOOL
  2195. // VAR_IN_OUT
  2196. INOUT0 := M 10.0, // BOOL
  2197. INOUT1 := M 10.1, // BOOL
  2198. INOUT2 := M 10.2, // BOOL
  2199. INOUT3 := M 10.3, // BOOL
  2200. )
  2201. __ASSERT== M 10.0, TRUE
  2202. __ASSERT== M 10.1, FALSE
  2203. __ASSERT== M 10.2, TRUE
  2204. __ASSERT== M 10.3, FALSE
  2205. CALL "FC_sr_3" (
  2206. // VAR_INPUT
  2207. IN0 := FALSE, // BOOL
  2208. IN1 := FALSE, // BOOL
  2209. IN2 := FALSE, // BOOL
  2210. IN3 := TRUE, // BOOL
  2211. // VAR_IN_OUT
  2212. INOUT0 := M 10.0, // BOOL
  2213. INOUT1 := M 10.1, // BOOL
  2214. INOUT2 := M 10.2, // BOOL
  2215. INOUT3 := M 10.3, // BOOL
  2216. )
  2217. __ASSERT== M 10.0, TRUE
  2218. __ASSERT== M 10.1, FALSE
  2219. __ASSERT== M 10.2, TRUE
  2220. __ASSERT== M 10.3, FALSE
  2221. // Set flip-flops
  2222. L W#16#FF
  2223. T MB 10
  2224. CALL "FC_sr_3" (
  2225. // VAR_INPUT
  2226. IN0 := FALSE, // BOOL
  2227. IN1 := FALSE, // BOOL
  2228. IN2 := FALSE, // BOOL
  2229. IN3 := FALSE, // BOOL
  2230. // VAR_IN_OUT
  2231. INOUT0 := M 10.0, // BOOL
  2232. INOUT1 := M 10.1, // BOOL
  2233. INOUT2 := M 10.2, // BOOL
  2234. INOUT3 := M 10.3, // BOOL
  2235. )
  2236. __ASSERT== M 10.0, TRUE
  2237. __ASSERT== M 10.1, TRUE
  2238. __ASSERT== M 10.2, TRUE
  2239. __ASSERT== M 10.3, FALSE
  2240. CALL "FC_sr_3" (
  2241. // VAR_INPUT
  2242. IN0 := TRUE, // BOOL
  2243. IN1 := FALSE, // BOOL
  2244. IN2 := FALSE, // BOOL
  2245. IN3 := FALSE, // BOOL
  2246. // VAR_IN_OUT
  2247. INOUT0 := M 10.0, // BOOL
  2248. INOUT1 := M 10.1, // BOOL
  2249. INOUT2 := M 10.2, // BOOL
  2250. INOUT3 := M 10.3, // BOOL
  2251. )
  2252. __ASSERT== M 10.0, TRUE
  2253. __ASSERT== M 10.1, TRUE
  2254. __ASSERT== M 10.2, TRUE
  2255. __ASSERT== M 10.3, FALSE
  2256. CALL "FC_sr_3" (
  2257. // VAR_INPUT
  2258. IN0 := FALSE, // BOOL
  2259. IN1 := TRUE, // BOOL
  2260. IN2 := FALSE, // BOOL
  2261. IN3 := FALSE, // BOOL
  2262. // VAR_IN_OUT
  2263. INOUT0 := M 10.0, // BOOL
  2264. INOUT1 := M 10.1, // BOOL
  2265. INOUT2 := M 10.2, // BOOL
  2266. INOUT3 := M 10.3, // BOOL
  2267. )
  2268. __ASSERT== M 10.0, TRUE
  2269. __ASSERT== M 10.1, FALSE
  2270. __ASSERT== M 10.2, TRUE
  2271. __ASSERT== M 10.3, FALSE
  2272. CALL "FC_sr_3" (
  2273. // VAR_INPUT
  2274. IN0 := FALSE, // BOOL
  2275. IN1 := FALSE, // BOOL
  2276. IN2 := TRUE, // BOOL
  2277. IN3 := FALSE, // BOOL
  2278. // VAR_IN_OUT
  2279. INOUT0 := M 10.0, // BOOL
  2280. INOUT1 := M 10.1, // BOOL
  2281. INOUT2 := M 10.2, // BOOL
  2282. INOUT3 := M 10.3, // BOOL
  2283. )
  2284. __ASSERT== M 10.0, TRUE
  2285. __ASSERT== M 10.1, FALSE
  2286. __ASSERT== M 10.2, TRUE
  2287. __ASSERT== M 10.3, FALSE
  2288. CALL "FC_sr_3" (
  2289. // VAR_INPUT
  2290. IN0 := FALSE, // BOOL
  2291. IN1 := FALSE, // BOOL
  2292. IN2 := FALSE, // BOOL
  2293. IN3 := TRUE, // BOOL
  2294. // VAR_IN_OUT
  2295. INOUT0 := M 10.0, // BOOL
  2296. INOUT1 := M 10.1, // BOOL
  2297. INOUT2 := M 10.2, // BOOL
  2298. INOUT3 := M 10.3, // BOOL
  2299. )
  2300. __ASSERT== M 10.0, TRUE
  2301. __ASSERT== M 10.1, FALSE
  2302. __ASSERT== M 10.2, TRUE
  2303. __ASSERT== M 10.3, FALSE
  2304. BE
  2305. END_FUNCTION
  2306. ]]></source>
  2307. <!-- AWL/STL source code -->
  2308. <source enabled="1"
  2309. name="TEST sr 4"
  2310. type="0"><![CDATA[
  2311. FUNCTION "FC_TEST_sr_4" : VOID
  2312. BEGIN
  2313. // Reset flip-flops
  2314. L 0
  2315. T MB 10
  2316. L 0
  2317. T MB 0
  2318. CALL "FC_sr_4" (
  2319. // VAR_INPUT
  2320. IN00 := FALSE, // BOOL
  2321. IN01 := FALSE, // BOOL
  2322. IN10 := FALSE, // BOOL
  2323. IN11 := FALSE, // BOOL
  2324. // VAR_OUTPUT
  2325. OUT0 := M 0.0, // BOOL
  2326. OUT1 := M 0.1, // BOOL
  2327. // VAR_IN_OUT
  2328. INOUT0 := M 10.0, // BOOL
  2329. INOUT1 := M 10.1, // BOOL
  2330. )
  2331. __ASSERT== M 10.0, FALSE
  2332. __ASSERT== M 10.1, TRUE
  2333. __ASSERT<> M 0.0, M 10.0
  2334. __ASSERT<> M 0.1, M 10.1
  2335. L 0
  2336. T MB 0
  2337. CALL "FC_sr_4" (
  2338. // VAR_INPUT
  2339. IN00 := TRUE, // BOOL
  2340. IN01 := FALSE, // BOOL
  2341. IN10 := FALSE, // BOOL
  2342. IN11 := FALSE, // BOOL
  2343. // VAR_OUTPUT
  2344. OUT0 := M 0.0, // BOOL
  2345. OUT1 := M 0.1, // BOOL
  2346. // VAR_IN_OUT
  2347. INOUT0 := M 10.0, // BOOL
  2348. INOUT1 := M 10.1, // BOOL
  2349. )
  2350. __ASSERT== M 10.0, FALSE
  2351. __ASSERT== M 10.1, TRUE
  2352. __ASSERT<> M 0.0, M 10.0
  2353. __ASSERT<> M 0.1, M 10.1
  2354. L 0
  2355. T MB 0
  2356. CALL "FC_sr_4" (
  2357. // VAR_INPUT
  2358. IN00 := FALSE, // BOOL
  2359. IN01 := TRUE, // BOOL
  2360. IN10 := FALSE, // BOOL
  2361. IN11 := FALSE, // BOOL
  2362. // VAR_OUTPUT
  2363. OUT0 := M 0.0, // BOOL
  2364. OUT1 := M 0.1, // BOOL
  2365. // VAR_IN_OUT
  2366. INOUT0 := M 10.0, // BOOL
  2367. INOUT1 := M 10.1, // BOOL
  2368. )
  2369. __ASSERT== M 10.0, TRUE
  2370. __ASSERT== M 10.1, TRUE
  2371. __ASSERT<> M 0.0, M 10.0
  2372. __ASSERT<> M 0.1, M 10.1
  2373. L 0
  2374. T MB 0
  2375. CALL "FC_sr_4" (
  2376. // VAR_INPUT
  2377. IN00 := FALSE, // BOOL
  2378. IN01 := FALSE, // BOOL
  2379. IN10 := TRUE, // BOOL
  2380. IN11 := FALSE, // BOOL
  2381. // VAR_OUTPUT
  2382. OUT0 := M 0.0, // BOOL
  2383. OUT1 := M 0.1, // BOOL
  2384. // VAR_IN_OUT
  2385. INOUT0 := M 10.0, // BOOL
  2386. INOUT1 := M 10.1, // BOOL
  2387. )
  2388. __ASSERT== M 10.0, FALSE
  2389. __ASSERT== M 10.1, TRUE
  2390. __ASSERT<> M 0.0, M 10.0
  2391. __ASSERT<> M 0.1, M 10.1
  2392. L 0
  2393. T MB 0
  2394. CALL "FC_sr_4" (
  2395. // VAR_INPUT
  2396. IN00 := FALSE, // BOOL
  2397. IN01 := FALSE, // BOOL
  2398. IN10 := FALSE, // BOOL
  2399. IN11 := TRUE, // BOOL
  2400. // VAR_OUTPUT
  2401. OUT0 := M 0.0, // BOOL
  2402. OUT1 := M 0.1, // BOOL
  2403. // VAR_IN_OUT
  2404. INOUT0 := M 10.0, // BOOL
  2405. INOUT1 := M 10.1, // BOOL
  2406. )
  2407. __ASSERT== M 10.0, FALSE
  2408. __ASSERT== M 10.1, FALSE
  2409. __ASSERT<> M 0.0, M 10.0
  2410. __ASSERT<> M 0.1, M 10.1
  2411. // Set flip-flops
  2412. L W#16#FF
  2413. T MB 10
  2414. L 0
  2415. T MB 0
  2416. CALL "FC_sr_4" (
  2417. // VAR_INPUT
  2418. IN00 := FALSE, // BOOL
  2419. IN01 := FALSE, // BOOL
  2420. IN10 := FALSE, // BOOL
  2421. IN11 := FALSE, // BOOL
  2422. // VAR_OUTPUT
  2423. OUT0 := M 0.0, // BOOL
  2424. OUT1 := M 0.1, // BOOL
  2425. // VAR_IN_OUT
  2426. INOUT0 := M 10.0, // BOOL
  2427. INOUT1 := M 10.1, // BOOL
  2428. )
  2429. __ASSERT== M 10.0, FALSE
  2430. __ASSERT== M 10.1, TRUE
  2431. __ASSERT<> M 0.0, M 10.0
  2432. __ASSERT<> M 0.1, M 10.1
  2433. L 0
  2434. T MB 0
  2435. CALL "FC_sr_4" (
  2436. // VAR_INPUT
  2437. IN00 := TRUE, // BOOL
  2438. IN01 := FALSE, // BOOL
  2439. IN10 := FALSE, // BOOL
  2440. IN11 := FALSE, // BOOL
  2441. // VAR_OUTPUT
  2442. OUT0 := M 0.0, // BOOL
  2443. OUT1 := M 0.1, // BOOL
  2444. // VAR_IN_OUT
  2445. INOUT0 := M 10.0, // BOOL
  2446. INOUT1 := M 10.1, // BOOL
  2447. )
  2448. __ASSERT== M 10.0, FALSE
  2449. __ASSERT== M 10.1, TRUE
  2450. __ASSERT<> M 0.0, M 10.0
  2451. __ASSERT<> M 0.1, M 10.1
  2452. L 0
  2453. T MB 0
  2454. CALL "FC_sr_4" (
  2455. // VAR_INPUT
  2456. IN00 := FALSE, // BOOL
  2457. IN01 := TRUE, // BOOL
  2458. IN10 := FALSE, // BOOL
  2459. IN11 := FALSE, // BOOL
  2460. // VAR_OUTPUT
  2461. OUT0 := M 0.0, // BOOL
  2462. OUT1 := M 0.1, // BOOL
  2463. // VAR_IN_OUT
  2464. INOUT0 := M 10.0, // BOOL
  2465. INOUT1 := M 10.1, // BOOL
  2466. )
  2467. __ASSERT== M 10.0, TRUE
  2468. __ASSERT== M 10.1, TRUE
  2469. __ASSERT<> M 0.0, M 10.0
  2470. __ASSERT<> M 0.1, M 10.1
  2471. L 0
  2472. T MB 0
  2473. CALL "FC_sr_4" (
  2474. // VAR_INPUT
  2475. IN00 := FALSE, // BOOL
  2476. IN01 := FALSE, // BOOL
  2477. IN10 := TRUE, // BOOL
  2478. IN11 := FALSE, // BOOL
  2479. // VAR_OUTPUT
  2480. OUT0 := M 0.0, // BOOL
  2481. OUT1 := M 0.1, // BOOL
  2482. // VAR_IN_OUT
  2483. INOUT0 := M 10.0, // BOOL
  2484. INOUT1 := M 10.1, // BOOL
  2485. )
  2486. __ASSERT== M 10.0, FALSE
  2487. __ASSERT== M 10.1, TRUE
  2488. __ASSERT<> M 0.0, M 10.0
  2489. __ASSERT<> M 0.1, M 10.1
  2490. L 0
  2491. T MB 0
  2492. CALL "FC_sr_4" (
  2493. // VAR_INPUT
  2494. IN00 := FALSE, // BOOL
  2495. IN01 := FALSE, // BOOL
  2496. IN10 := FALSE, // BOOL
  2497. IN11 := TRUE, // BOOL
  2498. // VAR_OUTPUT
  2499. OUT0 := M 0.0, // BOOL
  2500. OUT1 := M 0.1, // BOOL
  2501. // VAR_IN_OUT
  2502. INOUT0 := M 10.0, // BOOL
  2503. INOUT1 := M 10.1, // BOOL
  2504. )
  2505. __ASSERT== M 10.0, FALSE
  2506. __ASSERT== M 10.1, FALSE
  2507. __ASSERT<> M 0.0, M 10.0
  2508. __ASSERT<> M 0.1, M 10.1
  2509. BE
  2510. END_FUNCTION
  2511. ]]></source>
  2512. <!-- AWL/STL source code -->
  2513. <source enabled="1"
  2514. name="TEST sr 5"
  2515. type="0"><![CDATA[
  2516. FUNCTION "FC_TEST_sr_5" : VOID
  2517. BEGIN
  2518. // Reset flip-flops
  2519. L 0
  2520. T MB 10
  2521. L 0
  2522. T MB 0
  2523. CALL "FC_sr_5" (
  2524. // VAR_INPUT
  2525. IN00 := FALSE, // BOOL
  2526. IN01 := TRUE, // BOOL
  2527. IN11 := FALSE, // BOOL
  2528. IN21 := FALSE, // BOOL
  2529. IN30 := TRUE, // BOOL
  2530. // VAR_OUTPUT
  2531. OUT1 := M 0.1, // BOOL
  2532. OUT3 := M 0.3, // BOOL
  2533. // VAR_IN_OUT
  2534. INOUT1 := M 10.1, // BOOL
  2535. INOUT2 := M 10.2, // BOOL
  2536. )
  2537. __ASSERT== M 10.1, FALSE
  2538. __ASSERT== M 10.2, FALSE
  2539. __ASSERT== M 0.1, M 10.1
  2540. __ASSERT== M 0.3, M 10.2
  2541. L 0
  2542. T MB 0
  2543. CALL "FC_sr_5" (
  2544. // VAR_INPUT
  2545. IN00 := TRUE, // BOOL
  2546. IN01 := TRUE, // BOOL
  2547. IN11 := FALSE, // BOOL
  2548. IN21 := FALSE, // BOOL
  2549. IN30 := TRUE, // BOOL
  2550. // VAR_OUTPUT
  2551. OUT1 := M 0.1, // BOOL
  2552. OUT3 := M 0.3, // BOOL
  2553. // VAR_IN_OUT
  2554. INOUT1 := M 10.1, // BOOL
  2555. INOUT2 := M 10.2, // BOOL
  2556. )
  2557. __ASSERT== M 10.1, TRUE
  2558. __ASSERT== M 10.2, TRUE
  2559. __ASSERT== M 0.1, M 10.1
  2560. __ASSERT== M 0.3, M 10.2
  2561. L 0
  2562. T MB 0
  2563. CALL "FC_sr_5" (
  2564. // VAR_INPUT
  2565. IN00 := FALSE, // BOOL
  2566. IN01 := TRUE, // BOOL
  2567. IN11 := FALSE, // BOOL
  2568. IN21 := FALSE, // BOOL
  2569. IN30 := TRUE, // BOOL
  2570. // VAR_OUTPUT
  2571. OUT1 := M 0.1, // BOOL
  2572. OUT3 := M 0.3, // BOOL
  2573. // VAR_IN_OUT
  2574. INOUT1 := M 10.1, // BOOL
  2575. INOUT2 := M 10.2, // BOOL
  2576. )
  2577. __ASSERT== M 10.1, TRUE
  2578. __ASSERT== M 10.2, TRUE
  2579. __ASSERT== M 0.1, M 10.1
  2580. __ASSERT== M 0.3, M 10.2
  2581. L 0
  2582. T MB 0
  2583. CALL "FC_sr_5" (
  2584. // VAR_INPUT
  2585. IN00 := FALSE, // BOOL
  2586. IN01 := TRUE, // BOOL
  2587. IN11 := FALSE, // BOOL
  2588. IN21 := TRUE, // BOOL
  2589. IN30 := TRUE, // BOOL
  2590. // VAR_OUTPUT
  2591. OUT1 := M 0.1, // BOOL
  2592. OUT3 := M 0.3, // BOOL
  2593. // VAR_IN_OUT
  2594. INOUT1 := M 10.1, // BOOL
  2595. INOUT2 := M 10.2, // BOOL
  2596. )
  2597. __ASSERT== M 10.1, TRUE
  2598. __ASSERT== M 10.2, FALSE
  2599. __ASSERT== M 0.1, M 10.1
  2600. __ASSERT== M 0.3, M 10.2
  2601. L 0
  2602. T MB 0
  2603. CALL "FC_sr_5" (
  2604. // VAR_INPUT
  2605. IN00 := FALSE, // BOOL
  2606. IN01 := TRUE, // BOOL
  2607. IN11 := TRUE, // BOOL
  2608. IN21 := FALSE, // BOOL
  2609. IN30 := TRUE, // BOOL
  2610. // VAR_OUTPUT
  2611. OUT1 := M 0.1, // BOOL
  2612. OUT3 := M 0.3, // BOOL
  2613. // VAR_IN_OUT
  2614. INOUT1 := M 10.1, // BOOL
  2615. INOUT2 := M 10.2, // BOOL
  2616. )
  2617. __ASSERT== M 10.1, FALSE
  2618. __ASSERT== M 10.2, FALSE
  2619. __ASSERT== M 0.1, M 10.1
  2620. __ASSERT== M 0.3, M 10.2
  2621. BE
  2622. END_FUNCTION
  2623. ]]></source>
  2624. <!-- AWL/STL source code -->
  2625. <source enabled="1"
  2626. name="TEST sr 6"
  2627. type="0"><![CDATA[
  2628. FUNCTION "FC_TEST_sr_6" : VOID
  2629. BEGIN
  2630. // Reset flip-flops
  2631. L 0
  2632. T MB 10
  2633. CALL "FC_sr_6" (
  2634. // VAR_INPUT
  2635. IN0 := FALSE, // BOOL
  2636. IN2 := FALSE, // BOOL
  2637. // VAR_IN_OUT
  2638. INOUT0 := M 10.0, // BOOL
  2639. INOUT1 := M 10.1, // BOOL
  2640. INOUT2 := M 10.2, // BOOL
  2641. INOUT3 := M 10.3, // BOOL
  2642. INOUT4 := M 10.4, // BOOL
  2643. )
  2644. __ASSERT== M 10.0, FALSE
  2645. __ASSERT== M 10.1, FALSE
  2646. __ASSERT== M 10.2, FALSE
  2647. __ASSERT== M 10.3, FALSE
  2648. __ASSERT== M 10.4, FALSE
  2649. CALL "FC_sr_6" (
  2650. // VAR_INPUT
  2651. IN0 := TRUE, // BOOL
  2652. IN2 := FALSE, // BOOL
  2653. // VAR_IN_OUT
  2654. INOUT0 := M 10.0, // BOOL
  2655. INOUT1 := M 10.1, // BOOL
  2656. INOUT2 := M 10.2, // BOOL
  2657. INOUT3 := M 10.3, // BOOL
  2658. INOUT4 := M 10.4, // BOOL
  2659. )
  2660. __ASSERT== M 10.0, TRUE
  2661. __ASSERT== M 10.1, FALSE
  2662. __ASSERT== M 10.2, FALSE
  2663. __ASSERT== M 10.3, FALSE
  2664. __ASSERT== M 10.4, FALSE
  2665. CALL "FC_sr_6" (
  2666. // VAR_INPUT
  2667. IN0 := FALSE, // BOOL
  2668. IN2 := TRUE, // BOOL
  2669. // VAR_IN_OUT
  2670. INOUT0 := M 10.0, // BOOL
  2671. INOUT1 := M 10.1, // BOOL
  2672. INOUT2 := M 10.2, // BOOL
  2673. INOUT3 := M 10.3, // BOOL
  2674. INOUT4 := M 10.4, // BOOL
  2675. )
  2676. __ASSERT== M 10.0, TRUE
  2677. __ASSERT== M 10.1, FALSE
  2678. __ASSERT== M 10.2, FALSE
  2679. __ASSERT== M 10.3, FALSE
  2680. __ASSERT== M 10.4, FALSE
  2681. CALL "FC_sr_6" (
  2682. // VAR_INPUT
  2683. IN0 := TRUE, // BOOL
  2684. IN2 := TRUE, // BOOL
  2685. // VAR_IN_OUT
  2686. INOUT0 := M 10.0, // BOOL
  2687. INOUT1 := M 10.1, // BOOL
  2688. INOUT2 := M 10.2, // BOOL
  2689. INOUT3 := M 10.3, // BOOL
  2690. INOUT4 := M 10.4, // BOOL
  2691. )
  2692. __ASSERT== M 10.0, TRUE
  2693. __ASSERT== M 10.1, FALSE
  2694. __ASSERT== M 10.2, FALSE
  2695. __ASSERT== M 10.3, FALSE
  2696. __ASSERT== M 10.4, FALSE
  2697. CALL "FC_sr_6" (
  2698. // VAR_INPUT
  2699. IN0 := FALSE, // BOOL
  2700. IN2 := FALSE, // BOOL
  2701. // VAR_IN_OUT
  2702. INOUT0 := M 10.0, // BOOL
  2703. INOUT1 := M 10.1, // BOOL
  2704. INOUT2 := M 10.2, // BOOL
  2705. INOUT3 := M 10.3, // BOOL
  2706. INOUT4 := M 10.4, // BOOL
  2707. )
  2708. __ASSERT== M 10.0, TRUE
  2709. __ASSERT== M 10.1, FALSE
  2710. __ASSERT== M 10.2, FALSE
  2711. __ASSERT== M 10.3, FALSE
  2712. __ASSERT== M 10.4, FALSE
  2713. // Set flip-flops
  2714. L W#16#FF
  2715. T MB 10
  2716. CALL "FC_sr_6" (
  2717. // VAR_INPUT
  2718. IN0 := TRUE, // BOOL
  2719. IN2 := TRUE, // BOOL
  2720. // VAR_IN_OUT
  2721. INOUT0 := M 10.0, // BOOL
  2722. INOUT1 := M 10.1, // BOOL
  2723. INOUT2 := M 10.2, // BOOL
  2724. INOUT3 := M 10.3, // BOOL
  2725. INOUT4 := M 10.4, // BOOL
  2726. )
  2727. __ASSERT== M 10.0, TRUE
  2728. __ASSERT== M 10.1, FALSE
  2729. __ASSERT== M 10.2, TRUE
  2730. __ASSERT== M 10.3, TRUE
  2731. __ASSERT== M 10.4, FALSE
  2732. CALL "FC_sr_6" (
  2733. // VAR_INPUT
  2734. IN0 := TRUE, // BOOL
  2735. IN2 := FALSE, // BOOL
  2736. // VAR_IN_OUT
  2737. INOUT0 := M 10.0, // BOOL
  2738. INOUT1 := M 10.1, // BOOL
  2739. INOUT2 := M 10.2, // BOOL
  2740. INOUT3 := M 10.3, // BOOL
  2741. INOUT4 := M 10.4, // BOOL
  2742. )
  2743. __ASSERT== M 10.0, TRUE
  2744. __ASSERT== M 10.1, FALSE
  2745. __ASSERT== M 10.2, FALSE
  2746. __ASSERT== M 10.3, TRUE
  2747. __ASSERT== M 10.4, FALSE
  2748. CALL "FC_sr_6" (
  2749. // VAR_INPUT
  2750. IN0 := FALSE, // BOOL
  2751. IN2 := TRUE, // BOOL
  2752. // VAR_IN_OUT
  2753. INOUT0 := M 10.0, // BOOL
  2754. INOUT1 := M 10.1, // BOOL
  2755. INOUT2 := M 10.2, // BOOL
  2756. INOUT3 := M 10.3, // BOOL
  2757. INOUT4 := M 10.4, // BOOL
  2758. )
  2759. __ASSERT== M 10.0, TRUE
  2760. __ASSERT== M 10.1, FALSE
  2761. __ASSERT== M 10.2, FALSE
  2762. __ASSERT== M 10.3, TRUE
  2763. __ASSERT== M 10.4, FALSE
  2764. CALL "FC_sr_6" (
  2765. // VAR_INPUT
  2766. IN0 := TRUE, // BOOL
  2767. IN2 := TRUE, // BOOL
  2768. // VAR_IN_OUT
  2769. INOUT0 := M 10.0, // BOOL
  2770. INOUT1 := M 10.1, // BOOL
  2771. INOUT2 := M 10.2, // BOOL
  2772. INOUT3 := M 10.3, // BOOL
  2773. INOUT4 := M 10.4, // BOOL
  2774. )
  2775. __ASSERT== M 10.0, TRUE
  2776. __ASSERT== M 10.1, FALSE
  2777. __ASSERT== M 10.2, FALSE
  2778. __ASSERT== M 10.3, TRUE
  2779. __ASSERT== M 10.4, FALSE
  2780. CALL "FC_sr_6" (
  2781. // VAR_INPUT
  2782. IN0 := FALSE, // BOOL
  2783. IN2 := FALSE, // BOOL
  2784. // VAR_IN_OUT
  2785. INOUT0 := M 10.0, // BOOL
  2786. INOUT1 := M 10.1, // BOOL
  2787. INOUT2 := M 10.2, // BOOL
  2788. INOUT3 := M 10.3, // BOOL
  2789. INOUT4 := M 10.4, // BOOL
  2790. )
  2791. __ASSERT== M 10.0, TRUE
  2792. __ASSERT== M 10.1, FALSE
  2793. __ASSERT== M 10.2, FALSE
  2794. __ASSERT== M 10.3, TRUE
  2795. __ASSERT== M 10.4, FALSE
  2796. BE
  2797. END_FUNCTION
  2798. ]]></source>
  2799. <!-- AWL/STL source code -->
  2800. <source enabled="1"
  2801. name="TEST edge 1"
  2802. type="0"><![CDATA[
  2803. FUNCTION "FC_TEST_edge_1" : VOID
  2804. BEGIN
  2805. // Initialize edge memory
  2806. CLR
  2807. = M 10.0
  2808. = M 10.1
  2809. = M 10.2
  2810. = M 10.3
  2811. L 0
  2812. T MB 0
  2813. CALL "FC_edge_1" (
  2814. // VAR_INPUT
  2815. IN0 := FALSE, // BOOL
  2816. IN1 := FALSE, // BOOL
  2817. IN2 := FALSE, // BOOL
  2818. IN3 := FALSE, // BOOL
  2819. // VAR_OUTPUT
  2820. OUT0 := M 0.0, // BOOL
  2821. OUT1 := M 0.1, // BOOL
  2822. OUT2 := M 0.2, // BOOL
  2823. OUT3 := M 0.3, // BOOL
  2824. // VAR_IN_OUT
  2825. INOUT0 := M 10.0, // BOOL
  2826. INOUT1 := M 10.1, // BOOL
  2827. INOUT2 := M 10.2, // BOOL
  2828. INOUT3 := M 10.3, // BOOL
  2829. )
  2830. __ASSERT== M 10.0, FALSE
  2831. __ASSERT== M 10.1, FALSE
  2832. __ASSERT== M 10.2, TRUE
  2833. __ASSERT== M 10.3, TRUE
  2834. __ASSERT== M 0.0, FALSE
  2835. __ASSERT== M 0.1, FALSE
  2836. __ASSERT== M 0.2, TRUE
  2837. __ASSERT== M 0.3, TRUE
  2838. L 0
  2839. T MB 0
  2840. CALL "FC_edge_1" (
  2841. // VAR_INPUT
  2842. IN0 := TRUE, // BOOL
  2843. IN1 := FALSE, // BOOL
  2844. IN2 := FALSE, // BOOL
  2845. IN3 := FALSE, // BOOL
  2846. // VAR_OUTPUT
  2847. OUT0 := M 0.0, // BOOL
  2848. OUT1 := M 0.1, // BOOL
  2849. OUT2 := M 0.2, // BOOL
  2850. OUT3 := M 0.3, // BOOL
  2851. // VAR_IN_OUT
  2852. INOUT0 := M 10.0, // BOOL
  2853. INOUT1 := M 10.1, // BOOL
  2854. INOUT2 := M 10.2, // BOOL
  2855. INOUT3 := M 10.3, // BOOL
  2856. )
  2857. __ASSERT== M 10.0, TRUE
  2858. __ASSERT== M 10.1, FALSE
  2859. __ASSERT== M 10.2, TRUE
  2860. __ASSERT== M 10.3, TRUE
  2861. __ASSERT== M 0.0, TRUE
  2862. __ASSERT== M 0.1, FALSE
  2863. __ASSERT== M 0.2, FALSE
  2864. __ASSERT== M 0.3, TRUE
  2865. L 0
  2866. T MB 0
  2867. CALL "FC_edge_1" (
  2868. // VAR_INPUT
  2869. IN0 := FALSE, // BOOL
  2870. IN1 := TRUE, // BOOL
  2871. IN2 := FALSE, // BOOL
  2872. IN3 := FALSE, // BOOL
  2873. // VAR_OUTPUT
  2874. OUT0 := M 0.0, // BOOL
  2875. OUT1 := M 0.1, // BOOL
  2876. OUT2 := M 0.2, // BOOL
  2877. OUT3 := M 0.3, // BOOL
  2878. // VAR_IN_OUT
  2879. INOUT0 := M 10.0, // BOOL
  2880. INOUT1 := M 10.1, // BOOL
  2881. INOUT2 := M 10.2, // BOOL
  2882. INOUT3 := M 10.3, // BOOL
  2883. )
  2884. __ASSERT== M 10.0, FALSE
  2885. __ASSERT== M 10.1, TRUE
  2886. __ASSERT== M 10.2, TRUE
  2887. __ASSERT== M 10.3, TRUE
  2888. __ASSERT== M 0.0, FALSE
  2889. __ASSERT== M 0.1, FALSE
  2890. __ASSERT== M 0.2, FALSE
  2891. __ASSERT== M 0.3, TRUE
  2892. L 0
  2893. T MB 0
  2894. CALL "FC_edge_1" (
  2895. // VAR_INPUT
  2896. IN0 := FALSE, // BOOL
  2897. IN1 := FALSE, // BOOL
  2898. IN2 := TRUE, // BOOL
  2899. IN3 := FALSE, // BOOL
  2900. // VAR_OUTPUT
  2901. OUT0 := M 0.0, // BOOL
  2902. OUT1 := M 0.1, // BOOL
  2903. OUT2 := M 0.2, // BOOL
  2904. OUT3 := M 0.3, // BOOL
  2905. // VAR_IN_OUT
  2906. INOUT0 := M 10.0, // BOOL
  2907. INOUT1 := M 10.1, // BOOL
  2908. INOUT2 := M 10.2, // BOOL
  2909. INOUT3 := M 10.3, // BOOL
  2910. )
  2911. __ASSERT== M 10.0, FALSE
  2912. __ASSERT== M 10.1, FALSE
  2913. __ASSERT== M 10.2, FALSE
  2914. __ASSERT== M 10.3, TRUE
  2915. __ASSERT== M 0.0, FALSE
  2916. __ASSERT== M 0.1, TRUE
  2917. __ASSERT== M 0.2, FALSE
  2918. __ASSERT== M 0.3, TRUE
  2919. L 0
  2920. T MB 0
  2921. CALL "FC_edge_1" (
  2922. // VAR_INPUT
  2923. IN0 := FALSE, // BOOL
  2924. IN1 := FALSE, // BOOL
  2925. IN2 := FALSE, // BOOL
  2926. IN3 := TRUE, // BOOL
  2927. // VAR_OUTPUT
  2928. OUT0 := M 0.0, // BOOL
  2929. OUT1 := M 0.1, // BOOL
  2930. OUT2 := M 0.2, // BOOL
  2931. OUT3 := M 0.3, // BOOL
  2932. // VAR_IN_OUT
  2933. INOUT0 := M 10.0, // BOOL
  2934. INOUT1 := M 10.1, // BOOL
  2935. INOUT2 := M 10.2, // BOOL
  2936. INOUT3 := M 10.3, // BOOL
  2937. )
  2938. __ASSERT== M 10.0, FALSE
  2939. __ASSERT== M 10.1, FALSE
  2940. __ASSERT== M 10.2, TRUE
  2941. __ASSERT== M 10.3, FALSE
  2942. __ASSERT== M 0.0, FALSE
  2943. __ASSERT== M 0.1, FALSE
  2944. __ASSERT== M 0.2, TRUE
  2945. __ASSERT== M 0.3, FALSE
  2946. L 0
  2947. T MB 0
  2948. CALL "FC_edge_1" (
  2949. // VAR_INPUT
  2950. IN0 := FALSE, // BOOL
  2951. IN1 := FALSE, // BOOL
  2952. IN2 := FALSE, // BOOL
  2953. IN3 := FALSE, // BOOL
  2954. // VAR_OUTPUT
  2955. OUT0 := M 0.0, // BOOL
  2956. OUT1 := M 0.1, // BOOL
  2957. OUT2 := M 0.2, // BOOL
  2958. OUT3 := M 0.3, // BOOL
  2959. // VAR_IN_OUT
  2960. INOUT0 := M 10.0, // BOOL
  2961. INOUT1 := M 10.1, // BOOL
  2962. INOUT2 := M 10.2, // BOOL
  2963. INOUT3 := M 10.3, // BOOL
  2964. )
  2965. __ASSERT== M 10.0, FALSE
  2966. __ASSERT== M 10.1, FALSE
  2967. __ASSERT== M 10.2, TRUE
  2968. __ASSERT== M 10.3, TRUE
  2969. __ASSERT== M 0.0, FALSE
  2970. __ASSERT== M 0.1, FALSE
  2971. __ASSERT== M 0.2, FALSE
  2972. __ASSERT== M 0.3, TRUE
  2973. L 0
  2974. T MB 0
  2975. CALL "FC_edge_1" (
  2976. // VAR_INPUT
  2977. IN0 := FALSE, // BOOL
  2978. IN1 := FALSE, // BOOL
  2979. IN2 := FALSE, // BOOL
  2980. IN3 := FALSE, // BOOL
  2981. // VAR_OUTPUT
  2982. OUT0 := M 0.0, // BOOL
  2983. OUT1 := M 0.1, // BOOL
  2984. OUT2 := M 0.2, // BOOL
  2985. OUT3 := M 0.3, // BOOL
  2986. // VAR_IN_OUT
  2987. INOUT0 := M 10.0, // BOOL
  2988. INOUT1 := M 10.1, // BOOL
  2989. INOUT2 := M 10.2, // BOOL
  2990. INOUT3 := M 10.3, // BOOL
  2991. )
  2992. __ASSERT== M 10.0, FALSE
  2993. __ASSERT== M 10.1, FALSE
  2994. __ASSERT== M 10.2, TRUE
  2995. __ASSERT== M 10.3, TRUE
  2996. __ASSERT== M 0.0, FALSE
  2997. __ASSERT== M 0.1, FALSE
  2998. __ASSERT== M 0.2, FALSE
  2999. __ASSERT== M 0.3, TRUE
  3000. BE
  3001. END_FUNCTION
  3002. ]]></source>
  3003. <!-- AWL/STL source code -->
  3004. <source enabled="1"
  3005. name="TEST edge 2"
  3006. type="0"><![CDATA[
  3007. FUNCTION "FC_TEST_edge_2" : VOID
  3008. BEGIN
  3009. // Initialize edge memory
  3010. L 0
  3011. T MB 10
  3012. L 0
  3013. T MB 0
  3014. CALL "FC_edge_2" (
  3015. // VAR_INPUT
  3016. IN00 := FALSE, // BOOL
  3017. IN01 := FALSE, // BOOL
  3018. IN21 := FALSE, // BOOL
  3019. // VAR_OUTPUT
  3020. OUT1 := M 0.1, // BOOL
  3021. OUT2 := M 0.2, // BOOL
  3022. // VAR_IN_OUT
  3023. INOUT1 := M 10.1, // BOOL
  3024. )
  3025. __ASSERT== M 10.1, FALSE
  3026. __ASSERT== M 0.1, FALSE
  3027. __ASSERT== M 0.2, FALSE
  3028. L 0
  3029. T MB 0
  3030. CALL "FC_edge_2" (
  3031. // VAR_INPUT
  3032. IN00 := FALSE, // BOOL
  3033. IN01 := FALSE, // BOOL
  3034. IN21 := FALSE, // BOOL
  3035. // VAR_OUTPUT
  3036. OUT1 := M 0.1, // BOOL
  3037. OUT2 := M 0.2, // BOOL
  3038. // VAR_IN_OUT
  3039. INOUT1 := M 10.1, // BOOL
  3040. )
  3041. __ASSERT== M 10.1, FALSE
  3042. __ASSERT== M 0.1, FALSE
  3043. __ASSERT== M 0.2, FALSE
  3044. L 0
  3045. T MB 0
  3046. CALL "FC_edge_2" (
  3047. // VAR_INPUT
  3048. IN00 := TRUE, // BOOL
  3049. IN01 := FALSE, // BOOL
  3050. IN21 := FALSE, // BOOL
  3051. // VAR_OUTPUT
  3052. OUT1 := M 0.1, // BOOL
  3053. OUT2 := M 0.2, // BOOL
  3054. // VAR_IN_OUT
  3055. INOUT1 := M 10.1, // BOOL
  3056. )
  3057. __ASSERT== M 10.1, TRUE
  3058. __ASSERT== M 0.1, TRUE
  3059. __ASSERT== M 0.2, TRUE
  3060. L 0
  3061. T MB 0
  3062. CALL "FC_edge_2" (
  3063. // VAR_INPUT
  3064. IN00 := TRUE, // BOOL
  3065. IN01 := FALSE, // BOOL
  3066. IN21 := FALSE, // BOOL
  3067. // VAR_OUTPUT
  3068. OUT1 := M 0.1, // BOOL
  3069. OUT2 := M 0.2, // BOOL
  3070. // VAR_IN_OUT
  3071. INOUT1 := M 10.1, // BOOL
  3072. )
  3073. __ASSERT== M 10.1, TRUE
  3074. __ASSERT== M 0.1, FALSE
  3075. __ASSERT== M 0.2, FALSE
  3076. L 0
  3077. T MB 0
  3078. CALL "FC_edge_2" (
  3079. // VAR_INPUT
  3080. IN00 := FALSE, // BOOL
  3081. IN01 := FALSE, // BOOL
  3082. IN21 := FALSE, // BOOL
  3083. // VAR_OUTPUT
  3084. OUT1 := M 0.1, // BOOL
  3085. OUT2 := M 0.2, // BOOL
  3086. // VAR_IN_OUT
  3087. INOUT1 := M 10.1, // BOOL
  3088. )
  3089. __ASSERT== M 10.1, FALSE
  3090. __ASSERT== M 0.1, FALSE
  3091. __ASSERT== M 0.2, FALSE
  3092. L 0
  3093. T MB 0
  3094. CALL "FC_edge_2" (
  3095. // VAR_INPUT
  3096. IN00 := FALSE, // BOOL
  3097. IN01 := FALSE, // BOOL
  3098. IN21 := FALSE, // BOOL
  3099. // VAR_OUTPUT
  3100. OUT1 := M 0.1, // BOOL
  3101. OUT2 := M 0.2, // BOOL
  3102. // VAR_IN_OUT
  3103. INOUT1 := M 10.1, // BOOL
  3104. )
  3105. __ASSERT== M 10.1, FALSE
  3106. __ASSERT== M 0.1, FALSE
  3107. __ASSERT== M 0.2, FALSE
  3108. BE
  3109. END_FUNCTION
  3110. ]]></source>
  3111. </language_awl>
  3112. <!-- FUP/FBD language configuration -->
  3113. <language_fup>
  3114. <!-- FUP/FBD source code -->
  3115. <source enabled="1"
  3116. name="assign"
  3117. type="1"><![CDATA[
  3118. <?xml version="1.0" encoding="UTF-8" standalone="yes"?>
  3119. <!-- Awlsim FUP/FBD source generated by awlsim-0.66.0-pre -->
  3120. <FUP version="0" zoom="1.0">
  3121. <blockdecl name='"FC_assign"' type="FC" />
  3122. <interface allow_initvalue="0"
  3123. allow_inouts="1"
  3124. allow_inputs="1"
  3125. allow_outputs="1"
  3126. allow_retval="1"
  3127. allow_stats="0"
  3128. allow_temps="1">
  3129. <inputs>
  3130. <field name="IN0" type="BOOL" uuid="8fde47bb-6fe6-4a12-94c5-62b823665e97" />
  3131. <field name="IN1" type="BOOL" uuid="6c604aa8-36eb-47cc-bb06-dd895e1c4d74" />
  3132. </inputs>
  3133. <outputs>
  3134. <field name="OUT0" type="BOOL" uuid="a65ea372-1ac5-4238-87b6-4d403db0aac3" />
  3135. <field name="OUT1" type="BOOL" uuid="6b7ab060-e697-456d-a94a-7534d7ec4fb7" />
  3136. <field name="OUT2" type="BOOL" uuid="98b688ec-0d56-4eb6-802c-0673a534bb21" />
  3137. </outputs>
  3138. <retval>
  3139. <field name="RET_VAL" type="void" uuid="ebf7e09c-e2ea-49e6-af50-aff43cc3b5c0" />
  3140. </retval>
  3141. </interface>
  3142. <grids>
  3143. <grid height="18" uuid="96b01852-cd49-401c-b90a-9e7a6540247b" width="12">
  3144. <optimizers all="1" enabled="1" type="awl" />
  3145. <wires>
  3146. <wire id="0" uuid="45cd7276-5c1b-4dff-b20c-cd97be2acc0a" />
  3147. <wire id="1" uuid="a0b38838-6e30-4b3a-a9eb-255441df626a" />
  3148. <wire id="2" uuid="28dda626-d6af-4783-853f-c6e2c9b02b66" />
  3149. </wires>
  3150. <elements>
  3151. <element subtype="and" type="boolean" uuid="8ca155e9-2b8c-4f19-8b94-a032f1559fe8" x="2" y="2">
  3152. <connections>
  3153. <connection dir_in="1" dir_out="0" pos="0" uuid="4d375e0e-5978-4658-80d5-47e16a95a65d" wire="1" />
  3154. <connection dir_in="1" dir_out="0" pos="1" uuid="63079447-b7da-47ad-ac9f-5a8e07b1ff9d" wire="2" />
  3155. <connection dir_in="0" dir_out="1" pos="0" uuid="44bb7fc7-30b7-4a3d-8050-514bc0269e3d" wire="0" />
  3156. </connections>
  3157. </element>
  3158. <element content="#OUT0" subtype="assign" type="operand" uuid="4d571161-8383-453e-9500-1476019441b8" x="3" y="3">
  3159. <connections>
  3160. <connection dir_in="1" dir_out="0" pos="0" uuid="8f2411e3-5c5d-4c6d-8211-ed5ffc73205e" wire="0" />
  3161. </connections>
  3162. </element>
  3163. <element content="#OUT1" subtype="assign" type="operand" uuid="9f56084c-8002-4004-b6b3-51d851fb2ae1" x="3" y="4">
  3164. <connections>
  3165. <connection dir_in="1" dir_out="0" pos="0" uuid="c7b1bf2c-11d2-4e38-ae58-ce0df0f488d5" wire="0" />
  3166. </connections>
  3167. </element>
  3168. <element content="#OUT2" subtype="assign" type="operand" uuid="a6a8c0ca-0b08-4af3-a56b-0157d7c03914" x="3" y="5">
  3169. <connections>
  3170. <connection dir_in="1" dir_out="0" pos="0" uuid="c5441c28-0128-49eb-9b7c-a6b425e459e2" wire="0" />
  3171. </connections>
  3172. </element>
  3173. <element content="#IN0" subtype="load" type="operand" uuid="edc46fa2-342f-4543-8984-0ee9a1f218b0" x="1" y="2">
  3174. <connections>
  3175. <connection dir_in="0" dir_out="1" pos="0" uuid="7ca5949d-5534-4d7f-a071-00a0c92da7e6" wire="1" />
  3176. </connections>
  3177. </element>
  3178. <element content="#IN1" subtype="load" type="operand" uuid="6d534ede-6b2b-4533-ae46-585694de617c" x="1" y="3">
  3179. <connections>
  3180. <connection dir_in="0" dir_out="1" pos="0" uuid="866729ad-2cca-4979-bbd7-6b4d9d054288" wire="2" />
  3181. </connections>
  3182. </element>
  3183. </elements>
  3184. </grid>
  3185. </grids>
  3186. </FUP>
  3187. ]]></source>
  3188. <!-- FUP/FBD source code -->
  3189. <source enabled="1"
  3190. name="and_and_or"
  3191. type="1"><![CDATA[
  3192. <?xml version="1.0" encoding="UTF-8" standalone="yes"?>
  3193. <!-- Awlsim FUP/FBD source generated by awlsim-0.66.0-pre -->
  3194. <FUP version="0" zoom="1.0">
  3195. <blockdecl name='"FC_and_and_or"' type="FC" />
  3196. <interface allow_initvalue="0"
  3197. allow_inouts="1"
  3198. allow_inputs="1"
  3199. allow_outputs="1"
  3200. allow_retval="1"
  3201. allow_stats="0"
  3202. allow_temps="1">
  3203. <inputs>
  3204. <field name="INP0" type="bool" uuid="c1899713-588c-4869-8856-c952985c424a" />
  3205. <field name="INP1" type="bool" uuid="07d8b3d3-f819-4ce7-8bd3-814abfa210c2" />
  3206. <field name="INP2" type="bool" uuid="1e34b8f3-cdb3-4d87-b97d-898c46fa5a9e" />
  3207. <field name="INP3" type="bool" uuid="20730ef0-1e51-4b5f-ad86-118cf3dfb3c1" />
  3208. </inputs>
  3209. <retval>
  3210. <field name="RET_VAL" type="bool" uuid="d5f1b30e-fff4-41f3-a6fb-5560b1696927" />
  3211. </retval>
  3212. </interface>
  3213. <grids>
  3214. <grid height="32" uuid="ff2e859b-2721-4ecb-9d39-aba553056dda" width="12">
  3215. <optimizers all="1" enabled="1" type="awl" />
  3216. <wires>
  3217. <wire id="0" uuid="ab0399b0-2369-48a9-8892-ad405b1c2603" />
  3218. <wire id="1" uuid="6fc63581-06d2-4ef2-92b7-5157c913911c" />
  3219. <wire id="2" uuid="205fa115-fccb-4a89-b55c-9c47afd7ed42" />
  3220. <wire id="3" uuid="22c2ae16-a99b-41c2-869e-ee252f4c05d1" />
  3221. <wire id="4" uuid="35e4ea6f-1a7e-441b-8315-7f1caaebbddc" />
  3222. <wire id="5" uuid="a8794488-916b-429a-a276-61003d9f76a3" />
  3223. <wire id="6" uuid="170fd159-ccf5-4988-be8c-6d60f819f24d" />
  3224. </wires>
  3225. <elements>
  3226. <element subtype="and" type="boolean" uuid="bc7a17c9-1145-471c-82bc-319ef2629940" x="2" y="2">
  3227. <connections>
  3228. <connection dir_in="1" dir_out="0" pos="0" uuid="9ae0b3b5-ab7e-44a1-ab8a-1ae859f26ac9" wire="0" />
  3229. <connection dir_in="1" dir_out="0" pos="1" uuid="ad295840-85b5-4d3e-b3d4-dac81d976839" wire="1" />
  3230. <connection dir_in="0" dir_out="1" pos="0" uuid="cdadd64f-49c6-421d-be1e-924f96aacf6a" wire="5" />
  3231. </connections>
  3232. </element>
  3233. <element content="#INP0" subtype="load" type="operand" uuid="8918ad71-9a9c-4402-b8ec-e49ade11b908" x="1" y="2">
  3234. <connections>
  3235. <connection dir_in="0" dir_out="1" pos="0" uuid="aeaab7c4-6bc3-4039-af3a-3a53c7f49746" wire="0" />
  3236. </connections>
  3237. </element>
  3238. <element content="#INP1" subtype="load" type="operand" uuid="0fae9869-74b6-4a83-8757-8f61c44c6879" x="1" y="3">
  3239. <connections>
  3240. <connection dir_in="0" dir_out="1" pos="0" uuid="bfdc9aef-8825-4c10-895f-d63cb75e7d9f" wire="1" />
  3241. </connections>
  3242. </element>
  3243. <element content="#RET_VAL" subtype="assign" type="operand" uuid="ce9626dd-f60a-451c-97e9-1cb891b21fe7" x="4" y="5">
  3244. <connections>
  3245. <connection dir_in="1" dir_out="0" pos="0" uuid="35a53bbd-8d90-4f07-bb5d-84c7064678b1" wire="4" />
  3246. </connections>
  3247. </element>
  3248. <element subtype="or" type="boolean" uuid="f6084153-cacd-49e9-ba5c-d41eb5982062" x="3" y="4">
  3249. <connections>
  3250. <connection dir_in="1" dir_out="0" pos="0" uuid="e1cdcf3c-3f7c-4429-a8e3-032f350a820c" wire="5" />
  3251. <connection dir_in="1" dir_out="0" pos="1" uuid="7a62c9a1-81d3-4b16-bcf8-18c5a105d6ec" wire="6" />
  3252. <connection dir_in="0" dir_out="1" pos="0" uuid="21e14d8c-4a51-4717-b59d-784db42fd291" wire="4" />
  3253. </connections>
  3254. </element>
  3255. <element subtype="and" type="boolean" uuid="d307d286-b411-4fac-a196-5a4a653e41eb" x="2" y="5">
  3256. <connections>
  3257. <connection dir_in="1" dir_out="0" pos="0" uuid="418bcb5d-3e55-4618-bd6d-58e4b455a58d" wire="2" />
  3258. <connection dir_in="1" dir_out="0" pos="1" uuid="b5f0c05b-6997-456e-ae75-152fd6d9e87c" wire="3" />
  3259. <connection dir_in="0" dir_out="1" pos="0" uuid="668fb99b-4744-4ef8-a5f9-0a93b23c0e52" wire="6" />
  3260. </connections>
  3261. </element>
  3262. <element content="#INP2" subtype="load" type="operand" uuid="68b1c8a3-6fac-49e0-960c-1e9107471ee8" x="1" y="5">
  3263. <connections>
  3264. <connection dir_in="0" dir_out="1" pos="0" uuid="7e11d756-4a0e-43b1-8ff0-69d961df5d11" wire="2" />
  3265. </connections>
  3266. </element>
  3267. <element content="#INP3" subtype="load" type="operand" uuid="b4336ab4-7818-4746-9f7f-3a85574c5403" x="1" y="6">
  3268. <connections>
  3269. <connection dir_in="0" dir_out="1" pos="0" uuid="b05569d6-47c3-4301-bbf5-8240686bfd5b" wire="3" />
  3270. </connections>
  3271. </element>
  3272. </elements>
  3273. </grid>
  3274. </grids>
  3275. </FUP>
  3276. ]]></source>
  3277. <!-- FUP/FBD source code -->
  3278. <source enabled="1"
  3279. name="branch"
  3280. type="1"><![CDATA[
  3281. <?xml version="1.0" encoding="UTF-8" standalone="yes"?>
  3282. <!-- Awlsim FUP/FBD source generated by awlsim-0.66.0-pre -->
  3283. <FUP version="0" zoom="1.0">
  3284. <blockdecl name='"FC_branch"' type="FC" />
  3285. <interface allow_initvalue="0"
  3286. allow_inouts="1"
  3287. allow_inputs="1"
  3288. allow_outputs="1"
  3289. allow_retval="1"
  3290. allow_stats="0"
  3291. allow_temps="1">
  3292. <inputs>
  3293. <field name="IN00" type="BOOL" uuid="3756b311-6334-449f-8134-e96d63a017f5" />
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  3295. <field name="IN10" type="BOOL" uuid="78430451-35e2-4257-8ace-02a1a6d00f89" />
  3296. <field name="IN20" type="BOOL" uuid="695e22de-7b2a-47bd-b1cc-d05ba13b1e9a" />
  3297. <field name="IN30" type="BOOL" uuid="ea03c23c-3a76-4d2a-a53d-da858490ecec" />
  3298. <field name="IN40" type="BOOL" uuid="255f1d87-43ef-487b-8258-aecd1b3cadde" />
  3299. <field name="IN50" type="BOOL" uuid="1c49a0b1-667d-4828-b51a-4a59f4cadd7b" />
  3300. <field name="IN60" type="BOOL" uuid="b7d69e76-105a-4679-a4ed-51449c2aaaee" />
  3301. <field name="IN61" type="BOOL" uuid="5e856226-19bf-4fce-89f0-6a61f5464d79" />
  3302. <field name="IN70" type="BOOL" uuid="e9322e2c-8ebf-4fbc-8cd9-e595bc0b5a65" />
  3303. <field name="IN80" type="BOOL" uuid="f6f3b91b-8af7-4274-bd3b-5537541eece5" />
  3304. <field name="IN81" type="BOOL" uuid="0d3c16b9-a762-4d66-98b3-00a4424caa02" />
  3305. <field name="IN90" type="BOOL" uuid="278fa8c7-2636-4eaa-a8bd-2826d902b6fc" />
  3306. </inputs>
  3307. <outputs>
  3308. <field name="OUT10" type="BOOL" uuid="e312aa2e-4056-4f7b-bb46-d0e2f21cd97d" />
  3309. <field name="OUT20" type="BOOL" uuid="54c722ea-335a-4cd9-b290-2b7fbff7bcbe" />
  3310. <field name="OUT40" type="BOOL" uuid="d3fdd2c2-7a7b-4306-ac42-4334c0b6dec8" />
  3311. <field name="OUT50" type="BOOL" uuid="4e971171-40a7-4460-91b7-6f8a0bdb847f" />
  3312. <field name="OUT60" type="BOOL" uuid="1c9be6eb-c373-412f-9a94-d8f3eaf917a8" />
  3313. <field name="OUT61" type="BOOL" uuid="3e1f3845-b5fb-4fa4-867c-91ca080d45a7" />
  3314. <field name="OUT70" type="BOOL" uuid="c9c5095d-8c26-41fa-ba72-b0e5c926ea2d" />
  3315. <field name="OUT80" type="BOOL" uuid="979e3db4-1bc7-471e-b4db-0e160ba05074" />
  3316. <field name="OUT81" type="BOOL" uuid="1fdc8fd2-979b-4c7a-9e8e-baa9cad8b761" />
  3317. <field name="OUT90" type="BOOL" uuid="e330fcb3-dfb3-4e53-a8d0-e08d00255634" />
  3318. </outputs>
  3319. <temps>
  3320. <field name="temp_A" type="BOOL" uuid="d0fc59a1-d2e4-491d-a68f-b0b51ca078d9" />
  3321. <field name="temp_B" type="INT" uuid="b2ae1e5a-3344-41a3-8c56-194b3be4c036" />
  3322. </temps>
  3323. <retval>
  3324. <field name="RET_VAL" type="void" uuid="175ddcc3-a046-4969-a23c-b313e90b3647" />
  3325. </retval>
  3326. </interface>
  3327. <grids>
  3328. <grid height="33" uuid="9a469173-1c69-414e-bd91-9ff80a8a3776" width="12">
  3329. <optimizers all="1" enabled="1" type="awl" />
  3330. <wires>
  3331. <wire id="0" uuid="f418df76-b21c-4e0c-bb1b-8dac20e84ea2" />
  3332. <wire id="1" uuid="52046f22-5c58-4773-8360-be0f083a9b85" />
  3333. <wire id="2" uuid="ed1b0a5a-b565-4c78-9b62-0761c853f286" />
  3334. <wire id="3" uuid="4a0fc7e0-3de0-4908-882d-af27ec4086f6" />
  3335. <wire id="4" uuid="c7e56034-e6e9-4147-b416-a57c29f2b556" />
  3336. <wire id="5" uuid="2b8e4827-0d91-418a-a0fc-a4bc2f71a107" />
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  3342. <wire id="11" uuid="6c7c2c24-42b6-4fa7-864a-cfbbe65179f0" />
  3343. <wire id="12" uuid="a7f285a5-b4ce-4c4d-980f-0c02fdfc9066" />
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  3354. <elements>
  3355. <element subtype="xor" type="boolean" uuid="6a547bbf-2269-4505-96a8-b5400d8a7b24" x="2" y="1">
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  3357. <connection dir_in="1" dir_out="0" pos="0" uuid="05e7358d-1dda-4a65-8139-587072f79f51" wire="1" />
  3358. <connection dir_in="1" dir_out="0" pos="1" uuid="7c0c5132-0ade-488b-b9e7-a56fb0557b1a" wire="2" />
  3359. <connection dir_in="0" dir_out="1" pos="0" uuid="381adf1c-eb1d-4f51-a0de-4dad71f18efb" wire="0" />
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  3362. <element subtype="and" type="boolean" uuid="e5bdbec5-2bfa-4d6e-9a4f-36728131f9ec" x="4" y="2">
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  3364. <connection dir_in="1" dir_out="0" pos="0" uuid="c263c931-d4a6-4491-ba3e-d46846631799" wire="0" />
  3365. <connection dir_in="1" dir_out="0" pos="1" uuid="85183f80-dfef-40d5-aeee-96e97367c9d4" wire="3" />
  3366. <connection dir_in="0" dir_out="1" pos="0" uuid="976ef169-7135-4d6f-baae-474a1ddd908f" wire="5" />
  3367. </connections>
  3368. </element>
  3369. <element subtype="and" type="boolean" uuid="9b8b41d9-53cb-4c8d-97e9-4b5f7fad826d" x="4" y="5">
  3370. <connections>
  3371. <connection dir_in="1" dir_out="0" pos="0" uuid="ebc74d20-68b6-4bba-a1a9-9b6c9d531c92" wire="0" />
  3372. <connection dir_in="1" dir_out="0" pos="1" uuid="905ac73e-bdd1-4964-9459-de6a67764442" wire="4" />
  3373. <connection dir_in="0" dir_out="1" pos="0" uuid="68a5d543-8634-4426-a95a-2a038254b9aa" wire="6" />
  3374. </connections>
  3375. </element>
  3376. <element content="#IN00" subtype="load" type="operand" uuid="f30b8ce2-007b-43f0-8a71-24164555c6e4" x="1" y="1">
  3377. <connections>
  3378. <connection dir_in="0" dir_out="1" pos="0" uuid="2854458c-643c-40f7-ac50-31d88c0a387b" wire="1" />
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  3381. <element content="#IN01" subtype="load" type="operand" uuid="eb6a412c-c363-4fed-895a-578214d0e9e4" x="1" y="2">
  3382. <connections>
  3383. <connection dir_in="0" dir_out="1" pos="0" uuid="4a363beb-f640-45c5-977e-f0eea78010f7" wire="2" />
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  3386. <element content="#IN10" subtype="load" type="operand" uuid="6fe758d0-9d90-4716-bcaa-0016bf769503" x="3" y="3">
  3387. <connections>
  3388. <connection dir_in="0" dir_out="1" pos="0" uuid="928b05b1-8c35-4e39-9a2d-2f420ee7417b" wire="3" />
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  3391. <element content="#IN20" subtype="load" type="operand" uuid="b4625702-1b71-486d-9906-956dcb3f9c20" x="3" y="6">
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  3393. <connection dir_in="0" dir_out="1" pos="0" uuid="557a8532-457b-46aa-a999-145644620d07" wire="4" />
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  3396. <element content="#OUT10" subtype="assign" type="operand" uuid="04419a1f-e530-4a49-9882-9d1d07e6a358" x="5" y="3">
  3397. <connections>
  3398. <connection dir_in="1" dir_out="0" pos="0" uuid="7cfa0bec-07da-4037-a21a-0556c79dee68" wire="5" />
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  3401. <element content="#OUT20" subtype="assign" type="operand" uuid="86b99179-1d7b-4f6f-82ef-9f594278b48f" x="5" y="6">
  3402. <connections>
  3403. <connection dir_in="1" dir_out="0" pos="0" uuid="31f0f3ca-56e7-44f0-a59d-46a9c8fc2498" wire="6" />
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  3406. <element subtype="and" type="boolean" uuid="dc1e494c-8598-4318-bd02-02eb4a628e80" x="4" y="9">
  3407. <connections>
  3408. <connection dir_in="1" dir_out="0" pos="0" uuid="852ee51d-6c89-4185-8110-c7abcba4f92a" wire="7" />
  3409. <connection dir_in="1" dir_out="0" pos="1" uuid="7ea65e0e-5d5e-4aaf-8cb3-2bb3b2e943a8" wire="8" />
  3410. <connection dir_in="0" dir_out="1" pos="0" uuid="d2939ae5-d781-490f-9c9c-8223d13633e5" wire="10" />
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  3412. </element>
  3413. <element content="#IN30" subtype="load" type="operand" uuid="36d306ac-03be-4952-acf2-b5d039436d69" x="1" y="9">
  3414. <connections>
  3415. <connection dir_in="0" dir_out="1" pos="0" uuid="6211fd7c-3eca-4f51-81f6-ed84d5318832" wire="7" />
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  3418. <element subtype="and" type="boolean" uuid="7cfb6da8-6021-4004-b073-c080597ad269" x="4" y="12">
  3419. <connections>
  3420. <connection dir_in="1" dir_out="0" pos="0" uuid="e1227b95-62b5-48f3-a31d-88a536c93aba" wire="7" />
  3421. <connection dir_in="1" dir_out="0" pos="1" uuid="c8afb5aa-5b96-446c-907a-76dc32bb0e0e" wire="9" />
  3422. <connection dir_in="0" dir_out="1" pos="0" uuid="9774ceea-3a99-40cd-a646-02bf879068f3" wire="11" />
  3423. </connections>
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  3425. <element content="#IN40" subtype="load" type="operand" uuid="fc4f35fa-f006-4a72-ab5a-3c88da2398f5" x="3" y="10">
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  3430. <element content="#IN50" subtype="load" type="operand" uuid="b83e84d3-d9c7-4f30-b21e-7ee9c52eb400" x="3" y="13">
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  3435. <element content="#OUT40" subtype="assign" type="operand" uuid="5abfa298-daeb-4290-9105-5c34def22c52" x="5" y="10">
  3436. <connections>
  3437. <connection dir_in="1" dir_out="0" pos="0" uuid="d92cddf2-8ae9-4e02-bd94-ffd70fe266b4" wire="10" />
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  3440. <element content="#OUT50" subtype="assign" type="operand" uuid="3aef9503-3189-4754-af45-63309d201a9a" x="5" y="13">
  3441. <connections>
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  3445. <element content="#OUT60" subtype="assign" type="operand" uuid="fdf751d6-2a79-43bd-b0e8-6ecaf9ba60ea" x="3" y="17">
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  3450. <element content="#IN60" subtype="load" type="operand" uuid="e924f31b-a846-4ce1-9451-d5c52edc0132" x="1" y="16">
  3451. <connections>
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  3455. <element content="#IN61" subtype="load" type="operand" uuid="998bd3ce-b617-4547-8d5b-082164bcaca4" x="1" y="17">
  3456. <connections>
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  3482. <connection dir_in="1" dir_out="0" pos="0" uuid="1d55fc0a-5b43-4355-a592-9cc59d4acd6c" wire="21" />
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  3485. <element content="#IN90" subtype="load" type="operand" uuid="7603f5d1-8bc0-4cb8-8dca-efffb690c6d3" x="3" y="25">
  3486. <connections>
  3487. <connection dir_in="0" dir_out="1" pos="0" uuid="a4a1c970-0f8b-4596-8498-6322df696e2d" wire="19" />
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  3491. <connections>
  3492. <connection dir_in="1" dir_out="0" pos="0" uuid="2b6bf07c-17e8-4626-bf8a-85804c90f048" wire="20" />
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  3495. <element content="#OUT61" subtype="assign" type="operand" uuid="207a9c88-bf0d-45c6-b9e6-98bc98b9277f" x="3" y="18">
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  3500. <element content="#OUT81" subtype="assign" type="operand" uuid="f7e4f202-a998-4d29-9bec-f5819165d389" x="3" y="28">
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  3507. <connection dir_in="1" dir_out="0" pos="0" uuid="94db3cb2-18d5-4585-9de8-ff641919f28d" wire="13" />
  3508. <connection dir_in="1" dir_out="0" pos="1" uuid="92245fa0-de88-4787-b2ed-05ec2fea0dd0" wire="14" />
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  3520. <connections>
  3521. <connection dir_in="1" dir_out="0" pos="0" uuid="2df92614-f3d4-47ec-a171-88125e9bf5bc" wire="17" />
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  3527. <connections>
  3528. <connection dir_in="1" dir_out="0" pos="0" uuid="bd636288-8d2a-4a3c-b7d1-6c96edb9c73d" wire="21" />
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  3535. </grids>
  3536. </FUP>
  3537. ]]></source>
  3538. <!-- FUP/FBD source code -->
  3539. <source enabled="1"
  3540. name="not 1"
  3541. type="1"><![CDATA[
  3542. <?xml version="1.0" encoding="UTF-8" standalone="yes"?>
  3543. <!-- Awlsim FUP/FBD source generated by awlsim-0.66.0-pre -->
  3544. <FUP version="0" zoom="1.0">
  3545. <blockdecl name='"FC_not_1"' type="FC" />
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  3562. </outputs>
  3563. <retval>
  3564. <field name="RET_VAL" type="VOID" uuid="b3775a65-c96d-426f-b6ba-7384b93e5b98" />
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  3601. <element content="#IN00" subtype="load" type="operand" uuid="28165f41-6364-4639-a4ed-d16a42b89ca8" x="1" y="2">
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  3611. <element content="#OUT20" subtype="assign" type="operand" uuid="d8fc2a7b-80c8-4b10-bc91-880b56b29e88" x="6" y="6">
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  3616. <element content="#IN10" subtype="load" type="operand" uuid="9c109df5-8c54-4ef6-9cf8-c5ee8c9aca89" x="3" y="2">
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  3622. <connections>
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  3626. <element content="#IN20" subtype="load" type="operand" uuid="98bd636f-d7a0-40e0-96d1-8c6a4c43cea2" x="4" y="6">
  3627. <connections>
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  3634. </FUP>
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  3636. <!-- FUP/FBD source code -->
  3637. <source enabled="1"
  3638. name="not 2"
  3639. type="1"><![CDATA[
  3640. <?xml version="1.0" encoding="UTF-8" standalone="yes"?>
  3641. <!-- Awlsim FUP/FBD source generated by awlsim-0.66.0-pre -->
  3642. <FUP version="0" zoom="1.0">
  3643. <blockdecl name='"FC_not_2"' type="FC" />
  3644. <interface allow_initvalue="0"
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  3646. allow_inputs="1"
  3647. allow_outputs="1"
  3648. allow_retval="1"
  3649. allow_stats="0"
  3650. allow_temps="1">
  3651. <inputs>
  3652. <field name="IN01" type="INT" uuid="06bcb958-f46b-4caa-ad48-f70016da28ae" />
  3653. <field name="IN02" type="BOOL" uuid="b9e8122b-c10a-4073-b1d9-6a63798fecd1" />
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  3658. <outputs>
  3659. <field name="OUT00" type="INT" uuid="f2f91313-3a27-4e94-8c75-6251f67bed6b" />
  3660. <field name="OUT01" type="BOOL" uuid="909f5492-41bd-4d1c-9b2e-f43a7969d1c6" />
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  3662. <field name="OUT11" type="BOOL" uuid="ed6dc3eb-f489-4ceb-b852-2f2396d8d0b7" />
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  3664. <retval>
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  3684. <elements>
  3685. <element type="move" uuid="3b57f8b7-c4d7-4389-b36b-b6663f26f1ff" x="2" y="1">
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  3687. <connection dir_in="1" dir_out="0" pos="0" text="EN" uuid="52c72098-5426-4587-aeab-3761bfbdfdf7" wire="-1" />
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  3708. <element subtype="xor" type="boolean" uuid="36c75eba-7136-4b4c-99aa-fca74cf129bd" x="3" y="8">
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  4037. <!-- FUP/FBD source code -->
  4038. <source enabled="1"
  4039. name="sr 3"
  4040. type="1"><![CDATA[
  4041. <?xml version="1.0" encoding="UTF-8" standalone="yes"?>
  4042. <!-- Awlsim FUP/FBD source generated by awlsim-0.66.0-pre -->
  4043. <FUP version="0" zoom="1.0">
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  4139. <!-- FUP/FBD source code -->
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  4142. type="1"><![CDATA[
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  4144. <!-- Awlsim FUP/FBD source generated by awlsim-0.66.0-pre -->
  4145. <FUP version="0" zoom="1.0">
  4146. <blockdecl name='"FC_sr_4"' type="FC" />
  4147. <interface allow_initvalue="0"
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  4239. <!-- FUP/FBD source code -->
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  4242. type="1"><![CDATA[
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  4244. <!-- Awlsim FUP/FBD source generated by awlsim-0.66.0-pre -->
  4245. <FUP version="0" zoom="1.0">
  4246. <blockdecl name='"FC_sr_5"' type="FC" />
  4247. <interface allow_initvalue="0"
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  4615. <field name="IN21" type="BOOL" uuid="3ed79623-1b1e-40f8-8f5f-0312e997f9f8" />
  4616. </inputs>
  4617. <outputs>
  4618. <field name="OUT1" type="BOOL" uuid="d948a3ad-eaf6-41bf-b6dd-3c1c2d065b8d" />
  4619. <field name="OUT2" type="BOOL" uuid="26d15031-d479-4387-aa0a-8fb631c83f37" />
  4620. </outputs>
  4621. <inouts>
  4622. <field name="INOUT1" type="BOOL" uuid="a37ae1fc-9284-45d6-83b6-d82e8dbd0bac" />
  4623. </inouts>
  4624. <retval>
  4625. <field name="RET_VAL" type="VOID" uuid="40bba7a4-7cfd-44b4-9029-299f83766761" />
  4626. </retval>
  4627. </interface>
  4628. <grids>
  4629. <grid height="18" uuid="e4b5d70c-8e4e-4ade-8772-c1547f5812b3" width="12">
  4630. <optimizers all="1" enabled="1" type="awl" />
  4631. <wires>
  4632. <wire id="0" uuid="7630d120-71bb-48f1-b030-bb28f28138c8" />
  4633. <wire id="1" uuid="88d62777-10b5-4f88-9eca-002772660138" />
  4634. <wire id="2" uuid="3e7b49c5-7efd-46ae-ab5d-55a6c422c4f5" />
  4635. <wire id="3" uuid="37013f67-b457-4d6f-b673-37e6e8078872" />
  4636. <wire id="4" uuid="be58fd28-580f-40c9-b5e5-b732802ec3db" />
  4637. <wire id="5" uuid="a2809771-be2d-4cc4-9cae-1c7f67df2792" />
  4638. </wires>
  4639. <elements>
  4640. <element subtype="fp" type="boolean" uuid="cf47d1cf-e487-4385-9742-a46355937498" x="3" y="3">
  4641. <connections>
  4642. <connection dir_in="1" dir_out="0" pos="0" uuid="e7676c5a-416a-4269-a275-836f24c11fee" wire="1" />
  4643. <connection dir_in="0" dir_out="1" pos="0" uuid="5ea692fd-c556-4a82-b1d3-cbb1593d691b" wire="0" />
  4644. </connections>
  4645. <subelements>
  4646. <element content="#INOUT1" subtype="embedded" type="operand" uuid="b8233153-0616-4e49-9ca5-ce16ddce6298" x="0" y="0" />
  4647. </subelements>
  4648. </element>
  4649. <element subtype="or" type="boolean" uuid="c7bcc28f-8b61-4d36-9e5b-13ab64ba072a" x="5" y="4">
  4650. <connections>
  4651. <connection dir_in="1" dir_out="0" pos="0" uuid="b347d275-c646-482e-b104-4833feb21243" wire="0" />
  4652. <connection dir_in="1" dir_out="0" pos="1" uuid="20d139f0-4424-4ba9-9c4d-ba874b293282" wire="4" />
  4653. <connection dir_in="0" dir_out="1" pos="0" uuid="dcbae5af-abd4-438b-a40f-4549c533cd83" wire="5" />
  4654. </connections>
  4655. </element>
  4656. <element subtype="or" type="boolean" uuid="88ab7cc3-612a-4ddb-be53-760b59872e00" x="2" y="3">
  4657. <connections>
  4658. <connection dir_in="1" dir_out="0" pos="0" uuid="56133b53-242d-4ce5-b074-f2df6ff0d2c5" wire="2" />
  4659. <connection dir_in="1" dir_out="0" pos="1" uuid="900241ae-323f-48af-b023-48ed47f6304b" wire="3" />
  4660. <connection dir_in="0" dir_out="1" pos="0" uuid="fe9c55e9-6739-4316-b362-c4d9f7560e68" wire="1" />
  4661. </connections>
  4662. </element>
  4663. <element content="#IN00" subtype="load" type="operand" uuid="ebda7d6b-a88e-4239-b814-9d9cb0acc975" x="1" y="3">
  4664. <connections>
  4665. <connection dir_in="0" dir_out="1" pos="0" uuid="f8382e04-31a6-4f96-b244-4a5da0043cd9" wire="2" />
  4666. </connections>
  4667. </element>
  4668. <element content="#IN01" subtype="load" type="operand" uuid="6f9de736-f860-449a-a367-6b42d5e54b69" x="1" y="4">
  4669. <connections>
  4670. <connection dir_in="0" dir_out="1" pos="0" uuid="7d2f8622-e1fe-41c9-881e-31430d613838" wire="3" />
  4671. </connections>
  4672. </element>
  4673. <element content="#IN21" subtype="load" type="operand" uuid="fc2f6b11-cf5e-4feb-b382-bb4c500b41c5" x="4" y="5">
  4674. <connections>
  4675. <connection dir_in="0" dir_out="1" pos="0" uuid="b983f117-d166-4b0b-ba11-869357976926" wire="4" />
  4676. </connections>
  4677. </element>
  4678. <element content="#OUT2" subtype="assign" type="operand" uuid="8383e344-08d0-4177-9b57-7df712d77ffd" x="6" y="5">
  4679. <connections>
  4680. <connection dir_in="1" dir_out="0" pos="0" uuid="f4184449-60a6-4fd0-98a6-881782e06271" wire="5" />
  4681. </connections>
  4682. </element>
  4683. <element content="#OUT1" subtype="assign" type="operand" uuid="f7f7f803-001e-4fee-895a-1ee6ebdbc237" x="4" y="2">
  4684. <connections>
  4685. <connection dir_in="1" dir_out="0" pos="0" uuid="40314637-1cfe-4694-ac5a-ce07be93345d" wire="0" />
  4686. </connections>
  4687. </element>
  4688. </elements>
  4689. </grid>
  4690. </grids>
  4691. </FUP>
  4692. ]]></source>
  4693. </language_fup>
  4694. <!-- Symbol table configuration -->
  4695. <symbols>
  4696. <!-- symbol table source code -->
  4697. <source enabled="1"
  4698. name="symbol table"
  4699. type="3"><![CDATA[
  4700. 126,FC_assign FC 20 FC 20
  4701. 126,FC_TEST_assign FC 21 FC 21
  4702. 126,FC_and_and_or FC 30 FC 30
  4703. 126,FC_TEST_and_and_or FC 31 FC 31
  4704. 126,FC_branch FC 40 FC 40
  4705. 126,FC_TEST_branch FC 41 FC 41
  4706. 126,FC_not_1 FC 50 FC 50
  4707. 126,FC_TEST_not_1 FC 51 FC 51
  4708. 126,FC_not_2 FC 60 FC 60
  4709. 126,FC_TEST_not_2 FC 61 FC 61
  4710. 126,FC_sr_1 FC 70 FC 70
  4711. 126,FC_TEST_sr_1 FC 71 FC 71
  4712. 126,FC_sr_2 FC 80 FC 80
  4713. 126,FC_TEST_sr_2 FC 81 FC 81
  4714. 126,FC_sr_3 FC 90 FC 90
  4715. 126,FC_TEST_sr_3 FC 91 FC 91
  4716. 126,FC_sr_4 FC 100 FC 100
  4717. 126,FC_TEST_sr_4 FC 101 FC 101
  4718. 126,FC_sr_5 FC 110 FC 110
  4719. 126,FC_TEST_sr_5 FC 111 FC 111
  4720. 126,FC_sr_6 FC 120 FC 120
  4721. 126,FC_TEST_sr_6 FC 121 FC 121
  4722. 126,FC_edge_1 FC 130 FC 130
  4723. 126,FC_TEST_edge_1 FC 131 FC 131
  4724. 126,FC_edge_2 FC 140 FC 140
  4725. 126,FC_TEST_edge_2 FC 141 FC 141
  4726. ]]></source>
  4727. </symbols>
  4728. <!-- Core server link configuration -->
  4729. <core_link>
  4730. <!-- Locally spawned core server -->
  4731. <spawn_local enable="1"
  4732. interpreters="$DEFAULT"
  4733. port_range_begin="4183"
  4734. port_range_end="8278" />
  4735. <!-- Remote server connection -->
  4736. <connect host="192.168.179.31"
  4737. port="4151"
  4738. timeout_ms="3000" />
  4739. <!-- Transport tunnel -->
  4740. <tunnel local_port="-1"
  4741. type="0">
  4742. <ssh executable="ssh"
  4743. port="22"
  4744. user="pi" />
  4745. </tunnel>
  4746. </core_link>
  4747. <!-- Hardware modules configuration -->
  4748. <hardware>
  4749. <!-- Loaded hardware module -->
  4750. <module name="dummy">
  4751. <params>
  4752. <param name="inputAddressBase"
  4753. value="0" />
  4754. <param name="outputAddressBase"
  4755. value="0" />
  4756. </params>
  4757. </module>
  4758. </hardware>
  4759. <!-- Graphical user interface configuration -->
  4760. <gui>
  4761. <editor autoindent="1"
  4762. font="Courier,11,-1,5,50,0,0,0,0,0"
  4763. paste_autoindent="1"
  4764. validation="1" />
  4765. </gui>
  4766. </awlsim_project>