123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185 |
- <?xml version="1.0" encoding="UTF-8" standalone="yes"?>
- <!-- Awlsim project file generated by awlsim-0.69.0-pre -->
- <awlsim_project date_create="2016-03-16 00:00:00.000000"
- date_modify="2019-01-15 19:06:25.218935"
- format_version="1">
- <!-- CPU core configuration -->
- <cpu>
- <!-- CPU core feature specification -->
- <specs call_stack_size="256"
- nr_accus="2"
- nr_counters="256"
- nr_flags="2048"
- nr_inputs="128"
- nr_localbytes="1024"
- nr_outputs="128"
- nr_timers="256"
- parenthesis_stack_size="7" />
- <!-- CPU core configuration -->
- <config clock_memory_byte="-1"
- cycle_time_limit_us="1000000"
- ext_insns_enable="1"
- mnemonics="0"
- ob_startinfo_enable="0"
- run_time_limit_us="-1" />
- </cpu>
- <!-- AWL/STL language configuration -->
- <language_awl>
- <!-- AWL/STL source code -->
- <source enabled="1"
- name="main"
- type="0"><![CDATA[
- ORGANIZATION_BLOCK OB 1
- BEGIN
- // This test only works with the fake RPi.GPIO module
- // that directly wires outputs to inputs.
- L MW 0
- L 0
- ==I
- SPB zero
- L EW 16
- __ASSERT== __ACCU 1, W#16#0302
- SPA out
- zero: L EW 16
- __ASSERT== __ACCU 1, W#16#0000
- SPA out
- out: L MW 0
- XOW W#16#FFFF
- T MW 0
- T AW 16
- L MW 16
- + 1
- T MW 16
- L 32
- <I
- BEB
- CALL SFC 46
- END_ORGANIZATION_BLOCK
- ORGANIZATION_BLOCK OB 100
- BEGIN
- // Test direct-I/O
- // This test only works with the fake RPi.GPIO module
- // that directly wires outputs to inputs.
- // Only E16.0, E16.1 and E17.1 are used in hw config.
- // All other bits read as 0.
- L PEW 16
- __ASSERT== __ACCU 1, W#16#0000
- L PEB 16
- __ASSERT== __ACCU 1, W#16#00
- L PEB 17
- __ASSERT== __ACCU 1, W#16#00
- L W#16#FFFF
- T PAW 16
- L PEW 16
- __ASSERT== __ACCU 1, W#16#0302
- L PEB 16
- __ASSERT== __ACCU 1, W#16#03
- L PEB 17
- __ASSERT== __ACCU 1, W#16#02
- L 0
- T PAB 16
- L PEW 16
- __ASSERT== __ACCU 1, W#16#0002
- L PEB 16
- __ASSERT== __ACCU 1, W#16#00
- L PEB 17
- __ASSERT== __ACCU 1, W#16#02
- L 0
- T PAB 17
- L PEW 16
- __ASSERT== __ACCU 1, W#16#0000
- L PEB 16
- __ASSERT== __ACCU 1, W#16#00
- L PEB 17
- __ASSERT== __ACCU 1, W#16#00
- // Initialize state for OB 1
- L 0
- T MW 0
- T MW 16
- T AW 16
- END_ORGANIZATION_BLOCK
- ]]></source>
- </language_awl>
- <!-- Symbol table configuration -->
- <symbols>
- <!-- symbol table source code -->
- <source enabled="1"
- name="Main table"
- type="3"><![CDATA[
- ]]></source>
- </symbols>
- <!-- Core server link configuration -->
- <core_link>
- <!-- Locally spawned core server -->
- <spawn_local enable="1"
- interpreters="$DEFAULT"
- port_range_begin="4183"
- port_range_end="8278" />
- <!-- Remote server connection -->
- <connect host="localhost"
- port="4151"
- timeout_ms="3000" />
- <!-- Transport tunnel -->
- <tunnel local_port="-1"
- type="0">
- <ssh executable="ssh"
- port="22"
- user="pi" />
- </tunnel>
- </core_link>
- <!-- Hardware modules configuration -->
- <hardware>
- <!-- Loaded hardware module -->
- <module name="rpigpio">
- <params>
- <param name="I0.0"
- value="BCM0" />
- <param name="I0.1"
- value="BCM1" />
- <param name="I1.1"
- value="BCM2" />
- <param name="Q0.0"
- value="BCM0" />
- <param name="Q0.1"
- value="BCM1" />
- <param name="Q1.1"
- value="BCM2" />
- <param name="enabled"
- value="True" />
- <param name="inputAddressBase"
- value="16" />
- <param name="outputAddressBase"
- value="16" />
- </params>
- </module>
- </hardware>
- <!-- Graphical user interface configuration -->
- <gui>
- <!-- AWL editor settings -->
- <editor autoindent="1"
- paste_autoindent="1"
- validation="1" />
- </gui>
- </awlsim_project>
|