mali_kbase_defs.h 40 KB

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  1. /*
  2. *
  3. * (C) COPYRIGHT 2011-2016 ARM Limited. All rights reserved.
  4. *
  5. * This program is free software and is provided to you under the terms of the
  6. * GNU General Public License version 2 as published by the Free Software
  7. * Foundation, and any use by you of this program is subject to the terms
  8. * of such GNU licence.
  9. *
  10. * A copy of the licence is included with the program, and can also be obtained
  11. * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  12. * Boston, MA 02110-1301, USA.
  13. *
  14. */
  15. /**
  16. * @file mali_kbase_defs.h
  17. *
  18. * Defintions (types, defines, etcs) common to Kbase. They are placed here to
  19. * allow the hierarchy of header files to work.
  20. */
  21. #ifndef _KBASE_DEFS_H_
  22. #define _KBASE_DEFS_H_
  23. #include <mali_kbase_config.h>
  24. #include <mali_base_hwconfig_features.h>
  25. #include <mali_base_hwconfig_issues.h>
  26. #include <mali_kbase_mem_lowlevel.h>
  27. #include <mali_kbase_mmu_hw.h>
  28. #include <mali_kbase_mmu_mode.h>
  29. #include <mali_kbase_instr.h>
  30. #include <linux/atomic.h>
  31. #include <linux/mempool.h>
  32. #include <linux/slab.h>
  33. #include <linux/file.h>
  34. #ifdef CONFIG_KDS
  35. #include <linux/kds.h>
  36. #endif /* CONFIG_KDS */
  37. #ifdef CONFIG_SYNC
  38. #include "sync.h"
  39. #endif /* CONFIG_SYNC */
  40. #include "mali_kbase_dma_fence.h"
  41. #ifdef CONFIG_PM_DEVFREQ
  42. #include <linux/devfreq.h>
  43. #endif /* CONFIG_DEVFREQ */
  44. #include <linux/clk.h>
  45. #include <linux/regulator/consumer.h>
  46. #if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM)
  47. #define KBASE_PM_RUNTIME 1
  48. #endif
  49. /** Enable SW tracing when set */
  50. #ifdef CONFIG_MALI_MIDGARD_ENABLE_TRACE
  51. #define KBASE_TRACE_ENABLE 1
  52. #endif
  53. #ifndef KBASE_TRACE_ENABLE
  54. #ifdef CONFIG_MALI_DEBUG
  55. #define KBASE_TRACE_ENABLE 1
  56. #else
  57. #define KBASE_TRACE_ENABLE 0
  58. #endif /* CONFIG_MALI_DEBUG */
  59. #endif /* KBASE_TRACE_ENABLE */
  60. /** Dump Job slot trace on error (only active if KBASE_TRACE_ENABLE != 0) */
  61. #define KBASE_TRACE_DUMP_ON_JOB_SLOT_ERROR 1
  62. /**
  63. * Number of milliseconds before resetting the GPU when a job cannot be "zapped" from the hardware.
  64. * Note that the time is actually ZAP_TIMEOUT+SOFT_STOP_RESET_TIMEOUT between the context zap starting and the GPU
  65. * actually being reset to give other contexts time for their jobs to be soft-stopped and removed from the hardware
  66. * before resetting.
  67. */
  68. #define ZAP_TIMEOUT 1000
  69. /** Number of milliseconds before we time out on a GPU soft/hard reset */
  70. #define RESET_TIMEOUT 500
  71. /**
  72. * Prevent soft-stops from occuring in scheduling situations
  73. *
  74. * This is not due to HW issues, but when scheduling is desired to be more predictable.
  75. *
  76. * Therefore, soft stop may still be disabled due to HW issues.
  77. *
  78. * @note Soft stop will still be used for non-scheduling purposes e.g. when terminating a context.
  79. *
  80. * @note if not in use, define this value to 0 instead of \#undef'ing it
  81. */
  82. #define KBASE_DISABLE_SCHEDULING_SOFT_STOPS 0
  83. /**
  84. * Prevent hard-stops from occuring in scheduling situations
  85. *
  86. * This is not due to HW issues, but when scheduling is desired to be more predictable.
  87. *
  88. * @note Hard stop will still be used for non-scheduling purposes e.g. when terminating a context.
  89. *
  90. * @note if not in use, define this value to 0 instead of \#undef'ing it
  91. */
  92. #define KBASE_DISABLE_SCHEDULING_HARD_STOPS 0
  93. /**
  94. * The maximum number of Job Slots to support in the Hardware.
  95. *
  96. * You can optimize this down if your target devices will only ever support a
  97. * small number of job slots.
  98. */
  99. #define BASE_JM_MAX_NR_SLOTS 3
  100. /**
  101. * The maximum number of Address Spaces to support in the Hardware.
  102. *
  103. * You can optimize this down if your target devices will only ever support a
  104. * small number of Address Spaces
  105. */
  106. #define BASE_MAX_NR_AS 16
  107. /* mmu */
  108. #define MIDGARD_MMU_VA_BITS 48
  109. #if MIDGARD_MMU_VA_BITS > 39
  110. #define MIDGARD_MMU_TOPLEVEL 0
  111. #else
  112. #define MIDGARD_MMU_TOPLEVEL 1
  113. #endif
  114. #define MIDGARD_MMU_BOTTOMLEVEL 3
  115. #define GROWABLE_FLAGS_REQUIRED (KBASE_REG_PF_GROW | KBASE_REG_GPU_WR)
  116. /** setting in kbase_context::as_nr that indicates it's invalid */
  117. #define KBASEP_AS_NR_INVALID (-1)
  118. #define KBASE_LOCK_REGION_MAX_SIZE (63)
  119. #define KBASE_LOCK_REGION_MIN_SIZE (11)
  120. #define KBASE_TRACE_SIZE_LOG2 8 /* 256 entries */
  121. #define KBASE_TRACE_SIZE (1 << KBASE_TRACE_SIZE_LOG2)
  122. #define KBASE_TRACE_MASK ((1 << KBASE_TRACE_SIZE_LOG2)-1)
  123. #include "mali_kbase_js_defs.h"
  124. #include "mali_kbase_hwaccess_defs.h"
  125. #define KBASEP_FORCE_REPLAY_DISABLED 0
  126. /* Maximum force replay limit when randomization is enabled */
  127. #define KBASEP_FORCE_REPLAY_RANDOM_LIMIT 16
  128. /** Atom has been previously soft-stoppped */
  129. #define KBASE_KATOM_FLAG_BEEN_SOFT_STOPPPED (1<<1)
  130. /** Atom has been previously retried to execute */
  131. #define KBASE_KATOM_FLAGS_RERUN (1<<2)
  132. #define KBASE_KATOM_FLAGS_JOBCHAIN (1<<3)
  133. /** Atom has been previously hard-stopped. */
  134. #define KBASE_KATOM_FLAG_BEEN_HARD_STOPPED (1<<4)
  135. /** Atom has caused us to enter disjoint state */
  136. #define KBASE_KATOM_FLAG_IN_DISJOINT (1<<5)
  137. /* Atom has fail dependency on same-slot dependency */
  138. #define KBASE_KATOM_FLAG_FAIL_PREV (1<<6)
  139. /* Atom blocked on cross-slot dependency */
  140. #define KBASE_KATOM_FLAG_X_DEP_BLOCKED (1<<7)
  141. /* Atom has fail dependency on cross-slot dependency */
  142. #define KBASE_KATOM_FLAG_FAIL_BLOCKER (1<<8)
  143. /* Atom has been submitted to JSCTX ringbuffers */
  144. #define KBASE_KATOM_FLAG_JSCTX_RB_SUBMITTED (1<<9)
  145. /* Atom is currently holding a context reference */
  146. #define KBASE_KATOM_FLAG_HOLDING_CTX_REF (1<<10)
  147. /* Atom requires GPU to be in secure mode */
  148. #define KBASE_KATOM_FLAG_SECURE (1<<11)
  149. /* Atom has been stored in linked list */
  150. #define KBASE_KATOM_FLAG_JSCTX_IN_LL (1<<12)
  151. /* SW related flags about types of JS_COMMAND action
  152. * NOTE: These must be masked off by JS_COMMAND_MASK */
  153. /** This command causes a disjoint event */
  154. #define JS_COMMAND_SW_CAUSES_DISJOINT 0x100
  155. /** Bitmask of all SW related flags */
  156. #define JS_COMMAND_SW_BITS (JS_COMMAND_SW_CAUSES_DISJOINT)
  157. #if (JS_COMMAND_SW_BITS & JS_COMMAND_MASK)
  158. #error JS_COMMAND_SW_BITS not masked off by JS_COMMAND_MASK. Must update JS_COMMAND_SW_<..> bitmasks
  159. #endif
  160. /** Soft-stop command that causes a Disjoint event. This of course isn't
  161. * entirely masked off by JS_COMMAND_MASK */
  162. #define JS_COMMAND_SOFT_STOP_WITH_SW_DISJOINT \
  163. (JS_COMMAND_SW_CAUSES_DISJOINT | JS_COMMAND_SOFT_STOP)
  164. #define KBASEP_ATOM_ID_INVALID BASE_JD_ATOM_COUNT
  165. struct kbase_jd_atom_dependency {
  166. struct kbase_jd_atom *atom;
  167. u8 dep_type;
  168. };
  169. /**
  170. * @brief The function retrieves a read-only reference to the atom field from
  171. * the kbase_jd_atom_dependency structure
  172. *
  173. * @param[in] dep kbase jd atom dependency.
  174. *
  175. * @return readonly reference to dependent ATOM.
  176. */
  177. static inline const struct kbase_jd_atom *const kbase_jd_katom_dep_atom(const struct kbase_jd_atom_dependency *dep)
  178. {
  179. LOCAL_ASSERT(dep != NULL);
  180. return (const struct kbase_jd_atom * const)(dep->atom);
  181. }
  182. /**
  183. * @brief The function retrieves a read-only reference to the dependency type field from
  184. * the kbase_jd_atom_dependency structure
  185. *
  186. * @param[in] dep kbase jd atom dependency.
  187. *
  188. * @return A dependency type value.
  189. */
  190. static inline const u8 kbase_jd_katom_dep_type(const struct kbase_jd_atom_dependency *dep)
  191. {
  192. LOCAL_ASSERT(dep != NULL);
  193. return dep->dep_type;
  194. }
  195. /**
  196. * @brief Setter macro for dep_atom array entry in kbase_jd_atom
  197. *
  198. * @param[in] dep The kbase jd atom dependency.
  199. * @param[in] a The ATOM to be set as a dependency.
  200. * @param type The ATOM dependency type to be set.
  201. *
  202. */
  203. static inline void kbase_jd_katom_dep_set(const struct kbase_jd_atom_dependency *const_dep,
  204. struct kbase_jd_atom *a, u8 type)
  205. {
  206. struct kbase_jd_atom_dependency *dep;
  207. LOCAL_ASSERT(const_dep != NULL);
  208. dep = (struct kbase_jd_atom_dependency *)const_dep;
  209. dep->atom = a;
  210. dep->dep_type = type;
  211. }
  212. /**
  213. * @brief Setter macro for dep_atom array entry in kbase_jd_atom
  214. *
  215. * @param[in] dep The kbase jd atom dependency to be cleared.
  216. *
  217. */
  218. static inline void kbase_jd_katom_dep_clear(const struct kbase_jd_atom_dependency *const_dep)
  219. {
  220. struct kbase_jd_atom_dependency *dep;
  221. LOCAL_ASSERT(const_dep != NULL);
  222. dep = (struct kbase_jd_atom_dependency *)const_dep;
  223. dep->atom = NULL;
  224. dep->dep_type = BASE_JD_DEP_TYPE_INVALID;
  225. }
  226. enum kbase_atom_gpu_rb_state {
  227. /* Atom is not currently present in slot ringbuffer */
  228. KBASE_ATOM_GPU_RB_NOT_IN_SLOT_RB,
  229. /* Atom is in slot ringbuffer but is blocked on a previous atom */
  230. KBASE_ATOM_GPU_RB_WAITING_BLOCKED,
  231. /* Atom is in slot ringbuffer but is waiting for cores to become
  232. * available */
  233. KBASE_ATOM_GPU_RB_WAITING_FOR_CORE_AVAILABLE,
  234. /* Atom is in slot ringbuffer but is blocked on affinity */
  235. KBASE_ATOM_GPU_RB_WAITING_AFFINITY,
  236. /* Atom is in slot ringbuffer but is waiting for secure mode switch */
  237. KBASE_ATOM_GPU_RB_WAITING_SECURE_MODE,
  238. /* Atom is in slot ringbuffer and ready to run */
  239. KBASE_ATOM_GPU_RB_READY,
  240. /* Atom is in slot ringbuffer and has been submitted to the GPU */
  241. KBASE_ATOM_GPU_RB_SUBMITTED,
  242. /* Atom must be returned to JS as soon as it reaches the head of the
  243. * ringbuffer due to a previous failure */
  244. KBASE_ATOM_GPU_RB_RETURN_TO_JS
  245. };
  246. struct kbase_ext_res {
  247. u64 gpu_address;
  248. struct kbase_mem_phy_alloc *alloc;
  249. };
  250. struct kbase_jd_atom {
  251. struct work_struct work;
  252. ktime_t start_timestamp;
  253. u64 time_spent_us; /**< Total time spent on the GPU in microseconds */
  254. struct base_jd_udata udata;
  255. struct kbase_context *kctx;
  256. struct list_head dep_head[2];
  257. struct list_head dep_item[2];
  258. const struct kbase_jd_atom_dependency dep[2];
  259. u16 nr_extres;
  260. struct kbase_ext_res *extres;
  261. u32 device_nr;
  262. u64 affinity;
  263. u64 jc;
  264. enum kbase_atom_coreref_state coreref_state;
  265. #ifdef CONFIG_KDS
  266. struct list_head node;
  267. struct kds_resource_set *kds_rset;
  268. bool kds_dep_satisfied;
  269. #endif /* CONFIG_KDS */
  270. #ifdef CONFIG_SYNC
  271. struct sync_fence *fence;
  272. struct sync_fence_waiter sync_waiter;
  273. #endif /* CONFIG_SYNC */
  274. #ifdef CONFIG_MALI_DMA_FENCE
  275. struct {
  276. /* This points to the dma-buf fence for this atom. If this is
  277. * NULL then there is no fence for this atom and the other
  278. * fields related to dma_fence may have invalid data.
  279. *
  280. * The context and seqno fields contain the details for this
  281. * fence.
  282. *
  283. * This fence is signaled when the katom is completed,
  284. * regardless of the event_code of the katom (signal also on
  285. * failure).
  286. */
  287. struct dma_fence *fence;
  288. /* The dma-buf fence context number for this atom. A unique
  289. * context number is allocated to each katom in the context on
  290. * context creation.
  291. */
  292. unsigned int context;
  293. /* The dma-buf fence sequence number for this atom. This is
  294. * increased every time this katom uses dma-buf fence.
  295. */
  296. atomic_t seqno;
  297. /* This contains a list of all callbacks set up to wait on
  298. * other fences. This atom must be held back from JS until all
  299. * these callbacks have been called and dep_count have reached
  300. * 0. The initial value of dep_count must be equal to the
  301. * number of callbacks on this list.
  302. *
  303. * This list is protected by jctx.lock. Callbacks are added to
  304. * this list when the atom is built and the wait are set up.
  305. * All the callbacks then stay on the list until all callbacks
  306. * have been called and the atom is queued, or cancelled, and
  307. * then all callbacks are taken off the list and freed.
  308. */
  309. struct list_head callbacks;
  310. /* Atomic counter of number of outstandind dma-buf fence
  311. * dependencies for this atom. When dep_count reaches 0 the
  312. * atom may be queued.
  313. *
  314. * The special value "-1" may only be set after the count
  315. * reaches 0, while holding jctx.lock. This indicates that the
  316. * atom has been handled, either queued in JS or cancelled.
  317. *
  318. * If anyone but the dma-fence worker sets this to -1 they must
  319. * ensure that any potentially queued worker must have
  320. * completed before allowing the atom to be marked as unused.
  321. * This can be done by flushing the fence work queue:
  322. * kctx->dma_fence.wq.
  323. */
  324. atomic_t dep_count;
  325. } dma_fence;
  326. #endif /* CONFIG_MALI_DMA_FENCE */
  327. /* Note: refer to kbasep_js_atom_retained_state, which will take a copy of some of the following members */
  328. enum base_jd_event_code event_code;
  329. base_jd_core_req core_req; /**< core requirements */
  330. /** Job Slot to retry submitting to if submission from IRQ handler failed
  331. *
  332. * NOTE: see if this can be unified into the another member e.g. the event */
  333. int retry_submit_on_slot;
  334. union kbasep_js_policy_job_info sched_info;
  335. /* JS atom priority with respect to other atoms on its kctx. */
  336. int sched_priority;
  337. int poking; /* BASE_HW_ISSUE_8316 */
  338. wait_queue_head_t completed;
  339. enum kbase_jd_atom_state status;
  340. #ifdef CONFIG_GPU_TRACEPOINTS
  341. int work_id;
  342. #endif
  343. /* Assigned after atom is completed. Used to check whether PRLAM-10676 workaround should be applied */
  344. int slot_nr;
  345. u32 atom_flags;
  346. /* Number of times this atom has been retried. Used by replay soft job.
  347. */
  348. int retry_count;
  349. enum kbase_atom_gpu_rb_state gpu_rb_state;
  350. u64 need_cache_flush_cores_retained;
  351. atomic_t blocked;
  352. /* Pointer to atom that this atom has cross-slot dependency on */
  353. struct kbase_jd_atom *x_pre_dep;
  354. /* Pointer to atom that has cross-slot dependency on this atom */
  355. struct kbase_jd_atom *x_post_dep;
  356. /* The GPU's flush count recorded at the time of submission, used for
  357. * the cache flush optimisation */
  358. u32 flush_id;
  359. struct kbase_jd_atom_backend backend;
  360. struct list_head queue;
  361. struct kbase_va_region *jit_addr_reg;
  362. /* If non-zero, this indicates that the atom will fail with the set
  363. * event_code when the atom is processed. */
  364. enum base_jd_event_code will_fail_event_code;
  365. };
  366. static inline bool kbase_jd_katom_is_secure(const struct kbase_jd_atom *katom)
  367. {
  368. return (bool)(katom->atom_flags & KBASE_KATOM_FLAG_SECURE);
  369. }
  370. /*
  371. * Theory of operations:
  372. *
  373. * Atom objects are statically allocated within the context structure.
  374. *
  375. * Each atom is the head of two lists, one for the "left" set of dependencies, one for the "right" set.
  376. */
  377. #define KBASE_JD_DEP_QUEUE_SIZE 256
  378. struct kbase_jd_context {
  379. struct mutex lock;
  380. struct kbasep_js_kctx_info sched_info;
  381. struct kbase_jd_atom atoms[BASE_JD_ATOM_COUNT];
  382. /** Tracks all job-dispatch jobs. This includes those not tracked by
  383. * the scheduler: 'not ready to run' and 'dependency-only' jobs. */
  384. u32 job_nr;
  385. /** Waitq that reflects whether there are no jobs (including SW-only
  386. * dependency jobs). This is set when no jobs are present on the ctx,
  387. * and clear when there are jobs.
  388. *
  389. * @note: Job Dispatcher knows about more jobs than the Job Scheduler:
  390. * the Job Scheduler is unaware of jobs that are blocked on dependencies,
  391. * and SW-only dependency jobs.
  392. *
  393. * This waitq can be waited upon to find out when the context jobs are all
  394. * done/cancelled (including those that might've been blocked on
  395. * dependencies) - and so, whether it can be terminated. However, it should
  396. * only be terminated once it is neither present in the policy-queue (see
  397. * kbasep_js_policy_try_evict_ctx() ) nor the run-pool (see
  398. * kbasep_js_kctx_info::ctx::is_scheduled).
  399. *
  400. * Since the waitq is only set under kbase_jd_context::lock,
  401. * the waiter should also briefly obtain and drop kbase_jd_context::lock to
  402. * guarentee that the setter has completed its work on the kbase_context
  403. *
  404. * This must be updated atomically with:
  405. * - kbase_jd_context::job_nr */
  406. wait_queue_head_t zero_jobs_wait;
  407. /** Job Done workqueue. */
  408. struct workqueue_struct *job_done_wq;
  409. spinlock_t tb_lock;
  410. u32 *tb;
  411. size_t tb_wrap_offset;
  412. #ifdef CONFIG_KDS
  413. struct kds_callback kds_cb;
  414. #endif /* CONFIG_KDS */
  415. #ifdef CONFIG_GPU_TRACEPOINTS
  416. atomic_t work_id;
  417. #endif
  418. };
  419. struct kbase_device_info {
  420. u32 features;
  421. };
  422. /** Poking state for BASE_HW_ISSUE_8316 */
  423. enum {
  424. KBASE_AS_POKE_STATE_IN_FLIGHT = 1<<0,
  425. KBASE_AS_POKE_STATE_KILLING_POKE = 1<<1
  426. };
  427. /** Poking state for BASE_HW_ISSUE_8316 */
  428. typedef u32 kbase_as_poke_state;
  429. struct kbase_mmu_setup {
  430. u64 transtab;
  431. u64 memattr;
  432. u64 transcfg;
  433. };
  434. /**
  435. * Important: Our code makes assumptions that a struct kbase_as structure is always at
  436. * kbase_device->as[number]. This is used to recover the containing
  437. * struct kbase_device from a struct kbase_as structure.
  438. *
  439. * Therefore, struct kbase_as structures must not be allocated anywhere else.
  440. */
  441. struct kbase_as {
  442. int number;
  443. struct workqueue_struct *pf_wq;
  444. struct work_struct work_pagefault;
  445. struct work_struct work_busfault;
  446. enum kbase_mmu_fault_type fault_type;
  447. u32 fault_status;
  448. u64 fault_addr;
  449. u64 fault_extra_addr;
  450. struct mutex transaction_mutex;
  451. struct kbase_mmu_setup current_setup;
  452. /* BASE_HW_ISSUE_8316 */
  453. struct workqueue_struct *poke_wq;
  454. struct work_struct poke_work;
  455. /** Protected by kbasep_js_device_data::runpool_irq::lock */
  456. int poke_refcount;
  457. /** Protected by kbasep_js_device_data::runpool_irq::lock */
  458. kbase_as_poke_state poke_state;
  459. struct hrtimer poke_timer;
  460. };
  461. static inline int kbase_as_has_bus_fault(struct kbase_as *as)
  462. {
  463. return as->fault_type == KBASE_MMU_FAULT_TYPE_BUS;
  464. }
  465. static inline int kbase_as_has_page_fault(struct kbase_as *as)
  466. {
  467. return as->fault_type == KBASE_MMU_FAULT_TYPE_PAGE;
  468. }
  469. struct kbasep_mem_device {
  470. atomic_t used_pages; /* Tracks usage of OS shared memory. Updated
  471. when OS memory is allocated/freed. */
  472. };
  473. #define KBASE_TRACE_CODE(X) KBASE_TRACE_CODE_ ## X
  474. enum kbase_trace_code {
  475. /* IMPORTANT: USE OF SPECIAL #INCLUDE OF NON-STANDARD HEADER FILE
  476. * THIS MUST BE USED AT THE START OF THE ENUM */
  477. #define KBASE_TRACE_CODE_MAKE_CODE(X) KBASE_TRACE_CODE(X)
  478. #include "mali_kbase_trace_defs.h"
  479. #undef KBASE_TRACE_CODE_MAKE_CODE
  480. /* Comma on its own, to extend the list */
  481. ,
  482. /* Must be the last in the enum */
  483. KBASE_TRACE_CODE_COUNT
  484. };
  485. #define KBASE_TRACE_FLAG_REFCOUNT (((u8)1) << 0)
  486. #define KBASE_TRACE_FLAG_JOBSLOT (((u8)1) << 1)
  487. struct kbase_trace {
  488. struct timespec timestamp;
  489. u32 thread_id;
  490. u32 cpu;
  491. void *ctx;
  492. bool katom;
  493. int atom_number;
  494. u64 atom_udata[2];
  495. u64 gpu_addr;
  496. unsigned long info_val;
  497. u8 code;
  498. u8 jobslot;
  499. u8 refcount;
  500. u8 flags;
  501. };
  502. /** Event IDs for the power management framework.
  503. *
  504. * Any of these events might be missed, so they should not be relied upon to
  505. * find the precise state of the GPU at a particular time in the
  506. * trace. Overall, we should get a high percentage of these events for
  507. * statisical purposes, and so a few missing should not be a problem */
  508. enum kbase_timeline_pm_event {
  509. /* helper for tests */
  510. KBASEP_TIMELINE_PM_EVENT_FIRST,
  511. /** Event reserved for backwards compatibility with 'init' events */
  512. KBASE_TIMELINE_PM_EVENT_RESERVED_0 = KBASEP_TIMELINE_PM_EVENT_FIRST,
  513. /** The power state of the device has changed.
  514. *
  515. * Specifically, the device has reached a desired or available state.
  516. */
  517. KBASE_TIMELINE_PM_EVENT_GPU_STATE_CHANGED,
  518. /** The GPU is becoming active.
  519. *
  520. * This event is sent when the first context is about to use the GPU.
  521. */
  522. KBASE_TIMELINE_PM_EVENT_GPU_ACTIVE,
  523. /** The GPU is becoming idle.
  524. *
  525. * This event is sent when the last context has finished using the GPU.
  526. */
  527. KBASE_TIMELINE_PM_EVENT_GPU_IDLE,
  528. /** Event reserved for backwards compatibility with 'policy_change'
  529. * events */
  530. KBASE_TIMELINE_PM_EVENT_RESERVED_4,
  531. /** Event reserved for backwards compatibility with 'system_suspend'
  532. * events */
  533. KBASE_TIMELINE_PM_EVENT_RESERVED_5,
  534. /** Event reserved for backwards compatibility with 'system_resume'
  535. * events */
  536. KBASE_TIMELINE_PM_EVENT_RESERVED_6,
  537. /** The job scheduler is requesting to power up/down cores.
  538. *
  539. * This event is sent when:
  540. * - powered down cores are needed to complete a job
  541. * - powered up cores are not needed anymore
  542. */
  543. KBASE_TIMELINE_PM_EVENT_CHANGE_GPU_STATE,
  544. KBASEP_TIMELINE_PM_EVENT_LAST = KBASE_TIMELINE_PM_EVENT_CHANGE_GPU_STATE,
  545. };
  546. #ifdef CONFIG_MALI_TRACE_TIMELINE
  547. struct kbase_trace_kctx_timeline {
  548. atomic_t jd_atoms_in_flight;
  549. u32 owner_tgid;
  550. };
  551. struct kbase_trace_kbdev_timeline {
  552. /* Note: strictly speaking, not needed, because it's in sync with
  553. * kbase_device::jm_slots[]::submitted_nr
  554. *
  555. * But it's kept as an example of how to add global timeline tracking
  556. * information
  557. *
  558. * The caller must hold kbasep_js_device_data::runpool_irq::lock when
  559. * accessing this */
  560. u8 slot_atoms_submitted[BASE_JM_MAX_NR_SLOTS];
  561. /* Last UID for each PM event */
  562. atomic_t pm_event_uid[KBASEP_TIMELINE_PM_EVENT_LAST+1];
  563. /* Counter for generating PM event UIDs */
  564. atomic_t pm_event_uid_counter;
  565. /*
  566. * L2 transition state - true indicates that the transition is ongoing
  567. * Expected to be protected by pm.power_change_lock */
  568. bool l2_transitioning;
  569. };
  570. #endif /* CONFIG_MALI_TRACE_TIMELINE */
  571. struct kbasep_kctx_list_element {
  572. struct list_head link;
  573. struct kbase_context *kctx;
  574. };
  575. /**
  576. * Data stored per device for power management.
  577. *
  578. * This structure contains data for the power management framework. There is one
  579. * instance of this structure per device in the system.
  580. */
  581. struct kbase_pm_device_data {
  582. /**
  583. * The lock protecting Power Management structures accessed outside of
  584. * IRQ.
  585. *
  586. * This lock must also be held whenever the GPU is being powered on or
  587. * off.
  588. */
  589. struct mutex lock;
  590. /** The reference count of active contexts on this device. */
  591. int active_count;
  592. /** Flag indicating suspending/suspended */
  593. bool suspending;
  594. /* Wait queue set when active_count == 0 */
  595. wait_queue_head_t zero_active_count_wait;
  596. /**
  597. * Bit masks identifying the available shader cores that are specified
  598. * via sysfs. One mask per job slot.
  599. */
  600. u64 debug_core_mask[BASE_JM_MAX_NR_SLOTS];
  601. u64 debug_core_mask_all;
  602. /**
  603. * Lock protecting the power state of the device.
  604. *
  605. * This lock must be held when accessing the shader_available_bitmap,
  606. * tiler_available_bitmap, l2_available_bitmap, shader_inuse_bitmap and
  607. * tiler_inuse_bitmap fields of kbase_device, and the ca_in_transition
  608. * and shader_poweroff_pending fields of kbase_pm_device_data. It is
  609. * also held when the hardware power registers are being written to, to
  610. * ensure that two threads do not conflict over the power transitions
  611. * that the hardware should make.
  612. */
  613. spinlock_t power_change_lock;
  614. /**
  615. * Callback for initializing the runtime power management.
  616. *
  617. * @param kbdev The kbase device
  618. *
  619. * @return 0 on success, else error code
  620. */
  621. int (*callback_power_runtime_init)(struct kbase_device *kbdev);
  622. /**
  623. * Callback for terminating the runtime power management.
  624. *
  625. * @param kbdev The kbase device
  626. */
  627. void (*callback_power_runtime_term)(struct kbase_device *kbdev);
  628. /* Time in milliseconds between each dvfs sample */
  629. u32 dvfs_period;
  630. /* Period of GPU poweroff timer */
  631. ktime_t gpu_poweroff_time;
  632. /* Number of ticks of GPU poweroff timer before shader is powered off */
  633. int poweroff_shader_ticks;
  634. /* Number of ticks of GPU poweroff timer before GPU is powered off */
  635. int poweroff_gpu_ticks;
  636. struct kbase_pm_backend_data backend;
  637. };
  638. /**
  639. * struct kbase_secure_ops - Platform specific functions for GPU secure mode
  640. * operations
  641. * @secure_mode_enable: Callback to enable secure mode on the GPU
  642. * @secure_mode_disable: Callback to disable secure mode on the GPU
  643. */
  644. struct kbase_secure_ops {
  645. /**
  646. * secure_mode_enable() - Enable secure mode on the GPU
  647. * @kbdev: The kbase device
  648. *
  649. * Return: 0 on success, non-zero on error
  650. */
  651. int (*secure_mode_enable)(struct kbase_device *kbdev);
  652. /**
  653. * secure_mode_disable() - Disable secure mode on the GPU
  654. * @kbdev: The kbase device
  655. *
  656. * Return: 0 on success, non-zero on error
  657. */
  658. int (*secure_mode_disable)(struct kbase_device *kbdev);
  659. };
  660. /**
  661. * struct kbase_mem_pool - Page based memory pool for kctx/kbdev
  662. * @kbdev: Kbase device where memory is used
  663. * @cur_size: Number of free pages currently in the pool (may exceed @max_size
  664. * in some corner cases)
  665. * @max_size: Maximum number of free pages in the pool
  666. * @pool_lock: Lock protecting the pool - must be held when modifying @cur_size
  667. * and @page_list
  668. * @page_list: List of free pages in the pool
  669. * @reclaim: Shrinker for kernel reclaim of free pages
  670. * @next_pool: Pointer to next pool where pages can be allocated when this pool
  671. * is empty. Pages will spill over to the next pool when this pool
  672. * is full. Can be NULL if there is no next pool.
  673. */
  674. struct kbase_mem_pool {
  675. struct kbase_device *kbdev;
  676. size_t cur_size;
  677. size_t max_size;
  678. spinlock_t pool_lock;
  679. struct list_head page_list;
  680. struct shrinker reclaim;
  681. struct kbase_mem_pool *next_pool;
  682. };
  683. #define DEVNAME_SIZE 16
  684. struct kbase_device {
  685. s8 slot_submit_count_irq[BASE_JM_MAX_NR_SLOTS];
  686. u32 hw_quirks_sc;
  687. u32 hw_quirks_tiler;
  688. u32 hw_quirks_mmu;
  689. u32 hw_quirks_jm;
  690. struct list_head entry;
  691. struct device *dev;
  692. struct miscdevice mdev;
  693. u64 reg_start;
  694. size_t reg_size;
  695. void __iomem *reg;
  696. struct {
  697. int irq;
  698. int flags;
  699. } irqs[3];
  700. struct clk *clock;
  701. #ifdef CONFIG_REGULATOR
  702. struct regulator *regulator;
  703. #endif
  704. char devname[DEVNAME_SIZE];
  705. struct kbase_pm_device_data pm;
  706. struct kbasep_js_device_data js_data;
  707. struct kbase_mem_pool mem_pool;
  708. struct kbasep_mem_device memdev;
  709. struct kbase_mmu_mode const *mmu_mode;
  710. struct kbase_as as[BASE_MAX_NR_AS];
  711. spinlock_t mmu_mask_change;
  712. struct kbase_gpu_props gpu_props;
  713. /** List of SW workarounds for HW issues */
  714. unsigned long hw_issues_mask[(BASE_HW_ISSUE_END + BITS_PER_LONG - 1) / BITS_PER_LONG];
  715. /** List of features available */
  716. unsigned long hw_features_mask[(BASE_HW_FEATURE_END + BITS_PER_LONG - 1) / BITS_PER_LONG];
  717. /* Bitmaps of cores that are currently in use (running jobs).
  718. * These should be kept up to date by the job scheduler.
  719. *
  720. * pm.power_change_lock should be held when accessing these members.
  721. *
  722. * kbase_pm_check_transitions_nolock() should be called when bits are
  723. * cleared to update the power management system and allow transitions to
  724. * occur. */
  725. u64 shader_inuse_bitmap;
  726. /* Refcount for cores in use */
  727. u32 shader_inuse_cnt[64];
  728. /* Bitmaps of cores the JS needs for jobs ready to run */
  729. u64 shader_needed_bitmap;
  730. /* Refcount for cores needed */
  731. u32 shader_needed_cnt[64];
  732. u32 tiler_inuse_cnt;
  733. u32 tiler_needed_cnt;
  734. /* struct for keeping track of the disjoint information
  735. *
  736. * The state is > 0 if the GPU is in a disjoint state. Otherwise 0
  737. * The count is the number of disjoint events that have occurred on the GPU
  738. */
  739. struct {
  740. atomic_t count;
  741. atomic_t state;
  742. } disjoint_event;
  743. /* Refcount for tracking users of the l2 cache, e.g. when using hardware counter instrumentation. */
  744. u32 l2_users_count;
  745. /* Bitmaps of cores that are currently available (powered up and the power policy is happy for jobs to be
  746. * submitted to these cores. These are updated by the power management code. The job scheduler should avoid
  747. * submitting new jobs to any cores that are not marked as available.
  748. *
  749. * pm.power_change_lock should be held when accessing these members.
  750. */
  751. u64 shader_available_bitmap;
  752. u64 tiler_available_bitmap;
  753. u64 l2_available_bitmap;
  754. u64 shader_ready_bitmap;
  755. u64 shader_transitioning_bitmap;
  756. s8 nr_hw_address_spaces; /**< Number of address spaces in the GPU (constant after driver initialisation) */
  757. s8 nr_user_address_spaces; /**< Number of address spaces available to user contexts */
  758. /* Structure used for instrumentation and HW counters dumping */
  759. struct kbase_hwcnt {
  760. /* The lock should be used when accessing any of the following members */
  761. spinlock_t lock;
  762. struct kbase_context *kctx;
  763. u64 addr;
  764. struct kbase_context *suspended_kctx;
  765. struct kbase_uk_hwcnt_setup suspended_state;
  766. struct kbase_instr_backend backend;
  767. } hwcnt;
  768. struct kbase_vinstr_context *vinstr_ctx;
  769. /*value to be written to the irq_throttle register each time an irq is served */
  770. atomic_t irq_throttle_cycles;
  771. #if KBASE_TRACE_ENABLE
  772. spinlock_t trace_lock;
  773. u16 trace_first_out;
  774. u16 trace_next_in;
  775. struct kbase_trace *trace_rbuf;
  776. #endif
  777. /* This is used to override the current job scheduler values for
  778. * JS_SCHEDULING_PERIOD_NS
  779. * JS_SOFT_STOP_TICKS
  780. * JS_SOFT_STOP_TICKS_CL
  781. * JS_HARD_STOP_TICKS_SS
  782. * JS_HARD_STOP_TICKS_CL
  783. * JS_HARD_STOP_TICKS_DUMPING
  784. * JS_RESET_TICKS_SS
  785. * JS_RESET_TICKS_CL
  786. * JS_RESET_TICKS_DUMPING.
  787. *
  788. * These values are set via the js_timeouts sysfs file.
  789. */
  790. u32 js_scheduling_period_ns;
  791. int js_soft_stop_ticks;
  792. int js_soft_stop_ticks_cl;
  793. int js_hard_stop_ticks_ss;
  794. int js_hard_stop_ticks_cl;
  795. int js_hard_stop_ticks_dumping;
  796. int js_reset_ticks_ss;
  797. int js_reset_ticks_cl;
  798. int js_reset_ticks_dumping;
  799. bool js_timeouts_updated;
  800. u32 reset_timeout_ms;
  801. struct mutex cacheclean_lock;
  802. /* Platform specific private data to be accessed by mali_kbase_config_xxx.c only */
  803. void *platform_context;
  804. /* List of kbase_contexts created */
  805. struct list_head kctx_list;
  806. struct mutex kctx_list_lock;
  807. #ifdef CONFIG_PM_DEVFREQ
  808. struct devfreq_dev_profile devfreq_profile;
  809. struct devfreq *devfreq;
  810. unsigned long current_freq;
  811. unsigned long current_voltage;
  812. #ifdef CONFIG_DEVFREQ_THERMAL
  813. struct devfreq_cooling_device *devfreq_cooling;
  814. #endif
  815. #endif
  816. struct kbase_ipa_context *ipa_ctx;
  817. #ifdef CONFIG_MALI_TRACE_TIMELINE
  818. struct kbase_trace_kbdev_timeline timeline;
  819. #endif
  820. /*
  821. * Control for enabling job dump on failure, set when control debugfs
  822. * is opened.
  823. */
  824. bool job_fault_debug;
  825. /* Total number of created contexts */
  826. atomic_t ctx_num;
  827. struct kbase_hwaccess_data hwaccess;
  828. /* Count of page/bus faults waiting for workqueues to process */
  829. atomic_t faults_pending;
  830. /* true if GPU is powered off or power off operation is in progress */
  831. bool poweroff_pending;
  832. /* defaults for new context created for this device */
  833. bool infinite_cache_active_default;
  834. size_t mem_pool_max_size_default;
  835. /* system coherency mode */
  836. u32 system_coherency;
  837. /* Flag to track when cci snoops have been enabled on the interface */
  838. bool cci_snoop_enabled;
  839. /* SMC function IDs to call into Trusted firmware to enable/disable
  840. * cache snooping. Value of 0 indicates that they are not used
  841. */
  842. u32 snoop_enable_smc;
  843. u32 snoop_disable_smc;
  844. /* Secure operations */
  845. struct kbase_secure_ops *secure_ops;
  846. /*
  847. * true when GPU is put into secure mode
  848. */
  849. bool secure_mode;
  850. /*
  851. * true if secure mode is supported
  852. */
  853. bool secure_mode_support;
  854. #ifdef CONFIG_MALI_DEBUG
  855. wait_queue_head_t driver_inactive_wait;
  856. bool driver_inactive;
  857. #endif /* CONFIG_MALI_DEBUG */
  858. /* Boolean indicating if an IRQ flush during reset is in progress. */
  859. bool irq_reset_flush;
  860. /* list of inited sub systems. Used during terminate/error recovery */
  861. u32 inited_subsys;
  862. };
  863. /* JSCTX ringbuffer size will always be a power of 2. The idx shift must be:
  864. - >=2 (buffer size -> 4)
  865. - <= 9 (buffer size 2^(9-1)=256) (technically, 10 works for the ringbuffer
  866. but this is unnecessary as max atoms is 256)
  867. */
  868. #define JSCTX_RB_IDX_SHIFT (8U)
  869. #if ((JSCTX_RB_IDX_SHIFT < 2) || ((3 * JSCTX_RB_IDX_SHIFT) >= 32))
  870. #error "Invalid ring buffer size for 32bit atomic."
  871. #endif
  872. #define JSCTX_RB_SIZE (1U << (JSCTX_RB_IDX_SHIFT - 1U)) /* 1 bit for overflow */
  873. #define JSCTX_RB_SIZE_STORE (1U << JSCTX_RB_IDX_SHIFT)
  874. #define JSCTX_RB_MASK (JSCTX_RB_SIZE - 1U)
  875. #define JSCTX_RB_MASK_STORE (JSCTX_RB_SIZE_STORE - 1U)
  876. #define JSCTX_WR_OFFSET (0U)
  877. #define JSCTX_RN_OFFSET (JSCTX_WR_OFFSET + JSCTX_RB_IDX_SHIFT)
  878. #define JSCTX_RD_OFFSET (JSCTX_RN_OFFSET + JSCTX_RB_IDX_SHIFT)
  879. /**
  880. * struct jsctx_rb_entry - Ringbuffer entry in &struct jsctx_queue.
  881. * @atom_id: Atom ID
  882. */
  883. struct jsctx_rb_entry {
  884. u16 atom_id;
  885. };
  886. /**
  887. * struct jsctx_queue - JS context atom queue, containing both ring buffer and linked list.
  888. * @entries: Array of size %JSCTX_RB_SIZE which holds the &struct
  889. * kbase_jd_atom pointers which make up the contents of the ring
  890. * buffer.
  891. * @indicies: An atomic variable containing indicies for the ring buffer.
  892. * Indicies are of size JSCTX_RB_IDX_SHIFT.
  893. * The following are contained:
  894. * - WR_IDX - Write index. Index of the NEXT slot to be written.
  895. * - RN_IDX - Running index. Index of the tail of the list.
  896. * This is the atom that has been running the longest.
  897. * - RD_IDX - Read index. Index of the next atom to be pulled.
  898. * @queue_head: Head item of the linked list queue.
  899. *
  900. * Locking:
  901. * The linked list assumes jctx.lock is held.
  902. * The ringbuffer serves as an intermediary between irq context and non-irq
  903. * context, without the need for the two to share any lock. irq context can
  904. * pull (and unpull) and only requires the runpool_irq.lock. While non-irq
  905. * context can add and remove and only requires holding only jctx.lock.
  906. * Error handling affecting both, or the whole ringbuffer in general, must
  907. * hold both locks or otherwise ensure (f.ex deschedule/kill) only that thread
  908. * is accessing the buffer.
  909. * This means that RD_IDX is updated by irq-context (pull and unpull) and must
  910. * hold runpool_irq.lock. While WR_IDX (add) and RN_IDX (remove) is updated by
  911. * non-irq context and must hold jctx.lock.
  912. * Note that pull (or sister function peek) must also access WR_IDX to ensure
  913. * there is free space in the buffer, this is ok as WR_IDX is only increased.
  914. * A similar situation is apparent with unpull and RN_IDX, but only one atom
  915. * (already pulled) can cause either remove or unpull, so this will never
  916. * conflict.
  917. *
  918. * &struct jsctx_queue is a queue of &struct kbase_jd_atom,
  919. * part ringbuffer and part linked list.
  920. */
  921. struct jsctx_queue {
  922. struct jsctx_rb_entry entries[JSCTX_RB_SIZE];
  923. atomic_t indicies;
  924. struct list_head queue_head;
  925. };
  926. #define KBASE_API_VERSION(major, minor) ((((major) & 0xFFF) << 20) | \
  927. (((minor) & 0xFFF) << 8) | \
  928. ((0 & 0xFF) << 0))
  929. struct kbase_context {
  930. struct file *filp;
  931. struct kbase_device *kbdev;
  932. int id; /* System wide unique id */
  933. unsigned long api_version;
  934. phys_addr_t pgd;
  935. struct list_head event_list;
  936. struct list_head event_coalesce_list;
  937. struct mutex event_mutex;
  938. atomic_t event_closed;
  939. struct workqueue_struct *event_workq;
  940. atomic_t event_count;
  941. int event_coalesce_count;
  942. bool is_compat;
  943. atomic_t setup_complete;
  944. atomic_t setup_in_progress;
  945. u64 *mmu_teardown_pages;
  946. struct page *aliasing_sink_page;
  947. struct mutex mmu_lock;
  948. struct mutex reg_lock; /* To be converted to a rwlock? */
  949. struct rb_root reg_rbtree; /* Red-Black tree of GPU regions (live regions) */
  950. unsigned long cookies;
  951. struct kbase_va_region *pending_regions[BITS_PER_LONG];
  952. wait_queue_head_t event_queue;
  953. pid_t tgid;
  954. pid_t pid;
  955. struct kbase_jd_context jctx;
  956. atomic_t used_pages;
  957. atomic_t nonmapped_pages;
  958. struct kbase_mem_pool mem_pool;
  959. struct shrinker reclaim;
  960. struct list_head evict_list;
  961. struct mutex evict_lock;
  962. struct list_head waiting_soft_jobs;
  963. spinlock_t waiting_soft_jobs_lock;
  964. #ifdef CONFIG_KDS
  965. struct list_head waiting_kds_resource;
  966. #endif
  967. #ifdef CONFIG_MALI_DMA_FENCE
  968. struct {
  969. struct list_head waiting_resource;
  970. struct workqueue_struct *wq;
  971. } dma_fence;
  972. #endif /* CONFIG_MALI_DMA_FENCE */
  973. /** This is effectively part of the Run Pool, because it only has a valid
  974. * setting (!=KBASEP_AS_NR_INVALID) whilst the context is scheduled in
  975. *
  976. * The kbasep_js_device_data::runpool_irq::lock must be held whilst accessing
  977. * this.
  978. *
  979. * If the context relating to this as_nr is required, you must use
  980. * kbasep_js_runpool_retain_ctx() to ensure that the context doesn't disappear
  981. * whilst you're using it. Alternatively, just hold the kbasep_js_device_data::runpool_irq::lock
  982. * to ensure the context doesn't disappear (but this has restrictions on what other locks
  983. * you can take whilst doing this) */
  984. int as_nr;
  985. /* NOTE:
  986. *
  987. * Flags are in jctx.sched_info.ctx.flags
  988. * Mutable flags *must* be accessed under jctx.sched_info.ctx.jsctx_mutex
  989. *
  990. * All other flags must be added there */
  991. spinlock_t mm_update_lock;
  992. struct mm_struct *process_mm;
  993. /* End of the SAME_VA zone */
  994. u64 same_va_end;
  995. #ifdef CONFIG_MALI_TRACE_TIMELINE
  996. struct kbase_trace_kctx_timeline timeline;
  997. #endif
  998. struct jsctx_queue jsctx_queue
  999. [KBASE_JS_ATOM_SCHED_PRIO_COUNT][BASE_JM_MAX_NR_SLOTS];
  1000. /* Number of atoms currently pulled from this context */
  1001. atomic_t atoms_pulled;
  1002. /* Number of atoms currently pulled from this context, per slot */
  1003. atomic_t atoms_pulled_slot[BASE_JM_MAX_NR_SLOTS];
  1004. /* true if last kick() caused atoms to be pulled from this context */
  1005. bool pulled;
  1006. /* true if infinite cache is to be enabled for new allocations. Existing
  1007. * allocations will not change. bool stored as a u32 per Linux API */
  1008. bool infinite_cache_active;
  1009. /* Bitmask of slots that can be pulled from */
  1010. u32 slots_pullable;
  1011. /* true if address space assignment is pending */
  1012. bool as_pending;
  1013. /* Backend specific data */
  1014. struct kbase_context_backend backend;
  1015. /* Work structure used for deferred ASID assignment */
  1016. struct work_struct work;
  1017. /* Only one userspace vinstr client per kbase context */
  1018. struct kbase_vinstr_client *vinstr_cli;
  1019. struct mutex vinstr_cli_lock;
  1020. /* Must hold queue_mutex when accessing */
  1021. bool ctx_active;
  1022. /* List of completed jobs waiting for events to be posted */
  1023. struct list_head completed_jobs;
  1024. /* Number of work items currently pending on job_done_wq */
  1025. atomic_t work_count;
  1026. /* true if context is counted in kbdev->js_data.nr_contexts_runnable */
  1027. bool ctx_runnable_ref;
  1028. /* Waiting soft-jobs will fail when this timer expires */
  1029. struct hrtimer soft_event_timeout;
  1030. /* JIT allocation management */
  1031. struct kbase_va_region *jit_alloc[255];
  1032. struct list_head jit_active_head;
  1033. struct list_head jit_pool_head;
  1034. struct list_head jit_destroy_head;
  1035. struct mutex jit_lock;
  1036. struct work_struct jit_work;
  1037. /* External sticky resource management */
  1038. struct list_head ext_res_meta_head;
  1039. };
  1040. /**
  1041. * struct kbase_ctx_ext_res_meta - Structure which binds an external resource
  1042. * to a @kbase_context.
  1043. * @ext_res_node: List head for adding the metadata to a
  1044. * @kbase_context.
  1045. * @alloc: The physical memory allocation structure
  1046. * which is mapped.
  1047. * @gpu_addr: The GPU virtual address the resource is
  1048. * mapped to.
  1049. *
  1050. * External resources can be mapped into multiple contexts as well as the same
  1051. * context multiple times.
  1052. * As kbase_va_region itself isn't refcounted we can't attach our extra
  1053. * information to it as it could be removed under our feet leaving external
  1054. * resources pinned.
  1055. * This metadata structure binds a single external resource to a single
  1056. * context, ensuring that per context mapping is tracked separately so it can
  1057. * be overridden when needed and abuses by the application (freeing the resource
  1058. * multiple times) don't effect the refcount of the physical allocation.
  1059. */
  1060. struct kbase_ctx_ext_res_meta {
  1061. struct list_head ext_res_node;
  1062. struct kbase_mem_phy_alloc *alloc;
  1063. u64 gpu_addr;
  1064. };
  1065. enum kbase_reg_access_type {
  1066. REG_READ,
  1067. REG_WRITE
  1068. };
  1069. enum kbase_share_attr_bits {
  1070. /* (1ULL << 8) bit is reserved */
  1071. SHARE_BOTH_BITS = (2ULL << 8), /* inner and outer shareable coherency */
  1072. SHARE_INNER_BITS = (3ULL << 8) /* inner shareable coherency */
  1073. };
  1074. /**
  1075. * kbase_device_is_cpu_coherent - Returns if the device is CPU coherent.
  1076. * @kbdev: kbase device
  1077. *
  1078. * Return: true if the device access are coherent, false if not.
  1079. */
  1080. static inline bool kbase_device_is_cpu_coherent(struct kbase_device *kbdev)
  1081. {
  1082. if ((kbdev->system_coherency == COHERENCY_ACE_LITE) ||
  1083. (kbdev->system_coherency == COHERENCY_ACE))
  1084. return true;
  1085. return false;
  1086. }
  1087. /* Conversion helpers for setting up high resolution timers */
  1088. #define HR_TIMER_DELAY_MSEC(x) (ns_to_ktime((x)*1000000U))
  1089. #define HR_TIMER_DELAY_NSEC(x) (ns_to_ktime(x))
  1090. /* Maximum number of loops polling the GPU for a cache flush before we assume it must have completed */
  1091. #define KBASE_CLEAN_CACHE_MAX_LOOPS 100000
  1092. /* Maximum number of loops polling the GPU for an AS command to complete before we assume the GPU has hung */
  1093. #define KBASE_AS_INACTIVE_MAX_LOOPS 100000
  1094. /* Maximum number of times a job can be replayed */
  1095. #define BASEP_JD_REPLAY_LIMIT 15
  1096. /* JobDescriptorHeader - taken from the architecture specifications, the layout
  1097. * is currently identical for all GPU archs. */
  1098. struct job_descriptor_header {
  1099. u32 exception_status;
  1100. u32 first_incomplete_task;
  1101. u64 fault_pointer;
  1102. u8 job_descriptor_size : 1;
  1103. u8 job_type : 7;
  1104. u8 job_barrier : 1;
  1105. u8 _reserved_01 : 1;
  1106. u8 _reserved_1 : 1;
  1107. u8 _reserved_02 : 1;
  1108. u8 _reserved_03 : 1;
  1109. u8 _reserved_2 : 1;
  1110. u8 _reserved_04 : 1;
  1111. u8 _reserved_05 : 1;
  1112. u16 job_index;
  1113. u16 job_dependency_index_1;
  1114. u16 job_dependency_index_2;
  1115. union {
  1116. u64 _64;
  1117. u32 _32;
  1118. } next_job;
  1119. } __attribute__((packed));
  1120. #endif /* _KBASE_DEFS_H_ */