mali_base_hwconfig_issues.h 21 KB

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  1. /*
  2. *
  3. * (C) COPYRIGHT 2015-2016 ARM Limited. All rights reserved.
  4. *
  5. * This program is free software and is provided to you under the terms of the
  6. * GNU General Public License version 2 as published by the Free Software
  7. * Foundation, and any use by you of this program is subject to the terms
  8. * of such GNU licence.
  9. *
  10. * A copy of the licence is included with the program, and can also be obtained
  11. * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  12. * Boston, MA 02110-1301, USA.
  13. *
  14. */
  15. /* AUTOMATICALLY GENERATED FILE. If you want to amend the issues/features,
  16. * please update base/tools/hwconfig_generator/hwc_{issues,features}.py
  17. * For more information see base/tools/hwconfig_generator/README
  18. */
  19. #ifndef _BASE_HWCONFIG_ISSUES_H_
  20. #define _BASE_HWCONFIG_ISSUES_H_
  21. enum base_hw_issue {
  22. BASE_HW_ISSUE_5736,
  23. BASE_HW_ISSUE_6367,
  24. BASE_HW_ISSUE_6398,
  25. BASE_HW_ISSUE_6402,
  26. BASE_HW_ISSUE_6787,
  27. BASE_HW_ISSUE_7027,
  28. BASE_HW_ISSUE_7144,
  29. BASE_HW_ISSUE_7304,
  30. BASE_HW_ISSUE_8073,
  31. BASE_HW_ISSUE_8186,
  32. BASE_HW_ISSUE_8215,
  33. BASE_HW_ISSUE_8245,
  34. BASE_HW_ISSUE_8250,
  35. BASE_HW_ISSUE_8260,
  36. BASE_HW_ISSUE_8280,
  37. BASE_HW_ISSUE_8316,
  38. BASE_HW_ISSUE_8381,
  39. BASE_HW_ISSUE_8394,
  40. BASE_HW_ISSUE_8401,
  41. BASE_HW_ISSUE_8408,
  42. BASE_HW_ISSUE_8443,
  43. BASE_HW_ISSUE_8456,
  44. BASE_HW_ISSUE_8564,
  45. BASE_HW_ISSUE_8634,
  46. BASE_HW_ISSUE_8778,
  47. BASE_HW_ISSUE_8791,
  48. BASE_HW_ISSUE_8833,
  49. BASE_HW_ISSUE_8879,
  50. BASE_HW_ISSUE_8896,
  51. BASE_HW_ISSUE_8975,
  52. BASE_HW_ISSUE_8986,
  53. BASE_HW_ISSUE_8987,
  54. BASE_HW_ISSUE_9010,
  55. BASE_HW_ISSUE_9418,
  56. BASE_HW_ISSUE_9423,
  57. BASE_HW_ISSUE_9435,
  58. BASE_HW_ISSUE_9510,
  59. BASE_HW_ISSUE_9566,
  60. BASE_HW_ISSUE_9630,
  61. BASE_HW_ISSUE_10127,
  62. BASE_HW_ISSUE_10327,
  63. BASE_HW_ISSUE_10410,
  64. BASE_HW_ISSUE_10471,
  65. BASE_HW_ISSUE_10472,
  66. BASE_HW_ISSUE_10487,
  67. BASE_HW_ISSUE_10607,
  68. BASE_HW_ISSUE_10632,
  69. BASE_HW_ISSUE_10676,
  70. BASE_HW_ISSUE_10682,
  71. BASE_HW_ISSUE_10684,
  72. BASE_HW_ISSUE_10797,
  73. BASE_HW_ISSUE_10817,
  74. BASE_HW_ISSUE_10821,
  75. BASE_HW_ISSUE_10883,
  76. BASE_HW_ISSUE_10931,
  77. BASE_HW_ISSUE_10946,
  78. BASE_HW_ISSUE_10959,
  79. BASE_HW_ISSUE_10969,
  80. BASE_HW_ISSUE_10984,
  81. BASE_HW_ISSUE_10995,
  82. BASE_HW_ISSUE_11012,
  83. BASE_HW_ISSUE_11020,
  84. BASE_HW_ISSUE_11024,
  85. BASE_HW_ISSUE_11035,
  86. BASE_HW_ISSUE_11042,
  87. BASE_HW_ISSUE_11051,
  88. BASE_HW_ISSUE_11054,
  89. BASE_HW_ISSUE_T76X_26,
  90. BASE_HW_ISSUE_T76X_1909,
  91. BASE_HW_ISSUE_T76X_1963,
  92. BASE_HW_ISSUE_T76X_3086,
  93. BASE_HW_ISSUE_T76X_3542,
  94. BASE_HW_ISSUE_T76X_3556,
  95. BASE_HW_ISSUE_T76X_3700,
  96. BASE_HW_ISSUE_T76X_3793,
  97. BASE_HW_ISSUE_T76X_3953,
  98. BASE_HW_ISSUE_T76X_3960,
  99. BASE_HW_ISSUE_T76X_3964,
  100. BASE_HW_ISSUE_T76X_3966,
  101. BASE_HW_ISSUE_T76X_3979,
  102. BASE_HW_ISSUE_TMIX_7891,
  103. BASE_HW_ISSUE_TMIX_7940,
  104. BASE_HW_ISSUE_TMIX_8042,
  105. BASE_HW_ISSUE_TMIX_8133,
  106. BASE_HW_ISSUE_TMIX_8138,
  107. BASE_HW_ISSUE_TMIX_8206,
  108. GPUCORE_1619,
  109. BASE_HW_ISSUE_END
  110. };
  111. static const enum base_hw_issue base_hw_issues_generic[] = {
  112. BASE_HW_ISSUE_END
  113. };
  114. static const enum base_hw_issue base_hw_issues_t60x_r0p0_15dev0[] = {
  115. BASE_HW_ISSUE_6367,
  116. BASE_HW_ISSUE_6398,
  117. BASE_HW_ISSUE_6402,
  118. BASE_HW_ISSUE_6787,
  119. BASE_HW_ISSUE_7027,
  120. BASE_HW_ISSUE_7144,
  121. BASE_HW_ISSUE_7304,
  122. BASE_HW_ISSUE_8073,
  123. BASE_HW_ISSUE_8186,
  124. BASE_HW_ISSUE_8215,
  125. BASE_HW_ISSUE_8245,
  126. BASE_HW_ISSUE_8250,
  127. BASE_HW_ISSUE_8260,
  128. BASE_HW_ISSUE_8280,
  129. BASE_HW_ISSUE_8316,
  130. BASE_HW_ISSUE_8381,
  131. BASE_HW_ISSUE_8394,
  132. BASE_HW_ISSUE_8401,
  133. BASE_HW_ISSUE_8408,
  134. BASE_HW_ISSUE_8443,
  135. BASE_HW_ISSUE_8456,
  136. BASE_HW_ISSUE_8564,
  137. BASE_HW_ISSUE_8634,
  138. BASE_HW_ISSUE_8778,
  139. BASE_HW_ISSUE_8791,
  140. BASE_HW_ISSUE_8833,
  141. BASE_HW_ISSUE_8896,
  142. BASE_HW_ISSUE_8975,
  143. BASE_HW_ISSUE_8986,
  144. BASE_HW_ISSUE_8987,
  145. BASE_HW_ISSUE_9010,
  146. BASE_HW_ISSUE_9418,
  147. BASE_HW_ISSUE_9423,
  148. BASE_HW_ISSUE_9435,
  149. BASE_HW_ISSUE_9510,
  150. BASE_HW_ISSUE_9566,
  151. BASE_HW_ISSUE_9630,
  152. BASE_HW_ISSUE_10410,
  153. BASE_HW_ISSUE_10471,
  154. BASE_HW_ISSUE_10472,
  155. BASE_HW_ISSUE_10487,
  156. BASE_HW_ISSUE_10607,
  157. BASE_HW_ISSUE_10632,
  158. BASE_HW_ISSUE_10676,
  159. BASE_HW_ISSUE_10682,
  160. BASE_HW_ISSUE_10684,
  161. BASE_HW_ISSUE_10883,
  162. BASE_HW_ISSUE_10931,
  163. BASE_HW_ISSUE_10946,
  164. BASE_HW_ISSUE_10969,
  165. BASE_HW_ISSUE_10984,
  166. BASE_HW_ISSUE_10995,
  167. BASE_HW_ISSUE_11012,
  168. BASE_HW_ISSUE_11020,
  169. BASE_HW_ISSUE_11035,
  170. BASE_HW_ISSUE_11051,
  171. BASE_HW_ISSUE_11054,
  172. BASE_HW_ISSUE_T76X_1909,
  173. BASE_HW_ISSUE_T76X_3964,
  174. GPUCORE_1619,
  175. BASE_HW_ISSUE_END
  176. };
  177. static const enum base_hw_issue base_hw_issues_t60x_r0p0_eac[] = {
  178. BASE_HW_ISSUE_6367,
  179. BASE_HW_ISSUE_6402,
  180. BASE_HW_ISSUE_6787,
  181. BASE_HW_ISSUE_7027,
  182. BASE_HW_ISSUE_7304,
  183. BASE_HW_ISSUE_8408,
  184. BASE_HW_ISSUE_8564,
  185. BASE_HW_ISSUE_8778,
  186. BASE_HW_ISSUE_8975,
  187. BASE_HW_ISSUE_9010,
  188. BASE_HW_ISSUE_9418,
  189. BASE_HW_ISSUE_9423,
  190. BASE_HW_ISSUE_9435,
  191. BASE_HW_ISSUE_9510,
  192. BASE_HW_ISSUE_10410,
  193. BASE_HW_ISSUE_10471,
  194. BASE_HW_ISSUE_10472,
  195. BASE_HW_ISSUE_10487,
  196. BASE_HW_ISSUE_10607,
  197. BASE_HW_ISSUE_10632,
  198. BASE_HW_ISSUE_10676,
  199. BASE_HW_ISSUE_10682,
  200. BASE_HW_ISSUE_10684,
  201. BASE_HW_ISSUE_10883,
  202. BASE_HW_ISSUE_10931,
  203. BASE_HW_ISSUE_10946,
  204. BASE_HW_ISSUE_10969,
  205. BASE_HW_ISSUE_11012,
  206. BASE_HW_ISSUE_11020,
  207. BASE_HW_ISSUE_11035,
  208. BASE_HW_ISSUE_11051,
  209. BASE_HW_ISSUE_11054,
  210. BASE_HW_ISSUE_T76X_1909,
  211. BASE_HW_ISSUE_T76X_3964,
  212. BASE_HW_ISSUE_END
  213. };
  214. static const enum base_hw_issue base_hw_issues_t60x_r0p1[] = {
  215. BASE_HW_ISSUE_6367,
  216. BASE_HW_ISSUE_6402,
  217. BASE_HW_ISSUE_6787,
  218. BASE_HW_ISSUE_7027,
  219. BASE_HW_ISSUE_7304,
  220. BASE_HW_ISSUE_8408,
  221. BASE_HW_ISSUE_8564,
  222. BASE_HW_ISSUE_8778,
  223. BASE_HW_ISSUE_8975,
  224. BASE_HW_ISSUE_9010,
  225. BASE_HW_ISSUE_9435,
  226. BASE_HW_ISSUE_9510,
  227. BASE_HW_ISSUE_10410,
  228. BASE_HW_ISSUE_10471,
  229. BASE_HW_ISSUE_10472,
  230. BASE_HW_ISSUE_10487,
  231. BASE_HW_ISSUE_10607,
  232. BASE_HW_ISSUE_10632,
  233. BASE_HW_ISSUE_10676,
  234. BASE_HW_ISSUE_10682,
  235. BASE_HW_ISSUE_10684,
  236. BASE_HW_ISSUE_10883,
  237. BASE_HW_ISSUE_10931,
  238. BASE_HW_ISSUE_10946,
  239. BASE_HW_ISSUE_11012,
  240. BASE_HW_ISSUE_11020,
  241. BASE_HW_ISSUE_11035,
  242. BASE_HW_ISSUE_11051,
  243. BASE_HW_ISSUE_11054,
  244. BASE_HW_ISSUE_T76X_1909,
  245. BASE_HW_ISSUE_T76X_1963,
  246. BASE_HW_ISSUE_T76X_3964,
  247. BASE_HW_ISSUE_END
  248. };
  249. static const enum base_hw_issue base_hw_issues_t62x_r0p1[] = {
  250. BASE_HW_ISSUE_6402,
  251. BASE_HW_ISSUE_9435,
  252. BASE_HW_ISSUE_10127,
  253. BASE_HW_ISSUE_10327,
  254. BASE_HW_ISSUE_10410,
  255. BASE_HW_ISSUE_10471,
  256. BASE_HW_ISSUE_10472,
  257. BASE_HW_ISSUE_10487,
  258. BASE_HW_ISSUE_10607,
  259. BASE_HW_ISSUE_10632,
  260. BASE_HW_ISSUE_10676,
  261. BASE_HW_ISSUE_10682,
  262. BASE_HW_ISSUE_10684,
  263. BASE_HW_ISSUE_10817,
  264. BASE_HW_ISSUE_10821,
  265. BASE_HW_ISSUE_10883,
  266. BASE_HW_ISSUE_10931,
  267. BASE_HW_ISSUE_10946,
  268. BASE_HW_ISSUE_10959,
  269. BASE_HW_ISSUE_11012,
  270. BASE_HW_ISSUE_11020,
  271. BASE_HW_ISSUE_11024,
  272. BASE_HW_ISSUE_11035,
  273. BASE_HW_ISSUE_11042,
  274. BASE_HW_ISSUE_11051,
  275. BASE_HW_ISSUE_11054,
  276. BASE_HW_ISSUE_T76X_1909,
  277. BASE_HW_ISSUE_T76X_1963,
  278. BASE_HW_ISSUE_END
  279. };
  280. static const enum base_hw_issue base_hw_issues_t62x_r1p0[] = {
  281. BASE_HW_ISSUE_6402,
  282. BASE_HW_ISSUE_9435,
  283. BASE_HW_ISSUE_10471,
  284. BASE_HW_ISSUE_10472,
  285. BASE_HW_ISSUE_10684,
  286. BASE_HW_ISSUE_10821,
  287. BASE_HW_ISSUE_10883,
  288. BASE_HW_ISSUE_10931,
  289. BASE_HW_ISSUE_10946,
  290. BASE_HW_ISSUE_10959,
  291. BASE_HW_ISSUE_11012,
  292. BASE_HW_ISSUE_11020,
  293. BASE_HW_ISSUE_11024,
  294. BASE_HW_ISSUE_11042,
  295. BASE_HW_ISSUE_11051,
  296. BASE_HW_ISSUE_11054,
  297. BASE_HW_ISSUE_T76X_1909,
  298. BASE_HW_ISSUE_T76X_1963,
  299. BASE_HW_ISSUE_T76X_3964,
  300. BASE_HW_ISSUE_END
  301. };
  302. static const enum base_hw_issue base_hw_issues_t62x_r1p1[] = {
  303. BASE_HW_ISSUE_6402,
  304. BASE_HW_ISSUE_9435,
  305. BASE_HW_ISSUE_10471,
  306. BASE_HW_ISSUE_10472,
  307. BASE_HW_ISSUE_10684,
  308. BASE_HW_ISSUE_10821,
  309. BASE_HW_ISSUE_10883,
  310. BASE_HW_ISSUE_10931,
  311. BASE_HW_ISSUE_10946,
  312. BASE_HW_ISSUE_10959,
  313. BASE_HW_ISSUE_11012,
  314. BASE_HW_ISSUE_11042,
  315. BASE_HW_ISSUE_11051,
  316. BASE_HW_ISSUE_11054,
  317. BASE_HW_ISSUE_T76X_1909,
  318. BASE_HW_ISSUE_T76X_1963,
  319. BASE_HW_ISSUE_END
  320. };
  321. static const enum base_hw_issue base_hw_issues_t76x_r0p0[] = {
  322. BASE_HW_ISSUE_9435,
  323. BASE_HW_ISSUE_10821,
  324. BASE_HW_ISSUE_10883,
  325. BASE_HW_ISSUE_10946,
  326. BASE_HW_ISSUE_11020,
  327. BASE_HW_ISSUE_11024,
  328. BASE_HW_ISSUE_11042,
  329. BASE_HW_ISSUE_11051,
  330. BASE_HW_ISSUE_11054,
  331. BASE_HW_ISSUE_T76X_26,
  332. BASE_HW_ISSUE_T76X_1909,
  333. BASE_HW_ISSUE_T76X_1963,
  334. BASE_HW_ISSUE_T76X_3086,
  335. BASE_HW_ISSUE_T76X_3542,
  336. BASE_HW_ISSUE_T76X_3556,
  337. BASE_HW_ISSUE_T76X_3700,
  338. BASE_HW_ISSUE_T76X_3793,
  339. BASE_HW_ISSUE_T76X_3953,
  340. BASE_HW_ISSUE_T76X_3960,
  341. BASE_HW_ISSUE_T76X_3964,
  342. BASE_HW_ISSUE_T76X_3966,
  343. BASE_HW_ISSUE_T76X_3979,
  344. BASE_HW_ISSUE_TMIX_7891,
  345. BASE_HW_ISSUE_END
  346. };
  347. static const enum base_hw_issue base_hw_issues_t76x_r0p1[] = {
  348. BASE_HW_ISSUE_9435,
  349. BASE_HW_ISSUE_10821,
  350. BASE_HW_ISSUE_10883,
  351. BASE_HW_ISSUE_10946,
  352. BASE_HW_ISSUE_11020,
  353. BASE_HW_ISSUE_11024,
  354. BASE_HW_ISSUE_11042,
  355. BASE_HW_ISSUE_11051,
  356. BASE_HW_ISSUE_11054,
  357. BASE_HW_ISSUE_T76X_26,
  358. BASE_HW_ISSUE_T76X_1909,
  359. BASE_HW_ISSUE_T76X_1963,
  360. BASE_HW_ISSUE_T76X_3086,
  361. BASE_HW_ISSUE_T76X_3542,
  362. BASE_HW_ISSUE_T76X_3556,
  363. BASE_HW_ISSUE_T76X_3700,
  364. BASE_HW_ISSUE_T76X_3793,
  365. BASE_HW_ISSUE_T76X_3953,
  366. BASE_HW_ISSUE_T76X_3960,
  367. BASE_HW_ISSUE_T76X_3964,
  368. BASE_HW_ISSUE_T76X_3966,
  369. BASE_HW_ISSUE_T76X_3979,
  370. BASE_HW_ISSUE_TMIX_7891,
  371. BASE_HW_ISSUE_END
  372. };
  373. static const enum base_hw_issue base_hw_issues_t76x_r0p1_50rel0[] = {
  374. BASE_HW_ISSUE_9435,
  375. BASE_HW_ISSUE_10821,
  376. BASE_HW_ISSUE_10883,
  377. BASE_HW_ISSUE_10946,
  378. BASE_HW_ISSUE_11042,
  379. BASE_HW_ISSUE_11051,
  380. BASE_HW_ISSUE_11054,
  381. BASE_HW_ISSUE_T76X_26,
  382. BASE_HW_ISSUE_T76X_1909,
  383. BASE_HW_ISSUE_T76X_1963,
  384. BASE_HW_ISSUE_T76X_3086,
  385. BASE_HW_ISSUE_T76X_3542,
  386. BASE_HW_ISSUE_T76X_3556,
  387. BASE_HW_ISSUE_T76X_3700,
  388. BASE_HW_ISSUE_T76X_3793,
  389. BASE_HW_ISSUE_T76X_3953,
  390. BASE_HW_ISSUE_T76X_3960,
  391. BASE_HW_ISSUE_T76X_3964,
  392. BASE_HW_ISSUE_T76X_3966,
  393. BASE_HW_ISSUE_T76X_3979,
  394. BASE_HW_ISSUE_TMIX_7891,
  395. BASE_HW_ISSUE_END
  396. };
  397. static const enum base_hw_issue base_hw_issues_t76x_r0p2[] = {
  398. BASE_HW_ISSUE_9435,
  399. BASE_HW_ISSUE_10821,
  400. BASE_HW_ISSUE_10883,
  401. BASE_HW_ISSUE_10946,
  402. BASE_HW_ISSUE_11020,
  403. BASE_HW_ISSUE_11024,
  404. BASE_HW_ISSUE_11042,
  405. BASE_HW_ISSUE_11051,
  406. BASE_HW_ISSUE_11054,
  407. BASE_HW_ISSUE_T76X_26,
  408. BASE_HW_ISSUE_T76X_1909,
  409. BASE_HW_ISSUE_T76X_1963,
  410. BASE_HW_ISSUE_T76X_3086,
  411. BASE_HW_ISSUE_T76X_3542,
  412. BASE_HW_ISSUE_T76X_3556,
  413. BASE_HW_ISSUE_T76X_3700,
  414. BASE_HW_ISSUE_T76X_3793,
  415. BASE_HW_ISSUE_T76X_3953,
  416. BASE_HW_ISSUE_T76X_3960,
  417. BASE_HW_ISSUE_T76X_3964,
  418. BASE_HW_ISSUE_T76X_3966,
  419. BASE_HW_ISSUE_T76X_3979,
  420. BASE_HW_ISSUE_TMIX_7891,
  421. BASE_HW_ISSUE_END
  422. };
  423. static const enum base_hw_issue base_hw_issues_t76x_r0p3[] = {
  424. BASE_HW_ISSUE_9435,
  425. BASE_HW_ISSUE_10821,
  426. BASE_HW_ISSUE_10883,
  427. BASE_HW_ISSUE_10946,
  428. BASE_HW_ISSUE_11042,
  429. BASE_HW_ISSUE_11051,
  430. BASE_HW_ISSUE_11054,
  431. BASE_HW_ISSUE_T76X_26,
  432. BASE_HW_ISSUE_T76X_1909,
  433. BASE_HW_ISSUE_T76X_1963,
  434. BASE_HW_ISSUE_T76X_3086,
  435. BASE_HW_ISSUE_T76X_3542,
  436. BASE_HW_ISSUE_T76X_3556,
  437. BASE_HW_ISSUE_T76X_3700,
  438. BASE_HW_ISSUE_T76X_3793,
  439. BASE_HW_ISSUE_T76X_3953,
  440. BASE_HW_ISSUE_T76X_3960,
  441. BASE_HW_ISSUE_T76X_3964,
  442. BASE_HW_ISSUE_T76X_3966,
  443. BASE_HW_ISSUE_T76X_3979,
  444. BASE_HW_ISSUE_TMIX_7891,
  445. BASE_HW_ISSUE_END
  446. };
  447. static const enum base_hw_issue base_hw_issues_t76x_r1p0[] = {
  448. BASE_HW_ISSUE_9435,
  449. BASE_HW_ISSUE_10821,
  450. BASE_HW_ISSUE_10883,
  451. BASE_HW_ISSUE_10946,
  452. BASE_HW_ISSUE_11042,
  453. BASE_HW_ISSUE_11051,
  454. BASE_HW_ISSUE_11054,
  455. BASE_HW_ISSUE_T76X_1909,
  456. BASE_HW_ISSUE_T76X_1963,
  457. BASE_HW_ISSUE_T76X_3086,
  458. BASE_HW_ISSUE_T76X_3700,
  459. BASE_HW_ISSUE_T76X_3793,
  460. BASE_HW_ISSUE_T76X_3953,
  461. BASE_HW_ISSUE_T76X_3960,
  462. BASE_HW_ISSUE_T76X_3964,
  463. BASE_HW_ISSUE_T76X_3966,
  464. BASE_HW_ISSUE_T76X_3979,
  465. BASE_HW_ISSUE_TMIX_7891,
  466. BASE_HW_ISSUE_END
  467. };
  468. static const enum base_hw_issue base_hw_issues_t72x_r0p0[] = {
  469. BASE_HW_ISSUE_6402,
  470. BASE_HW_ISSUE_9435,
  471. BASE_HW_ISSUE_10471,
  472. BASE_HW_ISSUE_10684,
  473. BASE_HW_ISSUE_10797,
  474. BASE_HW_ISSUE_10821,
  475. BASE_HW_ISSUE_10883,
  476. BASE_HW_ISSUE_10946,
  477. BASE_HW_ISSUE_11042,
  478. BASE_HW_ISSUE_11051,
  479. BASE_HW_ISSUE_11054,
  480. BASE_HW_ISSUE_T76X_1909,
  481. BASE_HW_ISSUE_T76X_1963,
  482. BASE_HW_ISSUE_T76X_3964,
  483. BASE_HW_ISSUE_END
  484. };
  485. static const enum base_hw_issue base_hw_issues_t72x_r1p0[] = {
  486. BASE_HW_ISSUE_6402,
  487. BASE_HW_ISSUE_9435,
  488. BASE_HW_ISSUE_10471,
  489. BASE_HW_ISSUE_10684,
  490. BASE_HW_ISSUE_10797,
  491. BASE_HW_ISSUE_10821,
  492. BASE_HW_ISSUE_10883,
  493. BASE_HW_ISSUE_10946,
  494. BASE_HW_ISSUE_11042,
  495. BASE_HW_ISSUE_11051,
  496. BASE_HW_ISSUE_11054,
  497. BASE_HW_ISSUE_T76X_1909,
  498. BASE_HW_ISSUE_T76X_1963,
  499. BASE_HW_ISSUE_T76X_3964,
  500. BASE_HW_ISSUE_END
  501. };
  502. static const enum base_hw_issue base_hw_issues_t72x_r1p1[] = {
  503. BASE_HW_ISSUE_6402,
  504. BASE_HW_ISSUE_9435,
  505. BASE_HW_ISSUE_10471,
  506. BASE_HW_ISSUE_10684,
  507. BASE_HW_ISSUE_10797,
  508. BASE_HW_ISSUE_10821,
  509. BASE_HW_ISSUE_10883,
  510. BASE_HW_ISSUE_10946,
  511. BASE_HW_ISSUE_11042,
  512. BASE_HW_ISSUE_11051,
  513. BASE_HW_ISSUE_11054,
  514. BASE_HW_ISSUE_T76X_1909,
  515. BASE_HW_ISSUE_T76X_1963,
  516. BASE_HW_ISSUE_T76X_3964,
  517. BASE_HW_ISSUE_END
  518. };
  519. static const enum base_hw_issue base_hw_issues_model_t72x[] = {
  520. BASE_HW_ISSUE_5736,
  521. BASE_HW_ISSUE_6402,
  522. BASE_HW_ISSUE_9435,
  523. BASE_HW_ISSUE_10471,
  524. BASE_HW_ISSUE_10797,
  525. BASE_HW_ISSUE_11042,
  526. BASE_HW_ISSUE_11051,
  527. BASE_HW_ISSUE_T76X_1909,
  528. BASE_HW_ISSUE_T76X_1963,
  529. BASE_HW_ISSUE_T76X_3964,
  530. GPUCORE_1619,
  531. BASE_HW_ISSUE_END
  532. };
  533. static const enum base_hw_issue base_hw_issues_model_t76x[] = {
  534. BASE_HW_ISSUE_5736,
  535. BASE_HW_ISSUE_9435,
  536. BASE_HW_ISSUE_11020,
  537. BASE_HW_ISSUE_11024,
  538. BASE_HW_ISSUE_11042,
  539. BASE_HW_ISSUE_11051,
  540. BASE_HW_ISSUE_T76X_1909,
  541. BASE_HW_ISSUE_T76X_1963,
  542. BASE_HW_ISSUE_T76X_3086,
  543. BASE_HW_ISSUE_T76X_3700,
  544. BASE_HW_ISSUE_T76X_3793,
  545. BASE_HW_ISSUE_T76X_3964,
  546. BASE_HW_ISSUE_T76X_3979,
  547. BASE_HW_ISSUE_TMIX_7891,
  548. GPUCORE_1619,
  549. BASE_HW_ISSUE_END
  550. };
  551. static const enum base_hw_issue base_hw_issues_model_t60x[] = {
  552. BASE_HW_ISSUE_5736,
  553. BASE_HW_ISSUE_6402,
  554. BASE_HW_ISSUE_8778,
  555. BASE_HW_ISSUE_9435,
  556. BASE_HW_ISSUE_10472,
  557. BASE_HW_ISSUE_10931,
  558. BASE_HW_ISSUE_11012,
  559. BASE_HW_ISSUE_11020,
  560. BASE_HW_ISSUE_11024,
  561. BASE_HW_ISSUE_11051,
  562. BASE_HW_ISSUE_T76X_1909,
  563. BASE_HW_ISSUE_T76X_1963,
  564. BASE_HW_ISSUE_T76X_3964,
  565. GPUCORE_1619,
  566. BASE_HW_ISSUE_END
  567. };
  568. static const enum base_hw_issue base_hw_issues_model_t62x[] = {
  569. BASE_HW_ISSUE_5736,
  570. BASE_HW_ISSUE_6402,
  571. BASE_HW_ISSUE_9435,
  572. BASE_HW_ISSUE_10472,
  573. BASE_HW_ISSUE_10931,
  574. BASE_HW_ISSUE_11012,
  575. BASE_HW_ISSUE_11020,
  576. BASE_HW_ISSUE_11024,
  577. BASE_HW_ISSUE_11042,
  578. BASE_HW_ISSUE_11051,
  579. BASE_HW_ISSUE_T76X_1909,
  580. BASE_HW_ISSUE_T76X_1963,
  581. BASE_HW_ISSUE_T76X_3964,
  582. GPUCORE_1619,
  583. BASE_HW_ISSUE_END
  584. };
  585. static const enum base_hw_issue base_hw_issues_tFRx_r0p1[] = {
  586. BASE_HW_ISSUE_9435,
  587. BASE_HW_ISSUE_10821,
  588. BASE_HW_ISSUE_10883,
  589. BASE_HW_ISSUE_10946,
  590. BASE_HW_ISSUE_11051,
  591. BASE_HW_ISSUE_11054,
  592. BASE_HW_ISSUE_T76X_1909,
  593. BASE_HW_ISSUE_T76X_1963,
  594. BASE_HW_ISSUE_T76X_3086,
  595. BASE_HW_ISSUE_T76X_3700,
  596. BASE_HW_ISSUE_T76X_3793,
  597. BASE_HW_ISSUE_T76X_3953,
  598. BASE_HW_ISSUE_T76X_3960,
  599. BASE_HW_ISSUE_T76X_3964,
  600. BASE_HW_ISSUE_T76X_3966,
  601. BASE_HW_ISSUE_T76X_3979,
  602. BASE_HW_ISSUE_TMIX_7891,
  603. BASE_HW_ISSUE_END
  604. };
  605. static const enum base_hw_issue base_hw_issues_tFRx_r0p2[] = {
  606. BASE_HW_ISSUE_9435,
  607. BASE_HW_ISSUE_10821,
  608. BASE_HW_ISSUE_10883,
  609. BASE_HW_ISSUE_10946,
  610. BASE_HW_ISSUE_11051,
  611. BASE_HW_ISSUE_11054,
  612. BASE_HW_ISSUE_T76X_1909,
  613. BASE_HW_ISSUE_T76X_1963,
  614. BASE_HW_ISSUE_T76X_3086,
  615. BASE_HW_ISSUE_T76X_3700,
  616. BASE_HW_ISSUE_T76X_3793,
  617. BASE_HW_ISSUE_T76X_3953,
  618. BASE_HW_ISSUE_T76X_3964,
  619. BASE_HW_ISSUE_T76X_3966,
  620. BASE_HW_ISSUE_T76X_3979,
  621. BASE_HW_ISSUE_TMIX_7891,
  622. BASE_HW_ISSUE_END
  623. };
  624. static const enum base_hw_issue base_hw_issues_tFRx_r1p0[] = {
  625. BASE_HW_ISSUE_9435,
  626. BASE_HW_ISSUE_10821,
  627. BASE_HW_ISSUE_10883,
  628. BASE_HW_ISSUE_10946,
  629. BASE_HW_ISSUE_11051,
  630. BASE_HW_ISSUE_11054,
  631. BASE_HW_ISSUE_T76X_1963,
  632. BASE_HW_ISSUE_T76X_3086,
  633. BASE_HW_ISSUE_T76X_3700,
  634. BASE_HW_ISSUE_T76X_3793,
  635. BASE_HW_ISSUE_T76X_3953,
  636. BASE_HW_ISSUE_T76X_3966,
  637. BASE_HW_ISSUE_T76X_3979,
  638. BASE_HW_ISSUE_TMIX_7891,
  639. BASE_HW_ISSUE_END
  640. };
  641. static const enum base_hw_issue base_hw_issues_tFRx_r2p0[] = {
  642. BASE_HW_ISSUE_9435,
  643. BASE_HW_ISSUE_10821,
  644. BASE_HW_ISSUE_10883,
  645. BASE_HW_ISSUE_10946,
  646. BASE_HW_ISSUE_11051,
  647. BASE_HW_ISSUE_11054,
  648. BASE_HW_ISSUE_T76X_1963,
  649. BASE_HW_ISSUE_T76X_3086,
  650. BASE_HW_ISSUE_T76X_3700,
  651. BASE_HW_ISSUE_T76X_3793,
  652. BASE_HW_ISSUE_T76X_3953,
  653. BASE_HW_ISSUE_T76X_3966,
  654. BASE_HW_ISSUE_T76X_3979,
  655. BASE_HW_ISSUE_TMIX_7891,
  656. BASE_HW_ISSUE_END
  657. };
  658. static const enum base_hw_issue base_hw_issues_model_tFRx[] = {
  659. BASE_HW_ISSUE_5736,
  660. BASE_HW_ISSUE_9435,
  661. BASE_HW_ISSUE_11051,
  662. BASE_HW_ISSUE_T76X_1963,
  663. BASE_HW_ISSUE_T76X_3086,
  664. BASE_HW_ISSUE_T76X_3700,
  665. BASE_HW_ISSUE_T76X_3793,
  666. BASE_HW_ISSUE_T76X_3964,
  667. BASE_HW_ISSUE_T76X_3979,
  668. BASE_HW_ISSUE_TMIX_7891,
  669. GPUCORE_1619,
  670. BASE_HW_ISSUE_END
  671. };
  672. static const enum base_hw_issue base_hw_issues_t86x_r0p2[] = {
  673. BASE_HW_ISSUE_9435,
  674. BASE_HW_ISSUE_10821,
  675. BASE_HW_ISSUE_10883,
  676. BASE_HW_ISSUE_10946,
  677. BASE_HW_ISSUE_11051,
  678. BASE_HW_ISSUE_11054,
  679. BASE_HW_ISSUE_T76X_1909,
  680. BASE_HW_ISSUE_T76X_1963,
  681. BASE_HW_ISSUE_T76X_3086,
  682. BASE_HW_ISSUE_T76X_3700,
  683. BASE_HW_ISSUE_T76X_3793,
  684. BASE_HW_ISSUE_T76X_3953,
  685. BASE_HW_ISSUE_T76X_3964,
  686. BASE_HW_ISSUE_T76X_3966,
  687. BASE_HW_ISSUE_T76X_3979,
  688. BASE_HW_ISSUE_TMIX_7891,
  689. BASE_HW_ISSUE_END
  690. };
  691. static const enum base_hw_issue base_hw_issues_t86x_r1p0[] = {
  692. BASE_HW_ISSUE_9435,
  693. BASE_HW_ISSUE_10821,
  694. BASE_HW_ISSUE_10883,
  695. BASE_HW_ISSUE_10946,
  696. BASE_HW_ISSUE_11051,
  697. BASE_HW_ISSUE_11054,
  698. BASE_HW_ISSUE_T76X_1963,
  699. BASE_HW_ISSUE_T76X_3086,
  700. BASE_HW_ISSUE_T76X_3700,
  701. BASE_HW_ISSUE_T76X_3793,
  702. BASE_HW_ISSUE_T76X_3953,
  703. BASE_HW_ISSUE_T76X_3966,
  704. BASE_HW_ISSUE_T76X_3979,
  705. BASE_HW_ISSUE_TMIX_7891,
  706. BASE_HW_ISSUE_END
  707. };
  708. static const enum base_hw_issue base_hw_issues_t86x_r2p0[] = {
  709. BASE_HW_ISSUE_9435,
  710. BASE_HW_ISSUE_10821,
  711. BASE_HW_ISSUE_10883,
  712. BASE_HW_ISSUE_10946,
  713. BASE_HW_ISSUE_11051,
  714. BASE_HW_ISSUE_11054,
  715. BASE_HW_ISSUE_T76X_1963,
  716. BASE_HW_ISSUE_T76X_3086,
  717. BASE_HW_ISSUE_T76X_3700,
  718. BASE_HW_ISSUE_T76X_3793,
  719. BASE_HW_ISSUE_T76X_3953,
  720. BASE_HW_ISSUE_T76X_3966,
  721. BASE_HW_ISSUE_T76X_3979,
  722. BASE_HW_ISSUE_TMIX_7891,
  723. BASE_HW_ISSUE_END
  724. };
  725. static const enum base_hw_issue base_hw_issues_model_t86x[] = {
  726. BASE_HW_ISSUE_5736,
  727. BASE_HW_ISSUE_9435,
  728. BASE_HW_ISSUE_11051,
  729. BASE_HW_ISSUE_T76X_1963,
  730. BASE_HW_ISSUE_T76X_3086,
  731. BASE_HW_ISSUE_T76X_3700,
  732. BASE_HW_ISSUE_T76X_3793,
  733. BASE_HW_ISSUE_T76X_3979,
  734. BASE_HW_ISSUE_TMIX_7891,
  735. GPUCORE_1619,
  736. BASE_HW_ISSUE_END
  737. };
  738. static const enum base_hw_issue base_hw_issues_t83x_r0p1[] = {
  739. BASE_HW_ISSUE_9435,
  740. BASE_HW_ISSUE_10821,
  741. BASE_HW_ISSUE_10883,
  742. BASE_HW_ISSUE_10946,
  743. BASE_HW_ISSUE_11051,
  744. BASE_HW_ISSUE_11054,
  745. BASE_HW_ISSUE_T76X_1909,
  746. BASE_HW_ISSUE_T76X_1963,
  747. BASE_HW_ISSUE_T76X_3086,
  748. BASE_HW_ISSUE_T76X_3700,
  749. BASE_HW_ISSUE_T76X_3793,
  750. BASE_HW_ISSUE_T76X_3953,
  751. BASE_HW_ISSUE_T76X_3960,
  752. BASE_HW_ISSUE_T76X_3979,
  753. BASE_HW_ISSUE_TMIX_7891,
  754. BASE_HW_ISSUE_END
  755. };
  756. static const enum base_hw_issue base_hw_issues_t83x_r1p0[] = {
  757. BASE_HW_ISSUE_9435,
  758. BASE_HW_ISSUE_10821,
  759. BASE_HW_ISSUE_10883,
  760. BASE_HW_ISSUE_10946,
  761. BASE_HW_ISSUE_11051,
  762. BASE_HW_ISSUE_11054,
  763. BASE_HW_ISSUE_T76X_1963,
  764. BASE_HW_ISSUE_T76X_3086,
  765. BASE_HW_ISSUE_T76X_3700,
  766. BASE_HW_ISSUE_T76X_3793,
  767. BASE_HW_ISSUE_T76X_3953,
  768. BASE_HW_ISSUE_T76X_3960,
  769. BASE_HW_ISSUE_T76X_3979,
  770. BASE_HW_ISSUE_TMIX_7891,
  771. BASE_HW_ISSUE_END
  772. };
  773. static const enum base_hw_issue base_hw_issues_model_t83x[] = {
  774. BASE_HW_ISSUE_5736,
  775. BASE_HW_ISSUE_9435,
  776. BASE_HW_ISSUE_11051,
  777. BASE_HW_ISSUE_T76X_1909,
  778. BASE_HW_ISSUE_T76X_1963,
  779. BASE_HW_ISSUE_T76X_3086,
  780. BASE_HW_ISSUE_T76X_3700,
  781. BASE_HW_ISSUE_T76X_3793,
  782. BASE_HW_ISSUE_T76X_3964,
  783. BASE_HW_ISSUE_T76X_3979,
  784. BASE_HW_ISSUE_TMIX_7891,
  785. GPUCORE_1619,
  786. BASE_HW_ISSUE_END
  787. };
  788. static const enum base_hw_issue base_hw_issues_t82x_r0p0[] = {
  789. BASE_HW_ISSUE_9435,
  790. BASE_HW_ISSUE_10821,
  791. BASE_HW_ISSUE_10883,
  792. BASE_HW_ISSUE_10946,
  793. BASE_HW_ISSUE_11051,
  794. BASE_HW_ISSUE_11054,
  795. BASE_HW_ISSUE_T76X_1909,
  796. BASE_HW_ISSUE_T76X_1963,
  797. BASE_HW_ISSUE_T76X_3086,
  798. BASE_HW_ISSUE_T76X_3700,
  799. BASE_HW_ISSUE_T76X_3793,
  800. BASE_HW_ISSUE_T76X_3953,
  801. BASE_HW_ISSUE_T76X_3960,
  802. BASE_HW_ISSUE_T76X_3964,
  803. BASE_HW_ISSUE_T76X_3979,
  804. BASE_HW_ISSUE_TMIX_7891,
  805. BASE_HW_ISSUE_END
  806. };
  807. static const enum base_hw_issue base_hw_issues_t82x_r0p1[] = {
  808. BASE_HW_ISSUE_9435,
  809. BASE_HW_ISSUE_10821,
  810. BASE_HW_ISSUE_10883,
  811. BASE_HW_ISSUE_10946,
  812. BASE_HW_ISSUE_11051,
  813. BASE_HW_ISSUE_11054,
  814. BASE_HW_ISSUE_T76X_1909,
  815. BASE_HW_ISSUE_T76X_1963,
  816. BASE_HW_ISSUE_T76X_3086,
  817. BASE_HW_ISSUE_T76X_3700,
  818. BASE_HW_ISSUE_T76X_3793,
  819. BASE_HW_ISSUE_T76X_3953,
  820. BASE_HW_ISSUE_T76X_3960,
  821. BASE_HW_ISSUE_T76X_3979,
  822. BASE_HW_ISSUE_TMIX_7891,
  823. BASE_HW_ISSUE_END
  824. };
  825. static const enum base_hw_issue base_hw_issues_t82x_r1p0[] = {
  826. BASE_HW_ISSUE_9435,
  827. BASE_HW_ISSUE_10821,
  828. BASE_HW_ISSUE_10883,
  829. BASE_HW_ISSUE_10946,
  830. BASE_HW_ISSUE_11051,
  831. BASE_HW_ISSUE_11054,
  832. BASE_HW_ISSUE_T76X_1963,
  833. BASE_HW_ISSUE_T76X_3086,
  834. BASE_HW_ISSUE_T76X_3700,
  835. BASE_HW_ISSUE_T76X_3793,
  836. BASE_HW_ISSUE_T76X_3953,
  837. BASE_HW_ISSUE_T76X_3960,
  838. BASE_HW_ISSUE_T76X_3979,
  839. BASE_HW_ISSUE_TMIX_7891,
  840. BASE_HW_ISSUE_END
  841. };
  842. static const enum base_hw_issue base_hw_issues_model_t82x[] = {
  843. BASE_HW_ISSUE_5736,
  844. BASE_HW_ISSUE_9435,
  845. BASE_HW_ISSUE_11051,
  846. BASE_HW_ISSUE_T76X_1909,
  847. BASE_HW_ISSUE_T76X_1963,
  848. BASE_HW_ISSUE_T76X_3086,
  849. BASE_HW_ISSUE_T76X_3700,
  850. BASE_HW_ISSUE_T76X_3793,
  851. BASE_HW_ISSUE_T76X_3979,
  852. BASE_HW_ISSUE_TMIX_7891,
  853. GPUCORE_1619,
  854. BASE_HW_ISSUE_END
  855. };
  856. static const enum base_hw_issue base_hw_issues_tMIx_r0p0_05dev0[] = {
  857. BASE_HW_ISSUE_9435,
  858. BASE_HW_ISSUE_10682,
  859. BASE_HW_ISSUE_10821,
  860. BASE_HW_ISSUE_11054,
  861. BASE_HW_ISSUE_T76X_3700,
  862. BASE_HW_ISSUE_T76X_3953,
  863. BASE_HW_ISSUE_TMIX_7891,
  864. BASE_HW_ISSUE_TMIX_8042,
  865. BASE_HW_ISSUE_TMIX_8133,
  866. BASE_HW_ISSUE_TMIX_8138,
  867. BASE_HW_ISSUE_END
  868. };
  869. static const enum base_hw_issue base_hw_issues_tMIx_r0p0[] = {
  870. BASE_HW_ISSUE_9435,
  871. BASE_HW_ISSUE_10682,
  872. BASE_HW_ISSUE_10821,
  873. BASE_HW_ISSUE_11054,
  874. BASE_HW_ISSUE_T76X_3700,
  875. BASE_HW_ISSUE_TMIX_7891,
  876. BASE_HW_ISSUE_TMIX_7940,
  877. BASE_HW_ISSUE_TMIX_8042,
  878. BASE_HW_ISSUE_TMIX_8133,
  879. BASE_HW_ISSUE_TMIX_8138,
  880. BASE_HW_ISSUE_TMIX_8206,
  881. BASE_HW_ISSUE_END
  882. };
  883. static const enum base_hw_issue base_hw_issues_model_tMIx[] = {
  884. BASE_HW_ISSUE_5736,
  885. BASE_HW_ISSUE_9435,
  886. BASE_HW_ISSUE_T76X_3700,
  887. BASE_HW_ISSUE_TMIX_7891,
  888. BASE_HW_ISSUE_TMIX_7940,
  889. BASE_HW_ISSUE_TMIX_8042,
  890. BASE_HW_ISSUE_TMIX_8133,
  891. BASE_HW_ISSUE_TMIX_8138,
  892. BASE_HW_ISSUE_TMIX_8206,
  893. GPUCORE_1619,
  894. BASE_HW_ISSUE_END
  895. };
  896. #endif /* _BASE_HWCONFIG_ISSUES_H_ */