shwdt.c 8.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * drivers/watchdog/shwdt.c
  4. *
  5. * Watchdog driver for integrated watchdog in the SuperH processors.
  6. *
  7. * Copyright (C) 2001 - 2012 Paul Mundt <lethal@linux-sh.org>
  8. *
  9. * 14-Dec-2001 Matt Domsch <Matt_Domsch@dell.com>
  10. * Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
  11. *
  12. * 19-Apr-2002 Rob Radez <rob@osinvestor.com>
  13. * Added expect close support, made emulated timeout runtime changeable
  14. * general cleanups, add some ioctls
  15. */
  16. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/init.h>
  21. #include <linux/types.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/watchdog.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/fs.h>
  26. #include <linux/mm.h>
  27. #include <linux/slab.h>
  28. #include <linux/io.h>
  29. #include <linux/clk.h>
  30. #include <linux/err.h>
  31. #include <asm/watchdog.h>
  32. #define DRV_NAME "sh-wdt"
  33. /*
  34. * Default clock division ratio is 5.25 msecs. For an additional table of
  35. * values, consult the asm-sh/watchdog.h. Overload this at module load
  36. * time.
  37. *
  38. * In order for this to work reliably we need to have HZ set to 1000 or
  39. * something quite higher than 100 (or we need a proper high-res timer
  40. * implementation that will deal with this properly), otherwise the 10ms
  41. * resolution of a jiffy is enough to trigger the overflow. For things like
  42. * the SH-4 and SH-5, this isn't necessarily that big of a problem, though
  43. * for the SH-2 and SH-3, this isn't recommended unless the WDT is absolutely
  44. * necssary.
  45. *
  46. * As a result of this timing problem, the only modes that are particularly
  47. * feasible are the 4096 and the 2048 divisors, which yield 5.25 and 2.62ms
  48. * overflow periods respectively.
  49. *
  50. * Also, since we can't really expect userspace to be responsive enough
  51. * before the overflow happens, we maintain two separate timers .. One in
  52. * the kernel for clearing out WOVF every 2ms or so (again, this depends on
  53. * HZ == 1000), and another for monitoring userspace writes to the WDT device.
  54. *
  55. * As such, we currently use a configurable heartbeat interval which defaults
  56. * to 30s. In this case, the userspace daemon is only responsible for periodic
  57. * writes to the device before the next heartbeat is scheduled. If the daemon
  58. * misses its deadline, the kernel timer will allow the WDT to overflow.
  59. */
  60. static int clock_division_ratio = WTCSR_CKS_4096;
  61. #define next_ping_period(cks) (jiffies + msecs_to_jiffies(cks - 4))
  62. #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */
  63. static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
  64. static bool nowayout = WATCHDOG_NOWAYOUT;
  65. static unsigned long next_heartbeat;
  66. struct sh_wdt {
  67. void __iomem *base;
  68. struct device *dev;
  69. struct clk *clk;
  70. spinlock_t lock;
  71. struct timer_list timer;
  72. };
  73. static int sh_wdt_start(struct watchdog_device *wdt_dev)
  74. {
  75. struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
  76. unsigned long flags;
  77. u8 csr;
  78. pm_runtime_get_sync(wdt->dev);
  79. clk_enable(wdt->clk);
  80. spin_lock_irqsave(&wdt->lock, flags);
  81. next_heartbeat = jiffies + (heartbeat * HZ);
  82. mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
  83. csr = sh_wdt_read_csr();
  84. csr |= WTCSR_WT | clock_division_ratio;
  85. sh_wdt_write_csr(csr);
  86. sh_wdt_write_cnt(0);
  87. /*
  88. * These processors have a bit of an inconsistent initialization
  89. * process.. starting with SH-3, RSTS was moved to WTCSR, and the
  90. * RSTCSR register was removed.
  91. *
  92. * On the SH-2 however, in addition with bits being in different
  93. * locations, we must deal with RSTCSR outright..
  94. */
  95. csr = sh_wdt_read_csr();
  96. csr |= WTCSR_TME;
  97. csr &= ~WTCSR_RSTS;
  98. sh_wdt_write_csr(csr);
  99. #ifdef CONFIG_CPU_SH2
  100. csr = sh_wdt_read_rstcsr();
  101. csr &= ~RSTCSR_RSTS;
  102. sh_wdt_write_rstcsr(csr);
  103. #endif
  104. spin_unlock_irqrestore(&wdt->lock, flags);
  105. return 0;
  106. }
  107. static int sh_wdt_stop(struct watchdog_device *wdt_dev)
  108. {
  109. struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
  110. unsigned long flags;
  111. u8 csr;
  112. spin_lock_irqsave(&wdt->lock, flags);
  113. del_timer(&wdt->timer);
  114. csr = sh_wdt_read_csr();
  115. csr &= ~WTCSR_TME;
  116. sh_wdt_write_csr(csr);
  117. spin_unlock_irqrestore(&wdt->lock, flags);
  118. clk_disable(wdt->clk);
  119. pm_runtime_put_sync(wdt->dev);
  120. return 0;
  121. }
  122. static int sh_wdt_keepalive(struct watchdog_device *wdt_dev)
  123. {
  124. struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
  125. unsigned long flags;
  126. spin_lock_irqsave(&wdt->lock, flags);
  127. next_heartbeat = jiffies + (heartbeat * HZ);
  128. spin_unlock_irqrestore(&wdt->lock, flags);
  129. return 0;
  130. }
  131. static int sh_wdt_set_heartbeat(struct watchdog_device *wdt_dev, unsigned t)
  132. {
  133. struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
  134. unsigned long flags;
  135. if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */
  136. return -EINVAL;
  137. spin_lock_irqsave(&wdt->lock, flags);
  138. heartbeat = t;
  139. wdt_dev->timeout = t;
  140. spin_unlock_irqrestore(&wdt->lock, flags);
  141. return 0;
  142. }
  143. static void sh_wdt_ping(struct timer_list *t)
  144. {
  145. struct sh_wdt *wdt = from_timer(wdt, t, timer);
  146. unsigned long flags;
  147. spin_lock_irqsave(&wdt->lock, flags);
  148. if (time_before(jiffies, next_heartbeat)) {
  149. u8 csr;
  150. csr = sh_wdt_read_csr();
  151. csr &= ~WTCSR_IOVF;
  152. sh_wdt_write_csr(csr);
  153. sh_wdt_write_cnt(0);
  154. mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
  155. } else
  156. dev_warn(wdt->dev, "Heartbeat lost! Will not ping "
  157. "the watchdog\n");
  158. spin_unlock_irqrestore(&wdt->lock, flags);
  159. }
  160. static const struct watchdog_info sh_wdt_info = {
  161. .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
  162. WDIOF_MAGICCLOSE,
  163. .firmware_version = 1,
  164. .identity = "SH WDT",
  165. };
  166. static const struct watchdog_ops sh_wdt_ops = {
  167. .owner = THIS_MODULE,
  168. .start = sh_wdt_start,
  169. .stop = sh_wdt_stop,
  170. .ping = sh_wdt_keepalive,
  171. .set_timeout = sh_wdt_set_heartbeat,
  172. };
  173. static struct watchdog_device sh_wdt_dev = {
  174. .info = &sh_wdt_info,
  175. .ops = &sh_wdt_ops,
  176. };
  177. static int sh_wdt_probe(struct platform_device *pdev)
  178. {
  179. struct sh_wdt *wdt;
  180. int rc;
  181. /*
  182. * As this driver only covers the global watchdog case, reject
  183. * any attempts to register per-CPU watchdogs.
  184. */
  185. if (pdev->id != -1)
  186. return -EINVAL;
  187. wdt = devm_kzalloc(&pdev->dev, sizeof(struct sh_wdt), GFP_KERNEL);
  188. if (unlikely(!wdt))
  189. return -ENOMEM;
  190. wdt->dev = &pdev->dev;
  191. wdt->clk = devm_clk_get(&pdev->dev, NULL);
  192. if (IS_ERR(wdt->clk)) {
  193. /*
  194. * Clock framework support is optional, continue on
  195. * anyways if we don't find a matching clock.
  196. */
  197. wdt->clk = NULL;
  198. }
  199. wdt->base = devm_platform_ioremap_resource(pdev, 0);
  200. if (IS_ERR(wdt->base))
  201. return PTR_ERR(wdt->base);
  202. watchdog_set_nowayout(&sh_wdt_dev, nowayout);
  203. watchdog_set_drvdata(&sh_wdt_dev, wdt);
  204. sh_wdt_dev.parent = &pdev->dev;
  205. spin_lock_init(&wdt->lock);
  206. rc = sh_wdt_set_heartbeat(&sh_wdt_dev, heartbeat);
  207. if (unlikely(rc)) {
  208. /* Default timeout if invalid */
  209. sh_wdt_set_heartbeat(&sh_wdt_dev, WATCHDOG_HEARTBEAT);
  210. dev_warn(&pdev->dev,
  211. "heartbeat value must be 1<=x<=3600, using %d\n",
  212. sh_wdt_dev.timeout);
  213. }
  214. dev_info(&pdev->dev, "configured with heartbeat=%d sec (nowayout=%d)\n",
  215. sh_wdt_dev.timeout, nowayout);
  216. rc = watchdog_register_device(&sh_wdt_dev);
  217. if (unlikely(rc)) {
  218. dev_err(&pdev->dev, "Can't register watchdog (err=%d)\n", rc);
  219. return rc;
  220. }
  221. timer_setup(&wdt->timer, sh_wdt_ping, 0);
  222. wdt->timer.expires = next_ping_period(clock_division_ratio);
  223. dev_info(&pdev->dev, "initialized.\n");
  224. pm_runtime_enable(&pdev->dev);
  225. return 0;
  226. }
  227. static int sh_wdt_remove(struct platform_device *pdev)
  228. {
  229. watchdog_unregister_device(&sh_wdt_dev);
  230. pm_runtime_disable(&pdev->dev);
  231. return 0;
  232. }
  233. static void sh_wdt_shutdown(struct platform_device *pdev)
  234. {
  235. sh_wdt_stop(&sh_wdt_dev);
  236. }
  237. static struct platform_driver sh_wdt_driver = {
  238. .driver = {
  239. .name = DRV_NAME,
  240. },
  241. .probe = sh_wdt_probe,
  242. .remove = sh_wdt_remove,
  243. .shutdown = sh_wdt_shutdown,
  244. };
  245. static int __init sh_wdt_init(void)
  246. {
  247. if (unlikely(clock_division_ratio < 0x5 ||
  248. clock_division_ratio > 0x7)) {
  249. clock_division_ratio = WTCSR_CKS_4096;
  250. pr_info("divisor must be 0x5<=x<=0x7, using %d\n",
  251. clock_division_ratio);
  252. }
  253. return platform_driver_register(&sh_wdt_driver);
  254. }
  255. static void __exit sh_wdt_exit(void)
  256. {
  257. platform_driver_unregister(&sh_wdt_driver);
  258. }
  259. module_init(sh_wdt_init);
  260. module_exit(sh_wdt_exit);
  261. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
  262. MODULE_DESCRIPTION("SuperH watchdog driver");
  263. MODULE_LICENSE("GPL");
  264. MODULE_ALIAS("platform:" DRV_NAME);
  265. module_param(clock_division_ratio, int, 0);
  266. MODULE_PARM_DESC(clock_division_ratio,
  267. "Clock division ratio. Valid ranges are from 0x5 (1.31ms) "
  268. "to 0x7 (5.25ms). (default=" __MODULE_STRING(WTCSR_CKS_4096) ")");
  269. module_param(heartbeat, int, 0);
  270. MODULE_PARM_DESC(heartbeat,
  271. "Watchdog heartbeat in seconds. (1 <= heartbeat <= 3600, default="
  272. __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
  273. module_param(nowayout, bool, 0);
  274. MODULE_PARM_DESC(nowayout,
  275. "Watchdog cannot be stopped once started (default="
  276. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");