jz4740_wdt.c 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2010, Paul Cercueil <paul@crapouillou.net>
  4. * JZ4740 Watchdog driver
  5. */
  6. #include <linux/mfd/ingenic-tcu.h>
  7. #include <linux/module.h>
  8. #include <linux/moduleparam.h>
  9. #include <linux/types.h>
  10. #include <linux/kernel.h>
  11. #include <linux/watchdog.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/io.h>
  14. #include <linux/device.h>
  15. #include <linux/clk.h>
  16. #include <linux/slab.h>
  17. #include <linux/err.h>
  18. #include <linux/of.h>
  19. #include <asm/mach-jz4740/timer.h>
  20. #define JZ_WDT_CLOCK_PCLK 0x1
  21. #define JZ_WDT_CLOCK_RTC 0x2
  22. #define JZ_WDT_CLOCK_EXT 0x4
  23. #define JZ_WDT_CLOCK_DIV_1 (0 << TCU_TCSR_PRESCALE_LSB)
  24. #define JZ_WDT_CLOCK_DIV_4 (1 << TCU_TCSR_PRESCALE_LSB)
  25. #define JZ_WDT_CLOCK_DIV_16 (2 << TCU_TCSR_PRESCALE_LSB)
  26. #define JZ_WDT_CLOCK_DIV_64 (3 << TCU_TCSR_PRESCALE_LSB)
  27. #define JZ_WDT_CLOCK_DIV_256 (4 << TCU_TCSR_PRESCALE_LSB)
  28. #define JZ_WDT_CLOCK_DIV_1024 (5 << TCU_TCSR_PRESCALE_LSB)
  29. #define DEFAULT_HEARTBEAT 5
  30. #define MAX_HEARTBEAT 2048
  31. static bool nowayout = WATCHDOG_NOWAYOUT;
  32. module_param(nowayout, bool, 0);
  33. MODULE_PARM_DESC(nowayout,
  34. "Watchdog cannot be stopped once started (default="
  35. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  36. static unsigned int heartbeat = DEFAULT_HEARTBEAT;
  37. module_param(heartbeat, uint, 0);
  38. MODULE_PARM_DESC(heartbeat,
  39. "Watchdog heartbeat period in seconds from 1 to "
  40. __MODULE_STRING(MAX_HEARTBEAT) ", default "
  41. __MODULE_STRING(DEFAULT_HEARTBEAT));
  42. struct jz4740_wdt_drvdata {
  43. struct watchdog_device wdt;
  44. void __iomem *base;
  45. struct clk *rtc_clk;
  46. };
  47. static int jz4740_wdt_ping(struct watchdog_device *wdt_dev)
  48. {
  49. struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
  50. writew(0x0, drvdata->base + TCU_REG_WDT_TCNT);
  51. return 0;
  52. }
  53. static int jz4740_wdt_set_timeout(struct watchdog_device *wdt_dev,
  54. unsigned int new_timeout)
  55. {
  56. struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
  57. unsigned int rtc_clk_rate;
  58. unsigned int timeout_value;
  59. unsigned short clock_div = JZ_WDT_CLOCK_DIV_1;
  60. u8 tcer;
  61. rtc_clk_rate = clk_get_rate(drvdata->rtc_clk);
  62. timeout_value = rtc_clk_rate * new_timeout;
  63. while (timeout_value > 0xffff) {
  64. if (clock_div == JZ_WDT_CLOCK_DIV_1024) {
  65. /* Requested timeout too high;
  66. * use highest possible value. */
  67. timeout_value = 0xffff;
  68. break;
  69. }
  70. timeout_value >>= 2;
  71. clock_div += (1 << TCU_TCSR_PRESCALE_LSB);
  72. }
  73. tcer = readb(drvdata->base + TCU_REG_WDT_TCER);
  74. writeb(0x0, drvdata->base + TCU_REG_WDT_TCER);
  75. writew(clock_div, drvdata->base + TCU_REG_WDT_TCSR);
  76. writew((u16)timeout_value, drvdata->base + TCU_REG_WDT_TDR);
  77. writew(0x0, drvdata->base + TCU_REG_WDT_TCNT);
  78. writew(clock_div | JZ_WDT_CLOCK_RTC, drvdata->base + TCU_REG_WDT_TCSR);
  79. if (tcer & TCU_WDT_TCER_TCEN)
  80. writeb(TCU_WDT_TCER_TCEN, drvdata->base + TCU_REG_WDT_TCER);
  81. wdt_dev->timeout = new_timeout;
  82. return 0;
  83. }
  84. static int jz4740_wdt_start(struct watchdog_device *wdt_dev)
  85. {
  86. struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
  87. u8 tcer;
  88. tcer = readb(drvdata->base + TCU_REG_WDT_TCER);
  89. jz4740_timer_enable_watchdog();
  90. jz4740_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
  91. /* Start watchdog if it wasn't started already */
  92. if (!(tcer & TCU_WDT_TCER_TCEN))
  93. writeb(TCU_WDT_TCER_TCEN, drvdata->base + TCU_REG_WDT_TCER);
  94. return 0;
  95. }
  96. static int jz4740_wdt_stop(struct watchdog_device *wdt_dev)
  97. {
  98. struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
  99. writeb(0x0, drvdata->base + TCU_REG_WDT_TCER);
  100. jz4740_timer_disable_watchdog();
  101. return 0;
  102. }
  103. static int jz4740_wdt_restart(struct watchdog_device *wdt_dev,
  104. unsigned long action, void *data)
  105. {
  106. wdt_dev->timeout = 0;
  107. jz4740_wdt_start(wdt_dev);
  108. return 0;
  109. }
  110. static const struct watchdog_info jz4740_wdt_info = {
  111. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
  112. .identity = "jz4740 Watchdog",
  113. };
  114. static const struct watchdog_ops jz4740_wdt_ops = {
  115. .owner = THIS_MODULE,
  116. .start = jz4740_wdt_start,
  117. .stop = jz4740_wdt_stop,
  118. .ping = jz4740_wdt_ping,
  119. .set_timeout = jz4740_wdt_set_timeout,
  120. .restart = jz4740_wdt_restart,
  121. };
  122. #ifdef CONFIG_OF
  123. static const struct of_device_id jz4740_wdt_of_matches[] = {
  124. { .compatible = "ingenic,jz4740-watchdog", },
  125. { .compatible = "ingenic,jz4780-watchdog", },
  126. { /* sentinel */ }
  127. };
  128. MODULE_DEVICE_TABLE(of, jz4740_wdt_of_matches);
  129. #endif
  130. static int jz4740_wdt_probe(struct platform_device *pdev)
  131. {
  132. struct device *dev = &pdev->dev;
  133. struct jz4740_wdt_drvdata *drvdata;
  134. struct watchdog_device *jz4740_wdt;
  135. drvdata = devm_kzalloc(dev, sizeof(struct jz4740_wdt_drvdata),
  136. GFP_KERNEL);
  137. if (!drvdata)
  138. return -ENOMEM;
  139. if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
  140. heartbeat = DEFAULT_HEARTBEAT;
  141. jz4740_wdt = &drvdata->wdt;
  142. jz4740_wdt->info = &jz4740_wdt_info;
  143. jz4740_wdt->ops = &jz4740_wdt_ops;
  144. jz4740_wdt->timeout = heartbeat;
  145. jz4740_wdt->min_timeout = 1;
  146. jz4740_wdt->max_timeout = MAX_HEARTBEAT;
  147. jz4740_wdt->parent = dev;
  148. watchdog_set_nowayout(jz4740_wdt, nowayout);
  149. watchdog_set_drvdata(jz4740_wdt, drvdata);
  150. drvdata->base = devm_platform_ioremap_resource(pdev, 0);
  151. if (IS_ERR(drvdata->base))
  152. return PTR_ERR(drvdata->base);
  153. drvdata->rtc_clk = devm_clk_get(dev, "rtc");
  154. if (IS_ERR(drvdata->rtc_clk)) {
  155. dev_err(dev, "cannot find RTC clock\n");
  156. return PTR_ERR(drvdata->rtc_clk);
  157. }
  158. return devm_watchdog_register_device(dev, &drvdata->wdt);
  159. }
  160. static struct platform_driver jz4740_wdt_driver = {
  161. .probe = jz4740_wdt_probe,
  162. .driver = {
  163. .name = "jz4740-wdt",
  164. .of_match_table = of_match_ptr(jz4740_wdt_of_matches),
  165. },
  166. };
  167. module_platform_driver(jz4740_wdt_driver);
  168. MODULE_AUTHOR("Paul Cercueil <paul@crapouillou.net>");
  169. MODULE_DESCRIPTION("jz4740 Watchdog Driver");
  170. MODULE_LICENSE("GPL");
  171. MODULE_ALIAS("platform:jz4740-wdt");