musb_debugfs.c 8.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * MUSB OTG driver debugfs support
  4. *
  5. * Copyright 2010 Nokia Corporation
  6. * Contact: Felipe Balbi <felipe.balbi@nokia.com>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/kernel.h>
  10. #include <linux/init.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/seq_file.h>
  13. #include <linux/uaccess.h>
  14. #include "musb_core.h"
  15. #include "musb_debug.h"
  16. struct musb_register_map {
  17. char *name;
  18. unsigned offset;
  19. unsigned size;
  20. };
  21. static const struct musb_register_map musb_regmap[] = {
  22. { "FAddr", MUSB_FADDR, 8 },
  23. { "Power", MUSB_POWER, 8 },
  24. { "Frame", MUSB_FRAME, 16 },
  25. { "Index", MUSB_INDEX, 8 },
  26. { "Testmode", MUSB_TESTMODE, 8 },
  27. { "TxMaxPp", MUSB_TXMAXP, 16 },
  28. { "TxCSRp", MUSB_TXCSR, 16 },
  29. { "RxMaxPp", MUSB_RXMAXP, 16 },
  30. { "RxCSR", MUSB_RXCSR, 16 },
  31. { "RxCount", MUSB_RXCOUNT, 16 },
  32. { "IntrRxE", MUSB_INTRRXE, 16 },
  33. { "IntrTxE", MUSB_INTRTXE, 16 },
  34. { "IntrUsbE", MUSB_INTRUSBE, 8 },
  35. { "DevCtl", MUSB_DEVCTL, 8 },
  36. { "VControl", 0x68, 32 },
  37. { "HWVers", 0x69, 16 },
  38. { "LinkInfo", MUSB_LINKINFO, 8 },
  39. { "VPLen", MUSB_VPLEN, 8 },
  40. { "HS_EOF1", MUSB_HS_EOF1, 8 },
  41. { "FS_EOF1", MUSB_FS_EOF1, 8 },
  42. { "LS_EOF1", MUSB_LS_EOF1, 8 },
  43. { "SOFT_RST", 0x7F, 8 },
  44. { "DMA_CNTLch0", 0x204, 16 },
  45. { "DMA_ADDRch0", 0x208, 32 },
  46. { "DMA_COUNTch0", 0x20C, 32 },
  47. { "DMA_CNTLch1", 0x214, 16 },
  48. { "DMA_ADDRch1", 0x218, 32 },
  49. { "DMA_COUNTch1", 0x21C, 32 },
  50. { "DMA_CNTLch2", 0x224, 16 },
  51. { "DMA_ADDRch2", 0x228, 32 },
  52. { "DMA_COUNTch2", 0x22C, 32 },
  53. { "DMA_CNTLch3", 0x234, 16 },
  54. { "DMA_ADDRch3", 0x238, 32 },
  55. { "DMA_COUNTch3", 0x23C, 32 },
  56. { "DMA_CNTLch4", 0x244, 16 },
  57. { "DMA_ADDRch4", 0x248, 32 },
  58. { "DMA_COUNTch4", 0x24C, 32 },
  59. { "DMA_CNTLch5", 0x254, 16 },
  60. { "DMA_ADDRch5", 0x258, 32 },
  61. { "DMA_COUNTch5", 0x25C, 32 },
  62. { "DMA_CNTLch6", 0x264, 16 },
  63. { "DMA_ADDRch6", 0x268, 32 },
  64. { "DMA_COUNTch6", 0x26C, 32 },
  65. { "DMA_CNTLch7", 0x274, 16 },
  66. { "DMA_ADDRch7", 0x278, 32 },
  67. { "DMA_COUNTch7", 0x27C, 32 },
  68. { "ConfigData", MUSB_CONFIGDATA,8 },
  69. { "BabbleCtl", MUSB_BABBLE_CTL,8 },
  70. { "TxFIFOsz", MUSB_TXFIFOSZ, 8 },
  71. { "RxFIFOsz", MUSB_RXFIFOSZ, 8 },
  72. { "TxFIFOadd", MUSB_TXFIFOADD, 16 },
  73. { "RxFIFOadd", MUSB_RXFIFOADD, 16 },
  74. { "EPInfo", MUSB_EPINFO, 8 },
  75. { "RAMInfo", MUSB_RAMINFO, 8 },
  76. { } /* Terminating Entry */
  77. };
  78. static int musb_regdump_show(struct seq_file *s, void *unused)
  79. {
  80. struct musb *musb = s->private;
  81. unsigned i;
  82. seq_printf(s, "MUSB (M)HDRC Register Dump\n");
  83. pm_runtime_get_sync(musb->controller);
  84. for (i = 0; i < ARRAY_SIZE(musb_regmap); i++) {
  85. switch (musb_regmap[i].size) {
  86. case 8:
  87. seq_printf(s, "%-12s: %02x\n", musb_regmap[i].name,
  88. musb_readb(musb->mregs, musb_regmap[i].offset));
  89. break;
  90. case 16:
  91. seq_printf(s, "%-12s: %04x\n", musb_regmap[i].name,
  92. musb_readw(musb->mregs, musb_regmap[i].offset));
  93. break;
  94. case 32:
  95. seq_printf(s, "%-12s: %08x\n", musb_regmap[i].name,
  96. musb_readl(musb->mregs, musb_regmap[i].offset));
  97. break;
  98. }
  99. }
  100. pm_runtime_mark_last_busy(musb->controller);
  101. pm_runtime_put_autosuspend(musb->controller);
  102. return 0;
  103. }
  104. DEFINE_SHOW_ATTRIBUTE(musb_regdump);
  105. static int musb_test_mode_show(struct seq_file *s, void *unused)
  106. {
  107. struct musb *musb = s->private;
  108. unsigned test;
  109. pm_runtime_get_sync(musb->controller);
  110. test = musb_readb(musb->mregs, MUSB_TESTMODE);
  111. pm_runtime_mark_last_busy(musb->controller);
  112. pm_runtime_put_autosuspend(musb->controller);
  113. if (test == (MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_FS))
  114. seq_printf(s, "force host full-speed\n");
  115. else if (test == (MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_HS))
  116. seq_printf(s, "force host high-speed\n");
  117. else if (test == MUSB_TEST_FORCE_HOST)
  118. seq_printf(s, "force host\n");
  119. else if (test == MUSB_TEST_FIFO_ACCESS)
  120. seq_printf(s, "fifo access\n");
  121. else if (test == MUSB_TEST_FORCE_FS)
  122. seq_printf(s, "force full-speed\n");
  123. else if (test == MUSB_TEST_FORCE_HS)
  124. seq_printf(s, "force high-speed\n");
  125. else if (test == MUSB_TEST_PACKET)
  126. seq_printf(s, "test packet\n");
  127. else if (test == MUSB_TEST_K)
  128. seq_printf(s, "test K\n");
  129. else if (test == MUSB_TEST_J)
  130. seq_printf(s, "test J\n");
  131. else if (test == MUSB_TEST_SE0_NAK)
  132. seq_printf(s, "test SE0 NAK\n");
  133. return 0;
  134. }
  135. static int musb_test_mode_open(struct inode *inode, struct file *file)
  136. {
  137. return single_open(file, musb_test_mode_show, inode->i_private);
  138. }
  139. static ssize_t musb_test_mode_write(struct file *file,
  140. const char __user *ubuf, size_t count, loff_t *ppos)
  141. {
  142. struct seq_file *s = file->private_data;
  143. struct musb *musb = s->private;
  144. u8 test;
  145. char buf[24];
  146. memset(buf, 0x00, sizeof(buf));
  147. if (copy_from_user(buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
  148. return -EFAULT;
  149. pm_runtime_get_sync(musb->controller);
  150. test = musb_readb(musb->mregs, MUSB_TESTMODE);
  151. if (test) {
  152. dev_err(musb->controller, "Error: test mode is already set. "
  153. "Please do USB Bus Reset to start a new test.\n");
  154. goto ret;
  155. }
  156. if (strstarts(buf, "force host full-speed"))
  157. test = MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_FS;
  158. else if (strstarts(buf, "force host high-speed"))
  159. test = MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_HS;
  160. else if (strstarts(buf, "force host"))
  161. test = MUSB_TEST_FORCE_HOST;
  162. else if (strstarts(buf, "fifo access"))
  163. test = MUSB_TEST_FIFO_ACCESS;
  164. else if (strstarts(buf, "force full-speed"))
  165. test = MUSB_TEST_FORCE_FS;
  166. else if (strstarts(buf, "force high-speed"))
  167. test = MUSB_TEST_FORCE_HS;
  168. else if (strstarts(buf, "test packet")) {
  169. test = MUSB_TEST_PACKET;
  170. musb_load_testpacket(musb);
  171. }
  172. else if (strstarts(buf, "test K"))
  173. test = MUSB_TEST_K;
  174. else if (strstarts(buf, "test J"))
  175. test = MUSB_TEST_J;
  176. else if (strstarts(buf, "test SE0 NAK"))
  177. test = MUSB_TEST_SE0_NAK;
  178. musb_writeb(musb->mregs, MUSB_TESTMODE, test);
  179. ret:
  180. pm_runtime_mark_last_busy(musb->controller);
  181. pm_runtime_put_autosuspend(musb->controller);
  182. return count;
  183. }
  184. static const struct file_operations musb_test_mode_fops = {
  185. .open = musb_test_mode_open,
  186. .write = musb_test_mode_write,
  187. .read = seq_read,
  188. .llseek = seq_lseek,
  189. .release = single_release,
  190. };
  191. static int musb_softconnect_show(struct seq_file *s, void *unused)
  192. {
  193. struct musb *musb = s->private;
  194. u8 reg;
  195. int connect;
  196. switch (musb->xceiv->otg->state) {
  197. case OTG_STATE_A_HOST:
  198. case OTG_STATE_A_WAIT_BCON:
  199. pm_runtime_get_sync(musb->controller);
  200. reg = musb_readb(musb->mregs, MUSB_DEVCTL);
  201. connect = reg & MUSB_DEVCTL_SESSION ? 1 : 0;
  202. pm_runtime_mark_last_busy(musb->controller);
  203. pm_runtime_put_autosuspend(musb->controller);
  204. break;
  205. default:
  206. connect = -1;
  207. }
  208. seq_printf(s, "%d\n", connect);
  209. return 0;
  210. }
  211. static int musb_softconnect_open(struct inode *inode, struct file *file)
  212. {
  213. return single_open(file, musb_softconnect_show, inode->i_private);
  214. }
  215. static ssize_t musb_softconnect_write(struct file *file,
  216. const char __user *ubuf, size_t count, loff_t *ppos)
  217. {
  218. struct seq_file *s = file->private_data;
  219. struct musb *musb = s->private;
  220. char buf[2];
  221. u8 reg;
  222. memset(buf, 0x00, sizeof(buf));
  223. if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
  224. return -EFAULT;
  225. pm_runtime_get_sync(musb->controller);
  226. if (!strncmp(buf, "0", 1)) {
  227. switch (musb->xceiv->otg->state) {
  228. case OTG_STATE_A_HOST:
  229. musb_root_disconnect(musb);
  230. reg = musb_readb(musb->mregs, MUSB_DEVCTL);
  231. reg &= ~MUSB_DEVCTL_SESSION;
  232. musb_writeb(musb->mregs, MUSB_DEVCTL, reg);
  233. break;
  234. default:
  235. break;
  236. }
  237. } else if (!strncmp(buf, "1", 1)) {
  238. switch (musb->xceiv->otg->state) {
  239. case OTG_STATE_A_WAIT_BCON:
  240. /*
  241. * musb_save_context() called in musb_runtime_suspend()
  242. * might cache devctl with SESSION bit cleared during
  243. * soft-disconnect, so specifically set SESSION bit
  244. * here to preserve it for musb_runtime_resume().
  245. */
  246. musb->context.devctl |= MUSB_DEVCTL_SESSION;
  247. reg = musb_readb(musb->mregs, MUSB_DEVCTL);
  248. reg |= MUSB_DEVCTL_SESSION;
  249. musb_writeb(musb->mregs, MUSB_DEVCTL, reg);
  250. break;
  251. default:
  252. break;
  253. }
  254. }
  255. pm_runtime_mark_last_busy(musb->controller);
  256. pm_runtime_put_autosuspend(musb->controller);
  257. return count;
  258. }
  259. /*
  260. * In host mode, connect/disconnect the bus without physically
  261. * remove the devices.
  262. */
  263. static const struct file_operations musb_softconnect_fops = {
  264. .open = musb_softconnect_open,
  265. .write = musb_softconnect_write,
  266. .read = seq_read,
  267. .llseek = seq_lseek,
  268. .release = single_release,
  269. };
  270. void musb_init_debugfs(struct musb *musb)
  271. {
  272. struct dentry *root;
  273. root = debugfs_create_dir(dev_name(musb->controller), NULL);
  274. musb->debugfs_root = root;
  275. debugfs_create_file("regdump", S_IRUGO, root, musb, &musb_regdump_fops);
  276. debugfs_create_file("testmode", S_IRUGO | S_IWUSR, root, musb,
  277. &musb_test_mode_fops);
  278. debugfs_create_file("softconnect", S_IRUGO | S_IWUSR, root, musb,
  279. &musb_softconnect_fops);
  280. }
  281. void /* __init_or_exit */ musb_exit_debugfs(struct musb *musb)
  282. {
  283. debugfs_remove_recursive(musb->debugfs_root);
  284. }