jz4740.c 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Ingenic JZ4740 "glue layer"
  4. *
  5. * Copyright (C) 2013, Apelete Seketeli <apelete@seketeli.net>
  6. */
  7. #include <linux/clk.h>
  8. #include <linux/dma-mapping.h>
  9. #include <linux/errno.h>
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/of_device.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/usb/usb_phy_generic.h>
  15. #include "musb_core.h"
  16. struct jz4740_glue {
  17. struct device *dev;
  18. struct platform_device *musb;
  19. struct clk *clk;
  20. };
  21. static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci)
  22. {
  23. unsigned long flags;
  24. irqreturn_t retval = IRQ_NONE;
  25. struct musb *musb = __hci;
  26. spin_lock_irqsave(&musb->lock, flags);
  27. musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
  28. musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
  29. musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
  30. /*
  31. * The controller is gadget only, the state of the host mode IRQ bits is
  32. * undefined. Mask them to make sure that the musb driver core will
  33. * never see them set
  34. */
  35. musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME |
  36. MUSB_INTR_RESET | MUSB_INTR_SOF;
  37. if (musb->int_usb || musb->int_tx || musb->int_rx)
  38. retval = musb_interrupt(musb);
  39. spin_unlock_irqrestore(&musb->lock, flags);
  40. return retval;
  41. }
  42. static struct musb_fifo_cfg jz4740_musb_fifo_cfg[] = {
  43. { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
  44. { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
  45. { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, },
  46. };
  47. static const struct musb_hdrc_config jz4740_musb_config = {
  48. /* Silicon does not implement USB OTG. */
  49. .multipoint = 0,
  50. /* Max EPs scanned, driver will decide which EP can be used. */
  51. .num_eps = 4,
  52. /* RAMbits needed to configure EPs from table */
  53. .ram_bits = 9,
  54. .fifo_cfg = jz4740_musb_fifo_cfg,
  55. .fifo_cfg_size = ARRAY_SIZE(jz4740_musb_fifo_cfg),
  56. };
  57. static struct musb_hdrc_platform_data jz4740_musb_platform_data = {
  58. .mode = MUSB_PERIPHERAL,
  59. .config = &jz4740_musb_config,
  60. };
  61. static int jz4740_musb_init(struct musb *musb)
  62. {
  63. struct device *dev = musb->controller->parent;
  64. int err;
  65. if (dev->of_node)
  66. musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
  67. else
  68. musb->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
  69. if (IS_ERR(musb->xceiv)) {
  70. err = PTR_ERR(musb->xceiv);
  71. if (err != -EPROBE_DEFER)
  72. dev_err(dev, "No transceiver configured: %d", err);
  73. return err;
  74. }
  75. /* Silicon does not implement ConfigData register.
  76. * Set dyn_fifo to avoid reading EP config from hardware.
  77. */
  78. musb->dyn_fifo = true;
  79. musb->isr = jz4740_musb_interrupt;
  80. return 0;
  81. }
  82. /*
  83. * DMA has not been confirmed to work with CONFIG_USB_INVENTRA_DMA,
  84. * so let's not set up the dma function pointers yet.
  85. */
  86. static const struct musb_platform_ops jz4740_musb_ops = {
  87. .quirks = MUSB_DMA_INVENTRA | MUSB_INDEXED_EP,
  88. .fifo_mode = 2,
  89. .init = jz4740_musb_init,
  90. };
  91. static int jz4740_probe(struct platform_device *pdev)
  92. {
  93. struct musb_hdrc_platform_data *pdata = &jz4740_musb_platform_data;
  94. struct platform_device *musb;
  95. struct jz4740_glue *glue;
  96. struct clk *clk;
  97. int ret;
  98. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  99. if (!glue)
  100. return -ENOMEM;
  101. musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
  102. if (!musb) {
  103. dev_err(&pdev->dev, "failed to allocate musb device\n");
  104. return -ENOMEM;
  105. }
  106. clk = devm_clk_get(&pdev->dev, "udc");
  107. if (IS_ERR(clk)) {
  108. dev_err(&pdev->dev, "failed to get clock\n");
  109. ret = PTR_ERR(clk);
  110. goto err_platform_device_put;
  111. }
  112. ret = clk_prepare_enable(clk);
  113. if (ret) {
  114. dev_err(&pdev->dev, "failed to enable clock\n");
  115. goto err_platform_device_put;
  116. }
  117. musb->dev.parent = &pdev->dev;
  118. glue->dev = &pdev->dev;
  119. glue->musb = musb;
  120. glue->clk = clk;
  121. pdata->platform_ops = &jz4740_musb_ops;
  122. platform_set_drvdata(pdev, glue);
  123. ret = platform_device_add_resources(musb, pdev->resource,
  124. pdev->num_resources);
  125. if (ret) {
  126. dev_err(&pdev->dev, "failed to add resources\n");
  127. goto err_clk_disable;
  128. }
  129. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  130. if (ret) {
  131. dev_err(&pdev->dev, "failed to add platform_data\n");
  132. goto err_clk_disable;
  133. }
  134. ret = platform_device_add(musb);
  135. if (ret) {
  136. dev_err(&pdev->dev, "failed to register musb device\n");
  137. goto err_clk_disable;
  138. }
  139. return 0;
  140. err_clk_disable:
  141. clk_disable_unprepare(clk);
  142. err_platform_device_put:
  143. platform_device_put(musb);
  144. return ret;
  145. }
  146. static int jz4740_remove(struct platform_device *pdev)
  147. {
  148. struct jz4740_glue *glue = platform_get_drvdata(pdev);
  149. platform_device_unregister(glue->musb);
  150. clk_disable_unprepare(glue->clk);
  151. return 0;
  152. }
  153. #ifdef CONFIG_OF
  154. static const struct of_device_id jz4740_musb_of_match[] = {
  155. { .compatible = "ingenic,jz4740-musb" },
  156. {},
  157. };
  158. MODULE_DEVICE_TABLE(of, jz4740_musb_of_match);
  159. #endif
  160. static struct platform_driver jz4740_driver = {
  161. .probe = jz4740_probe,
  162. .remove = jz4740_remove,
  163. .driver = {
  164. .name = "musb-jz4740",
  165. .of_match_table = of_match_ptr(jz4740_musb_of_match),
  166. },
  167. };
  168. MODULE_DESCRIPTION("JZ4740 MUSB Glue Layer");
  169. MODULE_AUTHOR("Apelete Seketeli <apelete@seketeli.net>");
  170. MODULE_LICENSE("GPL v2");
  171. module_platform_driver(jz4740_driver);