xhci-rcar.h 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * drivers/usb/host/xhci-rcar.h
  4. *
  5. * Copyright (C) 2014 Renesas Electronics Corporation
  6. */
  7. #ifndef _XHCI_RCAR_H
  8. #define _XHCI_RCAR_H
  9. #define XHCI_RCAR_FIRMWARE_NAME_V1 "r8a779x_usb3_v1.dlmem"
  10. #define XHCI_RCAR_FIRMWARE_NAME_V2 "r8a779x_usb3_v2.dlmem"
  11. #define XHCI_RCAR_FIRMWARE_NAME_V3 "r8a779x_usb3_v3.dlmem"
  12. #if IS_ENABLED(CONFIG_USB_XHCI_RCAR)
  13. void xhci_rcar_start(struct usb_hcd *hcd);
  14. int xhci_rcar_init_quirk(struct usb_hcd *hcd);
  15. int xhci_rcar_resume_quirk(struct usb_hcd *hcd);
  16. #else
  17. static inline void xhci_rcar_start(struct usb_hcd *hcd)
  18. {
  19. }
  20. static inline int xhci_rcar_init_quirk(struct usb_hcd *hcd)
  21. {
  22. return 0;
  23. }
  24. static inline int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
  25. {
  26. return 0;
  27. }
  28. #endif
  29. /*
  30. * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
  31. * to 1. However, these SoCs don't support 64-bit address memory
  32. * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
  33. * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
  34. * xhci_gen_setup() by using the XHCI_NO_64BIT_SUPPORT quirk.
  35. *
  36. * And, since the firmware/internal CPU control the USBSTS.STS_HALT
  37. * and the process speed is down when the roothub port enters U3,
  38. * long delay for the handshake of STS_HALT is neeed in xhci_suspend()
  39. * by using the XHCI_SLOW_SUSPEND quirk.
  40. */
  41. #define SET_XHCI_PLAT_PRIV_FOR_RCAR(firmware) \
  42. .firmware_name = firmware, \
  43. .quirks = XHCI_NO_64BIT_SUPPORT | XHCI_TRUST_TX_LENGTH | \
  44. XHCI_SLOW_SUSPEND, \
  45. .init_quirk = xhci_rcar_init_quirk, \
  46. .plat_start = xhci_rcar_start, \
  47. .resume_quirk = xhci_rcar_resume_quirk,
  48. #endif /* _XHCI_RCAR_H */