xhci-mtk-sch.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2015 MediaTek Inc.
  4. * Author:
  5. * Zhigang.Wei <zhigang.wei@mediatek.com>
  6. * Chunfeng.Yun <chunfeng.yun@mediatek.com>
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/slab.h>
  11. #include "xhci.h"
  12. #include "xhci-mtk.h"
  13. #define SSP_BW_BOUNDARY 130000
  14. #define SS_BW_BOUNDARY 51000
  15. /* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */
  16. #define HS_BW_BOUNDARY 6144
  17. /* usb2 spec section11.18.1: at most 188 FS bytes per microframe */
  18. #define FS_PAYLOAD_MAX 188
  19. /*
  20. * max number of microframes for split transfer,
  21. * for fs isoc in : 1 ss + 1 idle + 7 cs
  22. */
  23. #define TT_MICROFRAMES_MAX 9
  24. /* mtk scheduler bitmasks */
  25. #define EP_BPKTS(p) ((p) & 0x7f)
  26. #define EP_BCSCOUNT(p) (((p) & 0x7) << 8)
  27. #define EP_BBM(p) ((p) << 11)
  28. #define EP_BOFFSET(p) ((p) & 0x3fff)
  29. #define EP_BREPEAT(p) (((p) & 0x7fff) << 16)
  30. static int is_fs_or_ls(enum usb_device_speed speed)
  31. {
  32. return speed == USB_SPEED_FULL || speed == USB_SPEED_LOW;
  33. }
  34. /*
  35. * get the index of bandwidth domains array which @ep belongs to.
  36. *
  37. * the bandwidth domain array is saved to @sch_array of struct xhci_hcd_mtk,
  38. * each HS root port is treated as a single bandwidth domain,
  39. * but each SS root port is treated as two bandwidth domains, one for IN eps,
  40. * one for OUT eps.
  41. * @real_port value is defined as follow according to xHCI spec:
  42. * 1 for SSport0, ..., N+1 for SSportN, N+2 for HSport0, N+3 for HSport1, etc
  43. * so the bandwidth domain array is organized as follow for simplification:
  44. * SSport0-OUT, SSport0-IN, ..., SSportX-OUT, SSportX-IN, HSport0, ..., HSportY
  45. */
  46. static int get_bw_index(struct xhci_hcd *xhci, struct usb_device *udev,
  47. struct usb_host_endpoint *ep)
  48. {
  49. struct xhci_virt_device *virt_dev;
  50. int bw_index;
  51. virt_dev = xhci->devs[udev->slot_id];
  52. if (udev->speed >= USB_SPEED_SUPER) {
  53. if (usb_endpoint_dir_out(&ep->desc))
  54. bw_index = (virt_dev->real_port - 1) * 2;
  55. else
  56. bw_index = (virt_dev->real_port - 1) * 2 + 1;
  57. } else {
  58. /* add one more for each SS port */
  59. bw_index = virt_dev->real_port + xhci->usb3_rhub.num_ports - 1;
  60. }
  61. return bw_index;
  62. }
  63. static u32 get_esit(struct xhci_ep_ctx *ep_ctx)
  64. {
  65. u32 esit;
  66. esit = 1 << CTX_TO_EP_INTERVAL(le32_to_cpu(ep_ctx->ep_info));
  67. if (esit > XHCI_MTK_MAX_ESIT)
  68. esit = XHCI_MTK_MAX_ESIT;
  69. return esit;
  70. }
  71. static struct mu3h_sch_tt *find_tt(struct usb_device *udev)
  72. {
  73. struct usb_tt *utt = udev->tt;
  74. struct mu3h_sch_tt *tt, **tt_index, **ptt;
  75. unsigned int port;
  76. bool allocated_index = false;
  77. if (!utt)
  78. return NULL; /* Not below a TT */
  79. /*
  80. * Find/create our data structure.
  81. * For hubs with a single TT, we get it directly.
  82. * For hubs with multiple TTs, there's an extra level of pointers.
  83. */
  84. tt_index = NULL;
  85. if (utt->multi) {
  86. tt_index = utt->hcpriv;
  87. if (!tt_index) { /* Create the index array */
  88. tt_index = kcalloc(utt->hub->maxchild,
  89. sizeof(*tt_index), GFP_KERNEL);
  90. if (!tt_index)
  91. return ERR_PTR(-ENOMEM);
  92. utt->hcpriv = tt_index;
  93. allocated_index = true;
  94. }
  95. port = udev->ttport - 1;
  96. ptt = &tt_index[port];
  97. } else {
  98. port = 0;
  99. ptt = (struct mu3h_sch_tt **) &utt->hcpriv;
  100. }
  101. tt = *ptt;
  102. if (!tt) { /* Create the mu3h_sch_tt */
  103. tt = kzalloc(sizeof(*tt), GFP_KERNEL);
  104. if (!tt) {
  105. if (allocated_index) {
  106. utt->hcpriv = NULL;
  107. kfree(tt_index);
  108. }
  109. return ERR_PTR(-ENOMEM);
  110. }
  111. INIT_LIST_HEAD(&tt->ep_list);
  112. tt->usb_tt = utt;
  113. tt->tt_port = port;
  114. *ptt = tt;
  115. }
  116. return tt;
  117. }
  118. /* Release the TT above udev, if it's not in use */
  119. static void drop_tt(struct usb_device *udev)
  120. {
  121. struct usb_tt *utt = udev->tt;
  122. struct mu3h_sch_tt *tt, **tt_index, **ptt;
  123. int i, cnt;
  124. if (!utt || !utt->hcpriv)
  125. return; /* Not below a TT, or never allocated */
  126. cnt = 0;
  127. if (utt->multi) {
  128. tt_index = utt->hcpriv;
  129. ptt = &tt_index[udev->ttport - 1];
  130. /* How many entries are left in tt_index? */
  131. for (i = 0; i < utt->hub->maxchild; ++i)
  132. cnt += !!tt_index[i];
  133. } else {
  134. tt_index = NULL;
  135. ptt = (struct mu3h_sch_tt **)&utt->hcpriv;
  136. }
  137. tt = *ptt;
  138. if (!tt || !list_empty(&tt->ep_list))
  139. return; /* never allocated , or still in use*/
  140. *ptt = NULL;
  141. kfree(tt);
  142. if (cnt == 1) {
  143. utt->hcpriv = NULL;
  144. kfree(tt_index);
  145. }
  146. }
  147. static struct mu3h_sch_ep_info *create_sch_ep(struct usb_device *udev,
  148. struct usb_host_endpoint *ep, struct xhci_ep_ctx *ep_ctx)
  149. {
  150. struct mu3h_sch_ep_info *sch_ep;
  151. struct mu3h_sch_tt *tt = NULL;
  152. u32 len_bw_budget_table;
  153. size_t mem_size;
  154. if (is_fs_or_ls(udev->speed))
  155. len_bw_budget_table = TT_MICROFRAMES_MAX;
  156. else if ((udev->speed >= USB_SPEED_SUPER)
  157. && usb_endpoint_xfer_isoc(&ep->desc))
  158. len_bw_budget_table = get_esit(ep_ctx);
  159. else
  160. len_bw_budget_table = 1;
  161. mem_size = sizeof(struct mu3h_sch_ep_info) +
  162. len_bw_budget_table * sizeof(u32);
  163. sch_ep = kzalloc(mem_size, GFP_KERNEL);
  164. if (!sch_ep)
  165. return ERR_PTR(-ENOMEM);
  166. if (is_fs_or_ls(udev->speed)) {
  167. tt = find_tt(udev);
  168. if (IS_ERR(tt)) {
  169. kfree(sch_ep);
  170. return ERR_PTR(-ENOMEM);
  171. }
  172. }
  173. sch_ep->sch_tt = tt;
  174. sch_ep->ep = ep;
  175. INIT_LIST_HEAD(&sch_ep->endpoint);
  176. INIT_LIST_HEAD(&sch_ep->tt_endpoint);
  177. return sch_ep;
  178. }
  179. static void setup_sch_info(struct usb_device *udev,
  180. struct xhci_ep_ctx *ep_ctx, struct mu3h_sch_ep_info *sch_ep)
  181. {
  182. u32 ep_type;
  183. u32 maxpkt;
  184. u32 max_burst;
  185. u32 mult;
  186. u32 esit_pkts;
  187. u32 max_esit_payload;
  188. u32 *bwb_table = sch_ep->bw_budget_table;
  189. int i;
  190. ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
  191. maxpkt = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
  192. max_burst = CTX_TO_MAX_BURST(le32_to_cpu(ep_ctx->ep_info2));
  193. mult = CTX_TO_EP_MULT(le32_to_cpu(ep_ctx->ep_info));
  194. max_esit_payload =
  195. (CTX_TO_MAX_ESIT_PAYLOAD_HI(
  196. le32_to_cpu(ep_ctx->ep_info)) << 16) |
  197. CTX_TO_MAX_ESIT_PAYLOAD(le32_to_cpu(ep_ctx->tx_info));
  198. sch_ep->esit = get_esit(ep_ctx);
  199. sch_ep->ep_type = ep_type;
  200. sch_ep->maxpkt = maxpkt;
  201. sch_ep->offset = 0;
  202. sch_ep->burst_mode = 0;
  203. sch_ep->repeat = 0;
  204. if (udev->speed == USB_SPEED_HIGH) {
  205. sch_ep->cs_count = 0;
  206. /*
  207. * usb_20 spec section5.9
  208. * a single microframe is enough for HS synchromous endpoints
  209. * in a interval
  210. */
  211. sch_ep->num_budget_microframes = 1;
  212. /*
  213. * xHCI spec section6.2.3.4
  214. * @max_burst is the number of additional transactions
  215. * opportunities per microframe
  216. */
  217. sch_ep->pkts = max_burst + 1;
  218. sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts;
  219. bwb_table[0] = sch_ep->bw_cost_per_microframe;
  220. } else if (udev->speed >= USB_SPEED_SUPER) {
  221. /* usb3_r1 spec section4.4.7 & 4.4.8 */
  222. sch_ep->cs_count = 0;
  223. sch_ep->burst_mode = 1;
  224. /*
  225. * some device's (d)wBytesPerInterval is set as 0,
  226. * then max_esit_payload is 0, so evaluate esit_pkts from
  227. * mult and burst
  228. */
  229. esit_pkts = DIV_ROUND_UP(max_esit_payload, maxpkt);
  230. if (esit_pkts == 0)
  231. esit_pkts = (mult + 1) * (max_burst + 1);
  232. if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
  233. sch_ep->pkts = esit_pkts;
  234. sch_ep->num_budget_microframes = 1;
  235. bwb_table[0] = maxpkt * sch_ep->pkts;
  236. }
  237. if (ep_type == ISOC_IN_EP || ep_type == ISOC_OUT_EP) {
  238. u32 remainder;
  239. if (sch_ep->esit == 1)
  240. sch_ep->pkts = esit_pkts;
  241. else if (esit_pkts <= sch_ep->esit)
  242. sch_ep->pkts = 1;
  243. else
  244. sch_ep->pkts = roundup_pow_of_two(esit_pkts)
  245. / sch_ep->esit;
  246. sch_ep->num_budget_microframes =
  247. DIV_ROUND_UP(esit_pkts, sch_ep->pkts);
  248. sch_ep->repeat = !!(sch_ep->num_budget_microframes > 1);
  249. sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts;
  250. remainder = sch_ep->bw_cost_per_microframe;
  251. remainder *= sch_ep->num_budget_microframes;
  252. remainder -= (maxpkt * esit_pkts);
  253. for (i = 0; i < sch_ep->num_budget_microframes - 1; i++)
  254. bwb_table[i] = sch_ep->bw_cost_per_microframe;
  255. /* last one <= bw_cost_per_microframe */
  256. bwb_table[i] = remainder;
  257. }
  258. } else if (is_fs_or_ls(udev->speed)) {
  259. sch_ep->pkts = 1; /* at most one packet for each microframe */
  260. /*
  261. * num_budget_microframes and cs_count will be updated when
  262. * check TT for INT_OUT_EP, ISOC/INT_IN_EP type
  263. */
  264. sch_ep->cs_count = DIV_ROUND_UP(maxpkt, FS_PAYLOAD_MAX);
  265. sch_ep->num_budget_microframes = sch_ep->cs_count;
  266. sch_ep->bw_cost_per_microframe =
  267. (maxpkt < FS_PAYLOAD_MAX) ? maxpkt : FS_PAYLOAD_MAX;
  268. /* init budget table */
  269. if (ep_type == ISOC_OUT_EP) {
  270. for (i = 0; i < sch_ep->num_budget_microframes; i++)
  271. bwb_table[i] = sch_ep->bw_cost_per_microframe;
  272. } else if (ep_type == INT_OUT_EP) {
  273. /* only first one consumes bandwidth, others as zero */
  274. bwb_table[0] = sch_ep->bw_cost_per_microframe;
  275. } else { /* INT_IN_EP or ISOC_IN_EP */
  276. bwb_table[0] = 0; /* start split */
  277. bwb_table[1] = 0; /* idle */
  278. /*
  279. * due to cs_count will be updated according to cs
  280. * position, assign all remainder budget array
  281. * elements as @bw_cost_per_microframe, but only first
  282. * @num_budget_microframes elements will be used later
  283. */
  284. for (i = 2; i < TT_MICROFRAMES_MAX; i++)
  285. bwb_table[i] = sch_ep->bw_cost_per_microframe;
  286. }
  287. }
  288. }
  289. /* Get maximum bandwidth when we schedule at offset slot. */
  290. static u32 get_max_bw(struct mu3h_sch_bw_info *sch_bw,
  291. struct mu3h_sch_ep_info *sch_ep, u32 offset)
  292. {
  293. u32 num_esit;
  294. u32 max_bw = 0;
  295. u32 bw;
  296. int i;
  297. int j;
  298. num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
  299. for (i = 0; i < num_esit; i++) {
  300. u32 base = offset + i * sch_ep->esit;
  301. for (j = 0; j < sch_ep->num_budget_microframes; j++) {
  302. bw = sch_bw->bus_bw[base + j] +
  303. sch_ep->bw_budget_table[j];
  304. if (bw > max_bw)
  305. max_bw = bw;
  306. }
  307. }
  308. return max_bw;
  309. }
  310. static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw,
  311. struct mu3h_sch_ep_info *sch_ep, bool used)
  312. {
  313. u32 num_esit;
  314. u32 base;
  315. int i;
  316. int j;
  317. num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
  318. for (i = 0; i < num_esit; i++) {
  319. base = sch_ep->offset + i * sch_ep->esit;
  320. for (j = 0; j < sch_ep->num_budget_microframes; j++) {
  321. if (used)
  322. sch_bw->bus_bw[base + j] +=
  323. sch_ep->bw_budget_table[j];
  324. else
  325. sch_bw->bus_bw[base + j] -=
  326. sch_ep->bw_budget_table[j];
  327. }
  328. }
  329. sch_ep->allocated = used;
  330. }
  331. static int check_fs_bus_bw(struct mu3h_sch_ep_info *sch_ep, int offset)
  332. {
  333. struct mu3h_sch_tt *tt = sch_ep->sch_tt;
  334. u32 num_esit, tmp;
  335. int base;
  336. int i, j;
  337. num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
  338. for (i = 0; i < num_esit; i++) {
  339. base = offset + i * sch_ep->esit;
  340. /*
  341. * Compared with hs bus, no matter what ep type,
  342. * the hub will always delay one uframe to send data
  343. */
  344. for (j = 0; j < sch_ep->cs_count; j++) {
  345. tmp = tt->fs_bus_bw[base + j] + sch_ep->bw_cost_per_microframe;
  346. if (tmp > FS_PAYLOAD_MAX)
  347. return -ERANGE;
  348. }
  349. }
  350. return 0;
  351. }
  352. static int check_sch_tt(struct usb_device *udev,
  353. struct mu3h_sch_ep_info *sch_ep, u32 offset)
  354. {
  355. struct mu3h_sch_tt *tt = sch_ep->sch_tt;
  356. u32 extra_cs_count;
  357. u32 fs_budget_start;
  358. u32 start_ss, last_ss;
  359. u32 start_cs, last_cs;
  360. int i;
  361. start_ss = offset % 8;
  362. fs_budget_start = (start_ss + 1) % 8;
  363. if (sch_ep->ep_type == ISOC_OUT_EP) {
  364. last_ss = start_ss + sch_ep->cs_count - 1;
  365. /*
  366. * usb_20 spec section11.18:
  367. * must never schedule Start-Split in Y6
  368. */
  369. if (!(start_ss == 7 || last_ss < 6))
  370. return -ERANGE;
  371. for (i = 0; i < sch_ep->cs_count; i++)
  372. if (test_bit(offset + i, tt->ss_bit_map))
  373. return -ERANGE;
  374. } else {
  375. u32 cs_count = DIV_ROUND_UP(sch_ep->maxpkt, FS_PAYLOAD_MAX);
  376. /*
  377. * usb_20 spec section11.18:
  378. * must never schedule Start-Split in Y6
  379. */
  380. if (start_ss == 6)
  381. return -ERANGE;
  382. /* one uframe for ss + one uframe for idle */
  383. start_cs = (start_ss + 2) % 8;
  384. last_cs = start_cs + cs_count - 1;
  385. if (last_cs > 7)
  386. return -ERANGE;
  387. if (sch_ep->ep_type == ISOC_IN_EP)
  388. extra_cs_count = (last_cs == 7) ? 1 : 2;
  389. else /* ep_type : INTR IN / INTR OUT */
  390. extra_cs_count = (fs_budget_start == 6) ? 1 : 2;
  391. cs_count += extra_cs_count;
  392. if (cs_count > 7)
  393. cs_count = 7; /* HW limit */
  394. for (i = 0; i < cs_count + 2; i++) {
  395. if (test_bit(offset + i, tt->ss_bit_map))
  396. return -ERANGE;
  397. }
  398. sch_ep->cs_count = cs_count;
  399. /* one for ss, the other for idle */
  400. sch_ep->num_budget_microframes = cs_count + 2;
  401. /*
  402. * if interval=1, maxp >752, num_budge_micoframe is larger
  403. * than sch_ep->esit, will overstep boundary
  404. */
  405. if (sch_ep->num_budget_microframes > sch_ep->esit)
  406. sch_ep->num_budget_microframes = sch_ep->esit;
  407. }
  408. return check_fs_bus_bw(sch_ep, offset);
  409. }
  410. static void update_sch_tt(struct usb_device *udev,
  411. struct mu3h_sch_ep_info *sch_ep, bool used)
  412. {
  413. struct mu3h_sch_tt *tt = sch_ep->sch_tt;
  414. u32 base, num_esit;
  415. int bw_updated;
  416. int bits;
  417. int i, j;
  418. num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
  419. bits = (sch_ep->ep_type == ISOC_OUT_EP) ? sch_ep->cs_count : 1;
  420. if (used)
  421. bw_updated = sch_ep->bw_cost_per_microframe;
  422. else
  423. bw_updated = -sch_ep->bw_cost_per_microframe;
  424. for (i = 0; i < num_esit; i++) {
  425. base = sch_ep->offset + i * sch_ep->esit;
  426. for (j = 0; j < bits; j++) {
  427. if (used)
  428. set_bit(base + j, tt->ss_bit_map);
  429. else
  430. clear_bit(base + j, tt->ss_bit_map);
  431. }
  432. for (j = 0; j < sch_ep->cs_count; j++)
  433. tt->fs_bus_bw[base + j] += bw_updated;
  434. }
  435. if (used)
  436. list_add_tail(&sch_ep->tt_endpoint, &tt->ep_list);
  437. else
  438. list_del(&sch_ep->tt_endpoint);
  439. }
  440. static int check_sch_bw(struct usb_device *udev,
  441. struct mu3h_sch_bw_info *sch_bw, struct mu3h_sch_ep_info *sch_ep)
  442. {
  443. u32 offset;
  444. u32 esit;
  445. u32 min_bw;
  446. u32 min_index;
  447. u32 worst_bw;
  448. u32 bw_boundary;
  449. u32 min_num_budget;
  450. u32 min_cs_count;
  451. bool tt_offset_ok = false;
  452. int ret;
  453. esit = sch_ep->esit;
  454. /*
  455. * Search through all possible schedule microframes.
  456. * and find a microframe where its worst bandwidth is minimum.
  457. */
  458. min_bw = ~0;
  459. min_index = 0;
  460. min_cs_count = sch_ep->cs_count;
  461. min_num_budget = sch_ep->num_budget_microframes;
  462. for (offset = 0; offset < esit; offset++) {
  463. if (is_fs_or_ls(udev->speed)) {
  464. ret = check_sch_tt(udev, sch_ep, offset);
  465. if (ret)
  466. continue;
  467. else
  468. tt_offset_ok = true;
  469. }
  470. if ((offset + sch_ep->num_budget_microframes) > sch_ep->esit)
  471. break;
  472. worst_bw = get_max_bw(sch_bw, sch_ep, offset);
  473. if (min_bw > worst_bw) {
  474. min_bw = worst_bw;
  475. min_index = offset;
  476. min_cs_count = sch_ep->cs_count;
  477. min_num_budget = sch_ep->num_budget_microframes;
  478. }
  479. if (min_bw == 0)
  480. break;
  481. }
  482. if (udev->speed == USB_SPEED_SUPER_PLUS)
  483. bw_boundary = SSP_BW_BOUNDARY;
  484. else if (udev->speed == USB_SPEED_SUPER)
  485. bw_boundary = SS_BW_BOUNDARY;
  486. else
  487. bw_boundary = HS_BW_BOUNDARY;
  488. /* check bandwidth */
  489. if (min_bw > bw_boundary)
  490. return -ERANGE;
  491. sch_ep->offset = min_index;
  492. sch_ep->cs_count = min_cs_count;
  493. sch_ep->num_budget_microframes = min_num_budget;
  494. if (is_fs_or_ls(udev->speed)) {
  495. /* all offset for tt is not ok*/
  496. if (!tt_offset_ok)
  497. return -ERANGE;
  498. update_sch_tt(udev, sch_ep, 1);
  499. }
  500. /* update bus bandwidth info */
  501. update_bus_bw(sch_bw, sch_ep, 1);
  502. return 0;
  503. }
  504. static void destroy_sch_ep(struct usb_device *udev,
  505. struct mu3h_sch_bw_info *sch_bw, struct mu3h_sch_ep_info *sch_ep)
  506. {
  507. /* only release ep bw check passed by check_sch_bw() */
  508. if (sch_ep->allocated) {
  509. update_bus_bw(sch_bw, sch_ep, 0);
  510. if (sch_ep->sch_tt)
  511. update_sch_tt(udev, sch_ep, 0);
  512. }
  513. if (sch_ep->sch_tt)
  514. drop_tt(udev);
  515. list_del(&sch_ep->endpoint);
  516. kfree(sch_ep);
  517. }
  518. static bool need_bw_sch(struct usb_host_endpoint *ep,
  519. enum usb_device_speed speed, int has_tt)
  520. {
  521. /* only for periodic endpoints */
  522. if (usb_endpoint_xfer_control(&ep->desc)
  523. || usb_endpoint_xfer_bulk(&ep->desc))
  524. return false;
  525. /*
  526. * for LS & FS periodic endpoints which its device is not behind
  527. * a TT are also ignored, root-hub will schedule them directly,
  528. * but need set @bpkts field of endpoint context to 1.
  529. */
  530. if (is_fs_or_ls(speed) && !has_tt)
  531. return false;
  532. /* skip endpoint with zero maxpkt */
  533. if (usb_endpoint_maxp(&ep->desc) == 0)
  534. return false;
  535. return true;
  536. }
  537. int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk)
  538. {
  539. struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd);
  540. struct mu3h_sch_bw_info *sch_array;
  541. int num_usb_bus;
  542. int i;
  543. /* ss IN and OUT are separated */
  544. num_usb_bus = xhci->usb3_rhub.num_ports * 2 + xhci->usb2_rhub.num_ports;
  545. sch_array = kcalloc(num_usb_bus, sizeof(*sch_array), GFP_KERNEL);
  546. if (sch_array == NULL)
  547. return -ENOMEM;
  548. for (i = 0; i < num_usb_bus; i++)
  549. INIT_LIST_HEAD(&sch_array[i].bw_ep_list);
  550. mtk->sch_array = sch_array;
  551. INIT_LIST_HEAD(&mtk->bw_ep_chk_list);
  552. return 0;
  553. }
  554. EXPORT_SYMBOL_GPL(xhci_mtk_sch_init);
  555. void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk)
  556. {
  557. kfree(mtk->sch_array);
  558. }
  559. EXPORT_SYMBOL_GPL(xhci_mtk_sch_exit);
  560. int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
  561. struct usb_host_endpoint *ep)
  562. {
  563. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  564. struct xhci_hcd *xhci;
  565. struct xhci_ep_ctx *ep_ctx;
  566. struct xhci_slot_ctx *slot_ctx;
  567. struct xhci_virt_device *virt_dev;
  568. struct mu3h_sch_ep_info *sch_ep;
  569. unsigned int ep_index;
  570. xhci = hcd_to_xhci(hcd);
  571. virt_dev = xhci->devs[udev->slot_id];
  572. ep_index = xhci_get_endpoint_index(&ep->desc);
  573. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  574. ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
  575. xhci_dbg(xhci, "%s() type:%d, speed:%d, mpkt:%d, dir:%d, ep:%p\n",
  576. __func__, usb_endpoint_type(&ep->desc), udev->speed,
  577. usb_endpoint_maxp(&ep->desc),
  578. usb_endpoint_dir_in(&ep->desc), ep);
  579. if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) {
  580. /*
  581. * set @bpkts to 1 if it is LS or FS periodic endpoint, and its
  582. * device does not connected through an external HS hub
  583. */
  584. if (usb_endpoint_xfer_int(&ep->desc)
  585. || usb_endpoint_xfer_isoc(&ep->desc))
  586. ep_ctx->reserved[0] = cpu_to_le32(EP_BPKTS(1));
  587. return 0;
  588. }
  589. sch_ep = create_sch_ep(udev, ep, ep_ctx);
  590. if (IS_ERR_OR_NULL(sch_ep))
  591. return -ENOMEM;
  592. setup_sch_info(udev, ep_ctx, sch_ep);
  593. list_add_tail(&sch_ep->endpoint, &mtk->bw_ep_chk_list);
  594. return 0;
  595. }
  596. EXPORT_SYMBOL_GPL(xhci_mtk_add_ep_quirk);
  597. void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
  598. struct usb_host_endpoint *ep)
  599. {
  600. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  601. struct xhci_hcd *xhci;
  602. struct xhci_slot_ctx *slot_ctx;
  603. struct xhci_virt_device *virt_dev;
  604. struct mu3h_sch_bw_info *sch_array;
  605. struct mu3h_sch_bw_info *sch_bw;
  606. struct mu3h_sch_ep_info *sch_ep, *tmp;
  607. int bw_index;
  608. xhci = hcd_to_xhci(hcd);
  609. virt_dev = xhci->devs[udev->slot_id];
  610. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  611. sch_array = mtk->sch_array;
  612. xhci_dbg(xhci, "%s() type:%d, speed:%d, mpks:%d, dir:%d, ep:%p\n",
  613. __func__, usb_endpoint_type(&ep->desc), udev->speed,
  614. usb_endpoint_maxp(&ep->desc),
  615. usb_endpoint_dir_in(&ep->desc), ep);
  616. if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT))
  617. return;
  618. bw_index = get_bw_index(xhci, udev, ep);
  619. sch_bw = &sch_array[bw_index];
  620. list_for_each_entry_safe(sch_ep, tmp, &sch_bw->bw_ep_list, endpoint) {
  621. if (sch_ep->ep == ep) {
  622. destroy_sch_ep(udev, sch_bw, sch_ep);
  623. break;
  624. }
  625. }
  626. }
  627. EXPORT_SYMBOL_GPL(xhci_mtk_drop_ep_quirk);
  628. int xhci_mtk_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  629. {
  630. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  631. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  632. struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
  633. struct mu3h_sch_bw_info *sch_bw;
  634. struct mu3h_sch_ep_info *sch_ep, *tmp;
  635. int bw_index, ret;
  636. xhci_dbg(xhci, "%s() udev %s\n", __func__, dev_name(&udev->dev));
  637. list_for_each_entry(sch_ep, &mtk->bw_ep_chk_list, endpoint) {
  638. bw_index = get_bw_index(xhci, udev, sch_ep->ep);
  639. sch_bw = &mtk->sch_array[bw_index];
  640. ret = check_sch_bw(udev, sch_bw, sch_ep);
  641. if (ret) {
  642. xhci_err(xhci, "Not enough bandwidth!\n");
  643. return -ENOSPC;
  644. }
  645. }
  646. list_for_each_entry_safe(sch_ep, tmp, &mtk->bw_ep_chk_list, endpoint) {
  647. struct xhci_ep_ctx *ep_ctx;
  648. struct usb_host_endpoint *ep = sch_ep->ep;
  649. unsigned int ep_index = xhci_get_endpoint_index(&ep->desc);
  650. bw_index = get_bw_index(xhci, udev, ep);
  651. sch_bw = &mtk->sch_array[bw_index];
  652. list_move_tail(&sch_ep->endpoint, &sch_bw->bw_ep_list);
  653. ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
  654. ep_ctx->reserved[0] = cpu_to_le32(EP_BPKTS(sch_ep->pkts)
  655. | EP_BCSCOUNT(sch_ep->cs_count)
  656. | EP_BBM(sch_ep->burst_mode));
  657. ep_ctx->reserved[1] = cpu_to_le32(EP_BOFFSET(sch_ep->offset)
  658. | EP_BREPEAT(sch_ep->repeat));
  659. xhci_dbg(xhci, " PKTS:%x, CSCOUNT:%x, BM:%x, OFFSET:%x, REPEAT:%x\n",
  660. sch_ep->pkts, sch_ep->cs_count, sch_ep->burst_mode,
  661. sch_ep->offset, sch_ep->repeat);
  662. }
  663. return xhci_check_bandwidth(hcd, udev);
  664. }
  665. EXPORT_SYMBOL_GPL(xhci_mtk_check_bandwidth);
  666. void xhci_mtk_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  667. {
  668. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  669. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  670. struct mu3h_sch_bw_info *sch_bw;
  671. struct mu3h_sch_ep_info *sch_ep, *tmp;
  672. int bw_index;
  673. xhci_dbg(xhci, "%s() udev %s\n", __func__, dev_name(&udev->dev));
  674. list_for_each_entry_safe(sch_ep, tmp, &mtk->bw_ep_chk_list, endpoint) {
  675. bw_index = get_bw_index(xhci, udev, sch_ep->ep);
  676. sch_bw = &mtk->sch_array[bw_index];
  677. destroy_sch_ep(udev, sch_bw, sch_ep);
  678. }
  679. xhci_reset_bandwidth(hcd, udev);
  680. }
  681. EXPORT_SYMBOL_GPL(xhci_mtk_reset_bandwidth);