xhci-histb.c 9.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * xHCI host controller driver for HiSilicon STB SoCs
  4. *
  5. * Copyright (C) 2017-2018 HiSilicon Co., Ltd. http://www.hisilicon.com
  6. *
  7. * Authors: Jianguo Sun <sunjianguo1@huawei.com>
  8. */
  9. #include <linux/clk.h>
  10. #include <linux/dma-mapping.h>
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/reset.h>
  17. #include "xhci.h"
  18. #define GTXTHRCFG 0xc108
  19. #define GRXTHRCFG 0xc10c
  20. #define REG_GUSB2PHYCFG0 0xc200
  21. #define BIT_UTMI_8_16 BIT(3)
  22. #define BIT_UTMI_ULPI BIT(4)
  23. #define BIT_FREECLK_EXIST BIT(30)
  24. #define REG_GUSB3PIPECTL0 0xc2c0
  25. #define USB3_DEEMPHASIS_MASK GENMASK(2, 1)
  26. #define USB3_DEEMPHASIS0 BIT(1)
  27. #define USB3_TX_MARGIN1 BIT(4)
  28. struct xhci_hcd_histb {
  29. struct device *dev;
  30. struct usb_hcd *hcd;
  31. void __iomem *ctrl;
  32. struct clk *bus_clk;
  33. struct clk *utmi_clk;
  34. struct clk *pipe_clk;
  35. struct clk *suspend_clk;
  36. struct reset_control *soft_reset;
  37. };
  38. static inline struct xhci_hcd_histb *hcd_to_histb(struct usb_hcd *hcd)
  39. {
  40. return dev_get_drvdata(hcd->self.controller);
  41. }
  42. static int xhci_histb_config(struct xhci_hcd_histb *histb)
  43. {
  44. struct device_node *np = histb->dev->of_node;
  45. u32 regval;
  46. if (of_property_match_string(np, "phys-names", "inno") >= 0) {
  47. /* USB2 PHY chose ulpi 8bit interface */
  48. regval = readl(histb->ctrl + REG_GUSB2PHYCFG0);
  49. regval &= ~BIT_UTMI_ULPI;
  50. regval &= ~(BIT_UTMI_8_16);
  51. regval &= ~BIT_FREECLK_EXIST;
  52. writel(regval, histb->ctrl + REG_GUSB2PHYCFG0);
  53. }
  54. if (of_property_match_string(np, "phys-names", "combo") >= 0) {
  55. /*
  56. * write 0x010c0012 to GUSB3PIPECTL0
  57. * GUSB3PIPECTL0[5:3] = 010 : Tx Margin = 900mV ,
  58. * decrease TX voltage
  59. * GUSB3PIPECTL0[2:1] = 01 : Tx Deemphasis = -3.5dB,
  60. * refer to xHCI spec
  61. */
  62. regval = readl(histb->ctrl + REG_GUSB3PIPECTL0);
  63. regval &= ~USB3_DEEMPHASIS_MASK;
  64. regval |= USB3_DEEMPHASIS0;
  65. regval |= USB3_TX_MARGIN1;
  66. writel(regval, histb->ctrl + REG_GUSB3PIPECTL0);
  67. }
  68. writel(0x23100000, histb->ctrl + GTXTHRCFG);
  69. writel(0x23100000, histb->ctrl + GRXTHRCFG);
  70. return 0;
  71. }
  72. static int xhci_histb_clks_get(struct xhci_hcd_histb *histb)
  73. {
  74. struct device *dev = histb->dev;
  75. histb->bus_clk = devm_clk_get(dev, "bus");
  76. if (IS_ERR(histb->bus_clk)) {
  77. dev_err(dev, "fail to get bus clk\n");
  78. return PTR_ERR(histb->bus_clk);
  79. }
  80. histb->utmi_clk = devm_clk_get(dev, "utmi");
  81. if (IS_ERR(histb->utmi_clk)) {
  82. dev_err(dev, "fail to get utmi clk\n");
  83. return PTR_ERR(histb->utmi_clk);
  84. }
  85. histb->pipe_clk = devm_clk_get(dev, "pipe");
  86. if (IS_ERR(histb->pipe_clk)) {
  87. dev_err(dev, "fail to get pipe clk\n");
  88. return PTR_ERR(histb->pipe_clk);
  89. }
  90. histb->suspend_clk = devm_clk_get(dev, "suspend");
  91. if (IS_ERR(histb->suspend_clk)) {
  92. dev_err(dev, "fail to get suspend clk\n");
  93. return PTR_ERR(histb->suspend_clk);
  94. }
  95. return 0;
  96. }
  97. static int xhci_histb_host_enable(struct xhci_hcd_histb *histb)
  98. {
  99. int ret;
  100. ret = clk_prepare_enable(histb->bus_clk);
  101. if (ret) {
  102. dev_err(histb->dev, "failed to enable bus clk\n");
  103. return ret;
  104. }
  105. ret = clk_prepare_enable(histb->utmi_clk);
  106. if (ret) {
  107. dev_err(histb->dev, "failed to enable utmi clk\n");
  108. goto err_utmi_clk;
  109. }
  110. ret = clk_prepare_enable(histb->pipe_clk);
  111. if (ret) {
  112. dev_err(histb->dev, "failed to enable pipe clk\n");
  113. goto err_pipe_clk;
  114. }
  115. ret = clk_prepare_enable(histb->suspend_clk);
  116. if (ret) {
  117. dev_err(histb->dev, "failed to enable suspend clk\n");
  118. goto err_suspend_clk;
  119. }
  120. reset_control_deassert(histb->soft_reset);
  121. return 0;
  122. err_suspend_clk:
  123. clk_disable_unprepare(histb->pipe_clk);
  124. err_pipe_clk:
  125. clk_disable_unprepare(histb->utmi_clk);
  126. err_utmi_clk:
  127. clk_disable_unprepare(histb->bus_clk);
  128. return ret;
  129. }
  130. static void xhci_histb_host_disable(struct xhci_hcd_histb *histb)
  131. {
  132. reset_control_assert(histb->soft_reset);
  133. clk_disable_unprepare(histb->suspend_clk);
  134. clk_disable_unprepare(histb->pipe_clk);
  135. clk_disable_unprepare(histb->utmi_clk);
  136. clk_disable_unprepare(histb->bus_clk);
  137. }
  138. static void xhci_histb_quirks(struct device *dev, struct xhci_hcd *xhci)
  139. {
  140. /*
  141. * As of now platform drivers don't provide MSI support so we ensure
  142. * here that the generic code does not try to make a pci_dev from our
  143. * dev struct in order to setup MSI
  144. */
  145. xhci->quirks |= XHCI_PLAT;
  146. }
  147. /* called during probe() after chip reset completes */
  148. static int xhci_histb_setup(struct usb_hcd *hcd)
  149. {
  150. struct xhci_hcd_histb *histb = hcd_to_histb(hcd);
  151. int ret;
  152. if (usb_hcd_is_primary_hcd(hcd)) {
  153. ret = xhci_histb_config(histb);
  154. if (ret)
  155. return ret;
  156. }
  157. return xhci_gen_setup(hcd, xhci_histb_quirks);
  158. }
  159. static const struct xhci_driver_overrides xhci_histb_overrides __initconst = {
  160. .reset = xhci_histb_setup,
  161. };
  162. static struct hc_driver __read_mostly xhci_histb_hc_driver;
  163. static int xhci_histb_probe(struct platform_device *pdev)
  164. {
  165. struct device *dev = &pdev->dev;
  166. struct xhci_hcd_histb *histb;
  167. const struct hc_driver *driver;
  168. struct usb_hcd *hcd;
  169. struct xhci_hcd *xhci;
  170. struct resource *res;
  171. int irq;
  172. int ret = -ENODEV;
  173. if (usb_disabled())
  174. return -ENODEV;
  175. driver = &xhci_histb_hc_driver;
  176. histb = devm_kzalloc(dev, sizeof(*histb), GFP_KERNEL);
  177. if (!histb)
  178. return -ENOMEM;
  179. histb->dev = dev;
  180. irq = platform_get_irq(pdev, 0);
  181. if (irq < 0)
  182. return irq;
  183. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  184. histb->ctrl = devm_ioremap_resource(&pdev->dev, res);
  185. if (IS_ERR(histb->ctrl))
  186. return PTR_ERR(histb->ctrl);
  187. ret = xhci_histb_clks_get(histb);
  188. if (ret)
  189. return ret;
  190. histb->soft_reset = devm_reset_control_get(dev, "soft");
  191. if (IS_ERR(histb->soft_reset)) {
  192. dev_err(dev, "failed to get soft reset\n");
  193. return PTR_ERR(histb->soft_reset);
  194. }
  195. pm_runtime_enable(dev);
  196. pm_runtime_get_sync(dev);
  197. device_enable_async_suspend(dev);
  198. /* Initialize dma_mask and coherent_dma_mask to 32-bits */
  199. ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
  200. if (ret)
  201. goto disable_pm;
  202. hcd = usb_create_hcd(driver, dev, dev_name(dev));
  203. if (!hcd) {
  204. ret = -ENOMEM;
  205. goto disable_pm;
  206. }
  207. hcd->regs = histb->ctrl;
  208. hcd->rsrc_start = res->start;
  209. hcd->rsrc_len = resource_size(res);
  210. histb->hcd = hcd;
  211. dev_set_drvdata(hcd->self.controller, histb);
  212. ret = xhci_histb_host_enable(histb);
  213. if (ret)
  214. goto put_hcd;
  215. xhci = hcd_to_xhci(hcd);
  216. device_wakeup_enable(hcd->self.controller);
  217. xhci->main_hcd = hcd;
  218. xhci->shared_hcd = usb_create_shared_hcd(driver, dev, dev_name(dev),
  219. hcd);
  220. if (!xhci->shared_hcd) {
  221. ret = -ENOMEM;
  222. goto disable_host;
  223. }
  224. if (device_property_read_bool(dev, "usb2-lpm-disable"))
  225. xhci->quirks |= XHCI_HW_LPM_DISABLE;
  226. if (device_property_read_bool(dev, "usb3-lpm-capable"))
  227. xhci->quirks |= XHCI_LPM_SUPPORT;
  228. /* imod_interval is the interrupt moderation value in nanoseconds. */
  229. xhci->imod_interval = 40000;
  230. device_property_read_u32(dev, "imod-interval-ns",
  231. &xhci->imod_interval);
  232. ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
  233. if (ret)
  234. goto put_usb3_hcd;
  235. if (HCC_MAX_PSA(xhci->hcc_params) >= 4)
  236. xhci->shared_hcd->can_do_streams = 1;
  237. ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED);
  238. if (ret)
  239. goto dealloc_usb2_hcd;
  240. device_enable_async_suspend(dev);
  241. pm_runtime_put_noidle(dev);
  242. /*
  243. * Prevent runtime pm from being on as default, users should enable
  244. * runtime pm using power/control in sysfs.
  245. */
  246. pm_runtime_forbid(dev);
  247. return 0;
  248. dealloc_usb2_hcd:
  249. usb_remove_hcd(hcd);
  250. put_usb3_hcd:
  251. usb_put_hcd(xhci->shared_hcd);
  252. disable_host:
  253. xhci_histb_host_disable(histb);
  254. put_hcd:
  255. usb_put_hcd(hcd);
  256. disable_pm:
  257. pm_runtime_put_sync(dev);
  258. pm_runtime_disable(dev);
  259. return ret;
  260. }
  261. static int xhci_histb_remove(struct platform_device *dev)
  262. {
  263. struct xhci_hcd_histb *histb = platform_get_drvdata(dev);
  264. struct usb_hcd *hcd = histb->hcd;
  265. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  266. struct usb_hcd *shared_hcd = xhci->shared_hcd;
  267. xhci->xhc_state |= XHCI_STATE_REMOVING;
  268. usb_remove_hcd(shared_hcd);
  269. xhci->shared_hcd = NULL;
  270. device_wakeup_disable(&dev->dev);
  271. usb_remove_hcd(hcd);
  272. usb_put_hcd(shared_hcd);
  273. xhci_histb_host_disable(histb);
  274. usb_put_hcd(hcd);
  275. pm_runtime_put_sync(&dev->dev);
  276. pm_runtime_disable(&dev->dev);
  277. return 0;
  278. }
  279. static int __maybe_unused xhci_histb_suspend(struct device *dev)
  280. {
  281. struct xhci_hcd_histb *histb = dev_get_drvdata(dev);
  282. struct usb_hcd *hcd = histb->hcd;
  283. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  284. int ret;
  285. ret = xhci_suspend(xhci, device_may_wakeup(dev));
  286. if (!device_may_wakeup(dev))
  287. xhci_histb_host_disable(histb);
  288. return ret;
  289. }
  290. static int __maybe_unused xhci_histb_resume(struct device *dev)
  291. {
  292. struct xhci_hcd_histb *histb = dev_get_drvdata(dev);
  293. struct usb_hcd *hcd = histb->hcd;
  294. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  295. if (!device_may_wakeup(dev))
  296. xhci_histb_host_enable(histb);
  297. return xhci_resume(xhci, 0);
  298. }
  299. static const struct dev_pm_ops xhci_histb_pm_ops = {
  300. SET_SYSTEM_SLEEP_PM_OPS(xhci_histb_suspend, xhci_histb_resume)
  301. };
  302. #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &xhci_histb_pm_ops : NULL)
  303. #ifdef CONFIG_OF
  304. static const struct of_device_id histb_xhci_of_match[] = {
  305. { .compatible = "hisilicon,hi3798cv200-xhci"},
  306. { },
  307. };
  308. MODULE_DEVICE_TABLE(of, histb_xhci_of_match);
  309. #endif
  310. static struct platform_driver histb_xhci_driver = {
  311. .probe = xhci_histb_probe,
  312. .remove = xhci_histb_remove,
  313. .driver = {
  314. .name = "xhci-histb",
  315. .pm = DEV_PM_OPS,
  316. .of_match_table = of_match_ptr(histb_xhci_of_match),
  317. },
  318. };
  319. MODULE_ALIAS("platform:xhci-histb");
  320. static int __init xhci_histb_init(void)
  321. {
  322. xhci_init_driver(&xhci_histb_hc_driver, &xhci_histb_overrides);
  323. return platform_driver_register(&histb_xhci_driver);
  324. }
  325. module_init(xhci_histb_init);
  326. static void __exit xhci_histb_exit(void)
  327. {
  328. platform_driver_unregister(&histb_xhci_driver);
  329. }
  330. module_exit(xhci_histb_exit);
  331. MODULE_DESCRIPTION("HiSilicon STB xHCI Host Controller Driver");
  332. MODULE_LICENSE("GPL v2");