uhci-q.c 46 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Universal Host Controller Interface driver for USB.
  4. *
  5. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  6. *
  7. * (C) Copyright 1999 Linus Torvalds
  8. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  9. * (C) Copyright 1999 Randy Dunlap
  10. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  11. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  12. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  13. * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  14. * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  15. * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  16. * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  17. * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
  18. */
  19. /*
  20. * Technically, updating td->status here is a race, but it's not really a
  21. * problem. The worst that can happen is that we set the IOC bit again
  22. * generating a spurious interrupt. We could fix this by creating another
  23. * QH and leaving the IOC bit always set, but then we would have to play
  24. * games with the FSBR code to make sure we get the correct order in all
  25. * the cases. I don't think it's worth the effort
  26. */
  27. static void uhci_set_next_interrupt(struct uhci_hcd *uhci)
  28. {
  29. if (uhci->is_stopped)
  30. mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
  31. uhci->term_td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
  32. }
  33. static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
  34. {
  35. uhci->term_td->status &= ~cpu_to_hc32(uhci, TD_CTRL_IOC);
  36. }
  37. /*
  38. * Full-Speed Bandwidth Reclamation (FSBR).
  39. * We turn on FSBR whenever a queue that wants it is advancing,
  40. * and leave it on for a short time thereafter.
  41. */
  42. static void uhci_fsbr_on(struct uhci_hcd *uhci)
  43. {
  44. struct uhci_qh *lqh;
  45. /* The terminating skeleton QH always points back to the first
  46. * FSBR QH. Make the last async QH point to the terminating
  47. * skeleton QH. */
  48. uhci->fsbr_is_on = 1;
  49. lqh = list_entry(uhci->skel_async_qh->node.prev,
  50. struct uhci_qh, node);
  51. lqh->link = LINK_TO_QH(uhci, uhci->skel_term_qh);
  52. }
  53. static void uhci_fsbr_off(struct uhci_hcd *uhci)
  54. {
  55. struct uhci_qh *lqh;
  56. /* Remove the link from the last async QH to the terminating
  57. * skeleton QH. */
  58. uhci->fsbr_is_on = 0;
  59. lqh = list_entry(uhci->skel_async_qh->node.prev,
  60. struct uhci_qh, node);
  61. lqh->link = UHCI_PTR_TERM(uhci);
  62. }
  63. static void uhci_add_fsbr(struct uhci_hcd *uhci, struct urb *urb)
  64. {
  65. struct urb_priv *urbp = urb->hcpriv;
  66. urbp->fsbr = 1;
  67. }
  68. static void uhci_urbp_wants_fsbr(struct uhci_hcd *uhci, struct urb_priv *urbp)
  69. {
  70. if (urbp->fsbr) {
  71. uhci->fsbr_is_wanted = 1;
  72. if (!uhci->fsbr_is_on)
  73. uhci_fsbr_on(uhci);
  74. else if (uhci->fsbr_expiring) {
  75. uhci->fsbr_expiring = 0;
  76. del_timer(&uhci->fsbr_timer);
  77. }
  78. }
  79. }
  80. static void uhci_fsbr_timeout(struct timer_list *t)
  81. {
  82. struct uhci_hcd *uhci = from_timer(uhci, t, fsbr_timer);
  83. unsigned long flags;
  84. spin_lock_irqsave(&uhci->lock, flags);
  85. if (uhci->fsbr_expiring) {
  86. uhci->fsbr_expiring = 0;
  87. uhci_fsbr_off(uhci);
  88. }
  89. spin_unlock_irqrestore(&uhci->lock, flags);
  90. }
  91. static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
  92. {
  93. dma_addr_t dma_handle;
  94. struct uhci_td *td;
  95. td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
  96. if (!td)
  97. return NULL;
  98. td->dma_handle = dma_handle;
  99. td->frame = -1;
  100. INIT_LIST_HEAD(&td->list);
  101. INIT_LIST_HEAD(&td->fl_list);
  102. return td;
  103. }
  104. static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
  105. {
  106. if (!list_empty(&td->list))
  107. dev_WARN(uhci_dev(uhci), "td %p still in list!\n", td);
  108. if (!list_empty(&td->fl_list))
  109. dev_WARN(uhci_dev(uhci), "td %p still in fl_list!\n", td);
  110. dma_pool_free(uhci->td_pool, td, td->dma_handle);
  111. }
  112. static inline void uhci_fill_td(struct uhci_hcd *uhci, struct uhci_td *td,
  113. u32 status, u32 token, u32 buffer)
  114. {
  115. td->status = cpu_to_hc32(uhci, status);
  116. td->token = cpu_to_hc32(uhci, token);
  117. td->buffer = cpu_to_hc32(uhci, buffer);
  118. }
  119. static void uhci_add_td_to_urbp(struct uhci_td *td, struct urb_priv *urbp)
  120. {
  121. list_add_tail(&td->list, &urbp->td_list);
  122. }
  123. static void uhci_remove_td_from_urbp(struct uhci_td *td)
  124. {
  125. list_del_init(&td->list);
  126. }
  127. /*
  128. * We insert Isochronous URBs directly into the frame list at the beginning
  129. */
  130. static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci,
  131. struct uhci_td *td, unsigned framenum)
  132. {
  133. framenum &= (UHCI_NUMFRAMES - 1);
  134. td->frame = framenum;
  135. /* Is there a TD already mapped there? */
  136. if (uhci->frame_cpu[framenum]) {
  137. struct uhci_td *ftd, *ltd;
  138. ftd = uhci->frame_cpu[framenum];
  139. ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
  140. list_add_tail(&td->fl_list, &ftd->fl_list);
  141. td->link = ltd->link;
  142. wmb();
  143. ltd->link = LINK_TO_TD(uhci, td);
  144. } else {
  145. td->link = uhci->frame[framenum];
  146. wmb();
  147. uhci->frame[framenum] = LINK_TO_TD(uhci, td);
  148. uhci->frame_cpu[framenum] = td;
  149. }
  150. }
  151. static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci,
  152. struct uhci_td *td)
  153. {
  154. /* If it's not inserted, don't remove it */
  155. if (td->frame == -1) {
  156. WARN_ON(!list_empty(&td->fl_list));
  157. return;
  158. }
  159. if (uhci->frame_cpu[td->frame] == td) {
  160. if (list_empty(&td->fl_list)) {
  161. uhci->frame[td->frame] = td->link;
  162. uhci->frame_cpu[td->frame] = NULL;
  163. } else {
  164. struct uhci_td *ntd;
  165. ntd = list_entry(td->fl_list.next,
  166. struct uhci_td,
  167. fl_list);
  168. uhci->frame[td->frame] = LINK_TO_TD(uhci, ntd);
  169. uhci->frame_cpu[td->frame] = ntd;
  170. }
  171. } else {
  172. struct uhci_td *ptd;
  173. ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
  174. ptd->link = td->link;
  175. }
  176. list_del_init(&td->fl_list);
  177. td->frame = -1;
  178. }
  179. static inline void uhci_remove_tds_from_frame(struct uhci_hcd *uhci,
  180. unsigned int framenum)
  181. {
  182. struct uhci_td *ftd, *ltd;
  183. framenum &= (UHCI_NUMFRAMES - 1);
  184. ftd = uhci->frame_cpu[framenum];
  185. if (ftd) {
  186. ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
  187. uhci->frame[framenum] = ltd->link;
  188. uhci->frame_cpu[framenum] = NULL;
  189. while (!list_empty(&ftd->fl_list))
  190. list_del_init(ftd->fl_list.prev);
  191. }
  192. }
  193. /*
  194. * Remove all the TDs for an Isochronous URB from the frame list
  195. */
  196. static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
  197. {
  198. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  199. struct uhci_td *td;
  200. list_for_each_entry(td, &urbp->td_list, list)
  201. uhci_remove_td_from_frame_list(uhci, td);
  202. }
  203. static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci,
  204. struct usb_device *udev, struct usb_host_endpoint *hep)
  205. {
  206. dma_addr_t dma_handle;
  207. struct uhci_qh *qh;
  208. qh = dma_pool_zalloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
  209. if (!qh)
  210. return NULL;
  211. qh->dma_handle = dma_handle;
  212. qh->element = UHCI_PTR_TERM(uhci);
  213. qh->link = UHCI_PTR_TERM(uhci);
  214. INIT_LIST_HEAD(&qh->queue);
  215. INIT_LIST_HEAD(&qh->node);
  216. if (udev) { /* Normal QH */
  217. qh->type = usb_endpoint_type(&hep->desc);
  218. if (qh->type != USB_ENDPOINT_XFER_ISOC) {
  219. qh->dummy_td = uhci_alloc_td(uhci);
  220. if (!qh->dummy_td) {
  221. dma_pool_free(uhci->qh_pool, qh, dma_handle);
  222. return NULL;
  223. }
  224. }
  225. qh->state = QH_STATE_IDLE;
  226. qh->hep = hep;
  227. qh->udev = udev;
  228. hep->hcpriv = qh;
  229. if (qh->type == USB_ENDPOINT_XFER_INT ||
  230. qh->type == USB_ENDPOINT_XFER_ISOC)
  231. qh->load = usb_calc_bus_time(udev->speed,
  232. usb_endpoint_dir_in(&hep->desc),
  233. qh->type == USB_ENDPOINT_XFER_ISOC,
  234. usb_endpoint_maxp(&hep->desc))
  235. / 1000 + 1;
  236. } else { /* Skeleton QH */
  237. qh->state = QH_STATE_ACTIVE;
  238. qh->type = -1;
  239. }
  240. return qh;
  241. }
  242. static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  243. {
  244. WARN_ON(qh->state != QH_STATE_IDLE && qh->udev);
  245. if (!list_empty(&qh->queue))
  246. dev_WARN(uhci_dev(uhci), "qh %p list not empty!\n", qh);
  247. list_del(&qh->node);
  248. if (qh->udev) {
  249. qh->hep->hcpriv = NULL;
  250. if (qh->dummy_td)
  251. uhci_free_td(uhci, qh->dummy_td);
  252. }
  253. dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
  254. }
  255. /*
  256. * When a queue is stopped and a dequeued URB is given back, adjust
  257. * the previous TD link (if the URB isn't first on the queue) or
  258. * save its toggle value (if it is first and is currently executing).
  259. *
  260. * Returns 0 if the URB should not yet be given back, 1 otherwise.
  261. */
  262. static int uhci_cleanup_queue(struct uhci_hcd *uhci, struct uhci_qh *qh,
  263. struct urb *urb)
  264. {
  265. struct urb_priv *urbp = urb->hcpriv;
  266. struct uhci_td *td;
  267. int ret = 1;
  268. /* Isochronous pipes don't use toggles and their TD link pointers
  269. * get adjusted during uhci_urb_dequeue(). But since their queues
  270. * cannot truly be stopped, we have to watch out for dequeues
  271. * occurring after the nominal unlink frame. */
  272. if (qh->type == USB_ENDPOINT_XFER_ISOC) {
  273. ret = (uhci->frame_number + uhci->is_stopped !=
  274. qh->unlink_frame);
  275. goto done;
  276. }
  277. /* If the URB isn't first on its queue, adjust the link pointer
  278. * of the last TD in the previous URB. The toggle doesn't need
  279. * to be saved since this URB can't be executing yet. */
  280. if (qh->queue.next != &urbp->node) {
  281. struct urb_priv *purbp;
  282. struct uhci_td *ptd;
  283. purbp = list_entry(urbp->node.prev, struct urb_priv, node);
  284. WARN_ON(list_empty(&purbp->td_list));
  285. ptd = list_entry(purbp->td_list.prev, struct uhci_td,
  286. list);
  287. td = list_entry(urbp->td_list.prev, struct uhci_td,
  288. list);
  289. ptd->link = td->link;
  290. goto done;
  291. }
  292. /* If the QH element pointer is UHCI_PTR_TERM then then currently
  293. * executing URB has already been unlinked, so this one isn't it. */
  294. if (qh_element(qh) == UHCI_PTR_TERM(uhci))
  295. goto done;
  296. qh->element = UHCI_PTR_TERM(uhci);
  297. /* Control pipes don't have to worry about toggles */
  298. if (qh->type == USB_ENDPOINT_XFER_CONTROL)
  299. goto done;
  300. /* Save the next toggle value */
  301. WARN_ON(list_empty(&urbp->td_list));
  302. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  303. qh->needs_fixup = 1;
  304. qh->initial_toggle = uhci_toggle(td_token(uhci, td));
  305. done:
  306. return ret;
  307. }
  308. /*
  309. * Fix up the data toggles for URBs in a queue, when one of them
  310. * terminates early (short transfer, error, or dequeued).
  311. */
  312. static void uhci_fixup_toggles(struct uhci_hcd *uhci, struct uhci_qh *qh,
  313. int skip_first)
  314. {
  315. struct urb_priv *urbp = NULL;
  316. struct uhci_td *td;
  317. unsigned int toggle = qh->initial_toggle;
  318. unsigned int pipe;
  319. /* Fixups for a short transfer start with the second URB in the
  320. * queue (the short URB is the first). */
  321. if (skip_first)
  322. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  323. /* When starting with the first URB, if the QH element pointer is
  324. * still valid then we know the URB's toggles are okay. */
  325. else if (qh_element(qh) != UHCI_PTR_TERM(uhci))
  326. toggle = 2;
  327. /* Fix up the toggle for the URBs in the queue. Normally this
  328. * loop won't run more than once: When an error or short transfer
  329. * occurs, the queue usually gets emptied. */
  330. urbp = list_prepare_entry(urbp, &qh->queue, node);
  331. list_for_each_entry_continue(urbp, &qh->queue, node) {
  332. /* If the first TD has the right toggle value, we don't
  333. * need to change any toggles in this URB */
  334. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  335. if (toggle > 1 || uhci_toggle(td_token(uhci, td)) == toggle) {
  336. td = list_entry(urbp->td_list.prev, struct uhci_td,
  337. list);
  338. toggle = uhci_toggle(td_token(uhci, td)) ^ 1;
  339. /* Otherwise all the toggles in the URB have to be switched */
  340. } else {
  341. list_for_each_entry(td, &urbp->td_list, list) {
  342. td->token ^= cpu_to_hc32(uhci,
  343. TD_TOKEN_TOGGLE);
  344. toggle ^= 1;
  345. }
  346. }
  347. }
  348. wmb();
  349. pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe;
  350. usb_settoggle(qh->udev, usb_pipeendpoint(pipe),
  351. usb_pipeout(pipe), toggle);
  352. qh->needs_fixup = 0;
  353. }
  354. /*
  355. * Link an Isochronous QH into its skeleton's list
  356. */
  357. static inline void link_iso(struct uhci_hcd *uhci, struct uhci_qh *qh)
  358. {
  359. list_add_tail(&qh->node, &uhci->skel_iso_qh->node);
  360. /* Isochronous QHs aren't linked by the hardware */
  361. }
  362. /*
  363. * Link a high-period interrupt QH into the schedule at the end of its
  364. * skeleton's list
  365. */
  366. static void link_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
  367. {
  368. struct uhci_qh *pqh;
  369. list_add_tail(&qh->node, &uhci->skelqh[qh->skel]->node);
  370. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  371. qh->link = pqh->link;
  372. wmb();
  373. pqh->link = LINK_TO_QH(uhci, qh);
  374. }
  375. /*
  376. * Link a period-1 interrupt or async QH into the schedule at the
  377. * correct spot in the async skeleton's list, and update the FSBR link
  378. */
  379. static void link_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
  380. {
  381. struct uhci_qh *pqh;
  382. __hc32 link_to_new_qh;
  383. /* Find the predecessor QH for our new one and insert it in the list.
  384. * The list of QHs is expected to be short, so linear search won't
  385. * take too long. */
  386. list_for_each_entry_reverse(pqh, &uhci->skel_async_qh->node, node) {
  387. if (pqh->skel <= qh->skel)
  388. break;
  389. }
  390. list_add(&qh->node, &pqh->node);
  391. /* Link it into the schedule */
  392. qh->link = pqh->link;
  393. wmb();
  394. link_to_new_qh = LINK_TO_QH(uhci, qh);
  395. pqh->link = link_to_new_qh;
  396. /* If this is now the first FSBR QH, link the terminating skeleton
  397. * QH to it. */
  398. if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR)
  399. uhci->skel_term_qh->link = link_to_new_qh;
  400. }
  401. /*
  402. * Put a QH on the schedule in both hardware and software
  403. */
  404. static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  405. {
  406. WARN_ON(list_empty(&qh->queue));
  407. /* Set the element pointer if it isn't set already.
  408. * This isn't needed for Isochronous queues, but it doesn't hurt. */
  409. if (qh_element(qh) == UHCI_PTR_TERM(uhci)) {
  410. struct urb_priv *urbp = list_entry(qh->queue.next,
  411. struct urb_priv, node);
  412. struct uhci_td *td = list_entry(urbp->td_list.next,
  413. struct uhci_td, list);
  414. qh->element = LINK_TO_TD(uhci, td);
  415. }
  416. /* Treat the queue as if it has just advanced */
  417. qh->wait_expired = 0;
  418. qh->advance_jiffies = jiffies;
  419. if (qh->state == QH_STATE_ACTIVE)
  420. return;
  421. qh->state = QH_STATE_ACTIVE;
  422. /* Move the QH from its old list to the correct spot in the appropriate
  423. * skeleton's list */
  424. if (qh == uhci->next_qh)
  425. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  426. node);
  427. list_del(&qh->node);
  428. if (qh->skel == SKEL_ISO)
  429. link_iso(uhci, qh);
  430. else if (qh->skel < SKEL_ASYNC)
  431. link_interrupt(uhci, qh);
  432. else
  433. link_async(uhci, qh);
  434. }
  435. /*
  436. * Unlink a high-period interrupt QH from the schedule
  437. */
  438. static void unlink_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
  439. {
  440. struct uhci_qh *pqh;
  441. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  442. pqh->link = qh->link;
  443. mb();
  444. }
  445. /*
  446. * Unlink a period-1 interrupt or async QH from the schedule
  447. */
  448. static void unlink_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
  449. {
  450. struct uhci_qh *pqh;
  451. __hc32 link_to_next_qh = qh->link;
  452. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  453. pqh->link = link_to_next_qh;
  454. /* If this was the old first FSBR QH, link the terminating skeleton
  455. * QH to the next (new first FSBR) QH. */
  456. if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR)
  457. uhci->skel_term_qh->link = link_to_next_qh;
  458. mb();
  459. }
  460. /*
  461. * Take a QH off the hardware schedule
  462. */
  463. static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  464. {
  465. if (qh->state == QH_STATE_UNLINKING)
  466. return;
  467. WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev);
  468. qh->state = QH_STATE_UNLINKING;
  469. /* Unlink the QH from the schedule and record when we did it */
  470. if (qh->skel == SKEL_ISO)
  471. ;
  472. else if (qh->skel < SKEL_ASYNC)
  473. unlink_interrupt(uhci, qh);
  474. else
  475. unlink_async(uhci, qh);
  476. uhci_get_current_frame_number(uhci);
  477. qh->unlink_frame = uhci->frame_number;
  478. /* Force an interrupt so we know when the QH is fully unlinked */
  479. if (list_empty(&uhci->skel_unlink_qh->node) || uhci->is_stopped)
  480. uhci_set_next_interrupt(uhci);
  481. /* Move the QH from its old list to the end of the unlinking list */
  482. if (qh == uhci->next_qh)
  483. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  484. node);
  485. list_move_tail(&qh->node, &uhci->skel_unlink_qh->node);
  486. }
  487. /*
  488. * When we and the controller are through with a QH, it becomes IDLE.
  489. * This happens when a QH has been off the schedule (on the unlinking
  490. * list) for more than one frame, or when an error occurs while adding
  491. * the first URB onto a new QH.
  492. */
  493. static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh)
  494. {
  495. WARN_ON(qh->state == QH_STATE_ACTIVE);
  496. if (qh == uhci->next_qh)
  497. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  498. node);
  499. list_move(&qh->node, &uhci->idle_qh_list);
  500. qh->state = QH_STATE_IDLE;
  501. /* Now that the QH is idle, its post_td isn't being used */
  502. if (qh->post_td) {
  503. uhci_free_td(uhci, qh->post_td);
  504. qh->post_td = NULL;
  505. }
  506. /* If anyone is waiting for a QH to become idle, wake them up */
  507. if (uhci->num_waiting)
  508. wake_up_all(&uhci->waitqh);
  509. }
  510. /*
  511. * Find the highest existing bandwidth load for a given phase and period.
  512. */
  513. static int uhci_highest_load(struct uhci_hcd *uhci, int phase, int period)
  514. {
  515. int highest_load = uhci->load[phase];
  516. for (phase += period; phase < MAX_PHASE; phase += period)
  517. highest_load = max_t(int, highest_load, uhci->load[phase]);
  518. return highest_load;
  519. }
  520. /*
  521. * Set qh->phase to the optimal phase for a periodic transfer and
  522. * check whether the bandwidth requirement is acceptable.
  523. */
  524. static int uhci_check_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
  525. {
  526. int minimax_load;
  527. /* Find the optimal phase (unless it is already set) and get
  528. * its load value. */
  529. if (qh->phase >= 0)
  530. minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
  531. else {
  532. int phase, load;
  533. int max_phase = min_t(int, MAX_PHASE, qh->period);
  534. qh->phase = 0;
  535. minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
  536. for (phase = 1; phase < max_phase; ++phase) {
  537. load = uhci_highest_load(uhci, phase, qh->period);
  538. if (load < minimax_load) {
  539. minimax_load = load;
  540. qh->phase = phase;
  541. }
  542. }
  543. }
  544. /* Maximum allowable periodic bandwidth is 90%, or 900 us per frame */
  545. if (minimax_load + qh->load > 900) {
  546. dev_dbg(uhci_dev(uhci), "bandwidth allocation failed: "
  547. "period %d, phase %d, %d + %d us\n",
  548. qh->period, qh->phase, minimax_load, qh->load);
  549. return -ENOSPC;
  550. }
  551. return 0;
  552. }
  553. /*
  554. * Reserve a periodic QH's bandwidth in the schedule
  555. */
  556. static void uhci_reserve_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
  557. {
  558. int i;
  559. int load = qh->load;
  560. char *p = "??";
  561. for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
  562. uhci->load[i] += load;
  563. uhci->total_load += load;
  564. }
  565. uhci_to_hcd(uhci)->self.bandwidth_allocated =
  566. uhci->total_load / MAX_PHASE;
  567. switch (qh->type) {
  568. case USB_ENDPOINT_XFER_INT:
  569. ++uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
  570. p = "INT";
  571. break;
  572. case USB_ENDPOINT_XFER_ISOC:
  573. ++uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
  574. p = "ISO";
  575. break;
  576. }
  577. qh->bandwidth_reserved = 1;
  578. dev_dbg(uhci_dev(uhci),
  579. "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
  580. "reserve", qh->udev->devnum,
  581. qh->hep->desc.bEndpointAddress, p,
  582. qh->period, qh->phase, load);
  583. }
  584. /*
  585. * Release a periodic QH's bandwidth reservation
  586. */
  587. static void uhci_release_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
  588. {
  589. int i;
  590. int load = qh->load;
  591. char *p = "??";
  592. for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
  593. uhci->load[i] -= load;
  594. uhci->total_load -= load;
  595. }
  596. uhci_to_hcd(uhci)->self.bandwidth_allocated =
  597. uhci->total_load / MAX_PHASE;
  598. switch (qh->type) {
  599. case USB_ENDPOINT_XFER_INT:
  600. --uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
  601. p = "INT";
  602. break;
  603. case USB_ENDPOINT_XFER_ISOC:
  604. --uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
  605. p = "ISO";
  606. break;
  607. }
  608. qh->bandwidth_reserved = 0;
  609. dev_dbg(uhci_dev(uhci),
  610. "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
  611. "release", qh->udev->devnum,
  612. qh->hep->desc.bEndpointAddress, p,
  613. qh->period, qh->phase, load);
  614. }
  615. static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci,
  616. struct urb *urb)
  617. {
  618. struct urb_priv *urbp;
  619. urbp = kmem_cache_zalloc(uhci_up_cachep, GFP_ATOMIC);
  620. if (!urbp)
  621. return NULL;
  622. urbp->urb = urb;
  623. urb->hcpriv = urbp;
  624. INIT_LIST_HEAD(&urbp->node);
  625. INIT_LIST_HEAD(&urbp->td_list);
  626. return urbp;
  627. }
  628. static void uhci_free_urb_priv(struct uhci_hcd *uhci,
  629. struct urb_priv *urbp)
  630. {
  631. struct uhci_td *td, *tmp;
  632. if (!list_empty(&urbp->node))
  633. dev_WARN(uhci_dev(uhci), "urb %p still on QH's list!\n",
  634. urbp->urb);
  635. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  636. uhci_remove_td_from_urbp(td);
  637. uhci_free_td(uhci, td);
  638. }
  639. kmem_cache_free(uhci_up_cachep, urbp);
  640. }
  641. /*
  642. * Map status to standard result codes
  643. *
  644. * <status> is (td_status(uhci, td) & 0xF60000), a.k.a.
  645. * uhci_status_bits(td_status(uhci, td)).
  646. * Note: <status> does not include the TD_CTRL_NAK bit.
  647. * <dir_out> is True for output TDs and False for input TDs.
  648. */
  649. static int uhci_map_status(int status, int dir_out)
  650. {
  651. if (!status)
  652. return 0;
  653. if (status & TD_CTRL_BITSTUFF) /* Bitstuff error */
  654. return -EPROTO;
  655. if (status & TD_CTRL_CRCTIMEO) { /* CRC/Timeout */
  656. if (dir_out)
  657. return -EPROTO;
  658. else
  659. return -EILSEQ;
  660. }
  661. if (status & TD_CTRL_BABBLE) /* Babble */
  662. return -EOVERFLOW;
  663. if (status & TD_CTRL_DBUFERR) /* Buffer error */
  664. return -ENOSR;
  665. if (status & TD_CTRL_STALLED) /* Stalled */
  666. return -EPIPE;
  667. return 0;
  668. }
  669. /*
  670. * Control transfers
  671. */
  672. static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
  673. struct uhci_qh *qh)
  674. {
  675. struct uhci_td *td;
  676. unsigned long destination, status;
  677. int maxsze = usb_endpoint_maxp(&qh->hep->desc);
  678. int len = urb->transfer_buffer_length;
  679. dma_addr_t data = urb->transfer_dma;
  680. __hc32 *plink;
  681. struct urb_priv *urbp = urb->hcpriv;
  682. int skel;
  683. /* The "pipe" thing contains the destination in bits 8--18 */
  684. destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
  685. /* 3 errors, dummy TD remains inactive */
  686. status = uhci_maxerr(3);
  687. if (urb->dev->speed == USB_SPEED_LOW)
  688. status |= TD_CTRL_LS;
  689. /*
  690. * Build the TD for the control request setup packet
  691. */
  692. td = qh->dummy_td;
  693. uhci_add_td_to_urbp(td, urbp);
  694. uhci_fill_td(uhci, td, status, destination | uhci_explen(8),
  695. urb->setup_dma);
  696. plink = &td->link;
  697. status |= TD_CTRL_ACTIVE;
  698. /*
  699. * If direction is "send", change the packet ID from SETUP (0x2D)
  700. * to OUT (0xE1). Else change it from SETUP to IN (0x69) and
  701. * set Short Packet Detect (SPD) for all data packets.
  702. *
  703. * 0-length transfers always get treated as "send".
  704. */
  705. if (usb_pipeout(urb->pipe) || len == 0)
  706. destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
  707. else {
  708. destination ^= (USB_PID_SETUP ^ USB_PID_IN);
  709. status |= TD_CTRL_SPD;
  710. }
  711. /*
  712. * Build the DATA TDs
  713. */
  714. while (len > 0) {
  715. int pktsze = maxsze;
  716. if (len <= pktsze) { /* The last data packet */
  717. pktsze = len;
  718. status &= ~TD_CTRL_SPD;
  719. }
  720. td = uhci_alloc_td(uhci);
  721. if (!td)
  722. goto nomem;
  723. *plink = LINK_TO_TD(uhci, td);
  724. /* Alternate Data0/1 (start with Data1) */
  725. destination ^= TD_TOKEN_TOGGLE;
  726. uhci_add_td_to_urbp(td, urbp);
  727. uhci_fill_td(uhci, td, status,
  728. destination | uhci_explen(pktsze), data);
  729. plink = &td->link;
  730. data += pktsze;
  731. len -= pktsze;
  732. }
  733. /*
  734. * Build the final TD for control status
  735. */
  736. td = uhci_alloc_td(uhci);
  737. if (!td)
  738. goto nomem;
  739. *plink = LINK_TO_TD(uhci, td);
  740. /* Change direction for the status transaction */
  741. destination ^= (USB_PID_IN ^ USB_PID_OUT);
  742. destination |= TD_TOKEN_TOGGLE; /* End in Data1 */
  743. uhci_add_td_to_urbp(td, urbp);
  744. uhci_fill_td(uhci, td, status | TD_CTRL_IOC,
  745. destination | uhci_explen(0), 0);
  746. plink = &td->link;
  747. /*
  748. * Build the new dummy TD and activate the old one
  749. */
  750. td = uhci_alloc_td(uhci);
  751. if (!td)
  752. goto nomem;
  753. *plink = LINK_TO_TD(uhci, td);
  754. uhci_fill_td(uhci, td, 0, USB_PID_OUT | uhci_explen(0), 0);
  755. wmb();
  756. qh->dummy_td->status |= cpu_to_hc32(uhci, TD_CTRL_ACTIVE);
  757. qh->dummy_td = td;
  758. /* Low-speed transfers get a different queue, and won't hog the bus.
  759. * Also, some devices enumerate better without FSBR; the easiest way
  760. * to do that is to put URBs on the low-speed queue while the device
  761. * isn't in the CONFIGURED state. */
  762. if (urb->dev->speed == USB_SPEED_LOW ||
  763. urb->dev->state != USB_STATE_CONFIGURED)
  764. skel = SKEL_LS_CONTROL;
  765. else {
  766. skel = SKEL_FS_CONTROL;
  767. uhci_add_fsbr(uhci, urb);
  768. }
  769. if (qh->state != QH_STATE_ACTIVE)
  770. qh->skel = skel;
  771. return 0;
  772. nomem:
  773. /* Remove the dummy TD from the td_list so it doesn't get freed */
  774. uhci_remove_td_from_urbp(qh->dummy_td);
  775. return -ENOMEM;
  776. }
  777. /*
  778. * Common submit for bulk and interrupt
  779. */
  780. static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
  781. struct uhci_qh *qh)
  782. {
  783. struct uhci_td *td;
  784. unsigned long destination, status;
  785. int maxsze = usb_endpoint_maxp(&qh->hep->desc);
  786. int len = urb->transfer_buffer_length;
  787. int this_sg_len;
  788. dma_addr_t data;
  789. __hc32 *plink;
  790. struct urb_priv *urbp = urb->hcpriv;
  791. unsigned int toggle;
  792. struct scatterlist *sg;
  793. int i;
  794. if (len < 0)
  795. return -EINVAL;
  796. /* The "pipe" thing contains the destination in bits 8--18 */
  797. destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
  798. toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  799. usb_pipeout(urb->pipe));
  800. /* 3 errors, dummy TD remains inactive */
  801. status = uhci_maxerr(3);
  802. if (urb->dev->speed == USB_SPEED_LOW)
  803. status |= TD_CTRL_LS;
  804. if (usb_pipein(urb->pipe))
  805. status |= TD_CTRL_SPD;
  806. i = urb->num_mapped_sgs;
  807. if (len > 0 && i > 0) {
  808. sg = urb->sg;
  809. data = sg_dma_address(sg);
  810. /* urb->transfer_buffer_length may be smaller than the
  811. * size of the scatterlist (or vice versa)
  812. */
  813. this_sg_len = min_t(int, sg_dma_len(sg), len);
  814. } else {
  815. sg = NULL;
  816. data = urb->transfer_dma;
  817. this_sg_len = len;
  818. }
  819. /*
  820. * Build the DATA TDs
  821. */
  822. plink = NULL;
  823. td = qh->dummy_td;
  824. for (;;) { /* Allow zero length packets */
  825. int pktsze = maxsze;
  826. if (len <= pktsze) { /* The last packet */
  827. pktsze = len;
  828. if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
  829. status &= ~TD_CTRL_SPD;
  830. }
  831. if (plink) {
  832. td = uhci_alloc_td(uhci);
  833. if (!td)
  834. goto nomem;
  835. *plink = LINK_TO_TD(uhci, td);
  836. }
  837. uhci_add_td_to_urbp(td, urbp);
  838. uhci_fill_td(uhci, td, status,
  839. destination | uhci_explen(pktsze) |
  840. (toggle << TD_TOKEN_TOGGLE_SHIFT),
  841. data);
  842. plink = &td->link;
  843. status |= TD_CTRL_ACTIVE;
  844. toggle ^= 1;
  845. data += pktsze;
  846. this_sg_len -= pktsze;
  847. len -= maxsze;
  848. if (this_sg_len <= 0) {
  849. if (--i <= 0 || len <= 0)
  850. break;
  851. sg = sg_next(sg);
  852. data = sg_dma_address(sg);
  853. this_sg_len = min_t(int, sg_dma_len(sg), len);
  854. }
  855. }
  856. /*
  857. * URB_ZERO_PACKET means adding a 0-length packet, if direction
  858. * is OUT and the transfer_length was an exact multiple of maxsze,
  859. * hence (len = transfer_length - N * maxsze) == 0
  860. * however, if transfer_length == 0, the zero packet was already
  861. * prepared above.
  862. */
  863. if ((urb->transfer_flags & URB_ZERO_PACKET) &&
  864. usb_pipeout(urb->pipe) && len == 0 &&
  865. urb->transfer_buffer_length > 0) {
  866. td = uhci_alloc_td(uhci);
  867. if (!td)
  868. goto nomem;
  869. *plink = LINK_TO_TD(uhci, td);
  870. uhci_add_td_to_urbp(td, urbp);
  871. uhci_fill_td(uhci, td, status,
  872. destination | uhci_explen(0) |
  873. (toggle << TD_TOKEN_TOGGLE_SHIFT),
  874. data);
  875. plink = &td->link;
  876. toggle ^= 1;
  877. }
  878. /* Set the interrupt-on-completion flag on the last packet.
  879. * A more-or-less typical 4 KB URB (= size of one memory page)
  880. * will require about 3 ms to transfer; that's a little on the
  881. * fast side but not enough to justify delaying an interrupt
  882. * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
  883. * flag setting. */
  884. td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
  885. /*
  886. * Build the new dummy TD and activate the old one
  887. */
  888. td = uhci_alloc_td(uhci);
  889. if (!td)
  890. goto nomem;
  891. *plink = LINK_TO_TD(uhci, td);
  892. uhci_fill_td(uhci, td, 0, USB_PID_OUT | uhci_explen(0), 0);
  893. wmb();
  894. qh->dummy_td->status |= cpu_to_hc32(uhci, TD_CTRL_ACTIVE);
  895. qh->dummy_td = td;
  896. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  897. usb_pipeout(urb->pipe), toggle);
  898. return 0;
  899. nomem:
  900. /* Remove the dummy TD from the td_list so it doesn't get freed */
  901. uhci_remove_td_from_urbp(qh->dummy_td);
  902. return -ENOMEM;
  903. }
  904. static int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb,
  905. struct uhci_qh *qh)
  906. {
  907. int ret;
  908. /* Can't have low-speed bulk transfers */
  909. if (urb->dev->speed == USB_SPEED_LOW)
  910. return -EINVAL;
  911. if (qh->state != QH_STATE_ACTIVE)
  912. qh->skel = SKEL_BULK;
  913. ret = uhci_submit_common(uhci, urb, qh);
  914. if (ret == 0)
  915. uhci_add_fsbr(uhci, urb);
  916. return ret;
  917. }
  918. static int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb,
  919. struct uhci_qh *qh)
  920. {
  921. int ret;
  922. /* USB 1.1 interrupt transfers only involve one packet per interval.
  923. * Drivers can submit URBs of any length, but longer ones will need
  924. * multiple intervals to complete.
  925. */
  926. if (!qh->bandwidth_reserved) {
  927. int exponent;
  928. /* Figure out which power-of-two queue to use */
  929. for (exponent = 7; exponent >= 0; --exponent) {
  930. if ((1 << exponent) <= urb->interval)
  931. break;
  932. }
  933. if (exponent < 0)
  934. return -EINVAL;
  935. /* If the slot is full, try a lower period */
  936. do {
  937. qh->period = 1 << exponent;
  938. qh->skel = SKEL_INDEX(exponent);
  939. /* For now, interrupt phase is fixed by the layout
  940. * of the QH lists.
  941. */
  942. qh->phase = (qh->period / 2) & (MAX_PHASE - 1);
  943. ret = uhci_check_bandwidth(uhci, qh);
  944. } while (ret != 0 && --exponent >= 0);
  945. if (ret)
  946. return ret;
  947. } else if (qh->period > urb->interval)
  948. return -EINVAL; /* Can't decrease the period */
  949. ret = uhci_submit_common(uhci, urb, qh);
  950. if (ret == 0) {
  951. urb->interval = qh->period;
  952. if (!qh->bandwidth_reserved)
  953. uhci_reserve_bandwidth(uhci, qh);
  954. }
  955. return ret;
  956. }
  957. /*
  958. * Fix up the data structures following a short transfer
  959. */
  960. static int uhci_fixup_short_transfer(struct uhci_hcd *uhci,
  961. struct uhci_qh *qh, struct urb_priv *urbp)
  962. {
  963. struct uhci_td *td;
  964. struct list_head *tmp;
  965. int ret;
  966. td = list_entry(urbp->td_list.prev, struct uhci_td, list);
  967. if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
  968. /* When a control transfer is short, we have to restart
  969. * the queue at the status stage transaction, which is
  970. * the last TD. */
  971. WARN_ON(list_empty(&urbp->td_list));
  972. qh->element = LINK_TO_TD(uhci, td);
  973. tmp = td->list.prev;
  974. ret = -EINPROGRESS;
  975. } else {
  976. /* When a bulk/interrupt transfer is short, we have to
  977. * fix up the toggles of the following URBs on the queue
  978. * before restarting the queue at the next URB. */
  979. qh->initial_toggle =
  980. uhci_toggle(td_token(uhci, qh->post_td)) ^ 1;
  981. uhci_fixup_toggles(uhci, qh, 1);
  982. if (list_empty(&urbp->td_list))
  983. td = qh->post_td;
  984. qh->element = td->link;
  985. tmp = urbp->td_list.prev;
  986. ret = 0;
  987. }
  988. /* Remove all the TDs we skipped over, from tmp back to the start */
  989. while (tmp != &urbp->td_list) {
  990. td = list_entry(tmp, struct uhci_td, list);
  991. tmp = tmp->prev;
  992. uhci_remove_td_from_urbp(td);
  993. uhci_free_td(uhci, td);
  994. }
  995. return ret;
  996. }
  997. /*
  998. * Common result for control, bulk, and interrupt
  999. */
  1000. static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
  1001. {
  1002. struct urb_priv *urbp = urb->hcpriv;
  1003. struct uhci_qh *qh = urbp->qh;
  1004. struct uhci_td *td, *tmp;
  1005. unsigned status;
  1006. int ret = 0;
  1007. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  1008. unsigned int ctrlstat;
  1009. int len;
  1010. ctrlstat = td_status(uhci, td);
  1011. status = uhci_status_bits(ctrlstat);
  1012. if (status & TD_CTRL_ACTIVE)
  1013. return -EINPROGRESS;
  1014. len = uhci_actual_length(ctrlstat);
  1015. urb->actual_length += len;
  1016. if (status) {
  1017. ret = uhci_map_status(status,
  1018. uhci_packetout(td_token(uhci, td)));
  1019. if ((debug == 1 && ret != -EPIPE) || debug > 1) {
  1020. /* Some debugging code */
  1021. dev_dbg(&urb->dev->dev,
  1022. "%s: failed with status %x\n",
  1023. __func__, status);
  1024. if (debug > 1 && errbuf) {
  1025. /* Print the chain for debugging */
  1026. uhci_show_qh(uhci, urbp->qh, errbuf,
  1027. ERRBUF_LEN - EXTRA_SPACE, 0);
  1028. lprintk(errbuf);
  1029. }
  1030. }
  1031. /* Did we receive a short packet? */
  1032. } else if (len < uhci_expected_length(td_token(uhci, td))) {
  1033. /* For control transfers, go to the status TD if
  1034. * this isn't already the last data TD */
  1035. if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
  1036. if (td->list.next != urbp->td_list.prev)
  1037. ret = 1;
  1038. }
  1039. /* For bulk and interrupt, this may be an error */
  1040. else if (urb->transfer_flags & URB_SHORT_NOT_OK)
  1041. ret = -EREMOTEIO;
  1042. /* Fixup needed only if this isn't the URB's last TD */
  1043. else if (&td->list != urbp->td_list.prev)
  1044. ret = 1;
  1045. }
  1046. uhci_remove_td_from_urbp(td);
  1047. if (qh->post_td)
  1048. uhci_free_td(uhci, qh->post_td);
  1049. qh->post_td = td;
  1050. if (ret != 0)
  1051. goto err;
  1052. }
  1053. return ret;
  1054. err:
  1055. if (ret < 0) {
  1056. /* Note that the queue has stopped and save
  1057. * the next toggle value */
  1058. qh->element = UHCI_PTR_TERM(uhci);
  1059. qh->is_stopped = 1;
  1060. qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL);
  1061. qh->initial_toggle = uhci_toggle(td_token(uhci, td)) ^
  1062. (ret == -EREMOTEIO);
  1063. } else /* Short packet received */
  1064. ret = uhci_fixup_short_transfer(uhci, qh, urbp);
  1065. return ret;
  1066. }
  1067. /*
  1068. * Isochronous transfers
  1069. */
  1070. static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb,
  1071. struct uhci_qh *qh)
  1072. {
  1073. struct uhci_td *td = NULL; /* Since urb->number_of_packets > 0 */
  1074. int i;
  1075. unsigned frame, next;
  1076. unsigned long destination, status;
  1077. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  1078. /* Values must not be too big (could overflow below) */
  1079. if (urb->interval >= UHCI_NUMFRAMES ||
  1080. urb->number_of_packets >= UHCI_NUMFRAMES)
  1081. return -EFBIG;
  1082. uhci_get_current_frame_number(uhci);
  1083. /* Check the period and figure out the starting frame number */
  1084. if (!qh->bandwidth_reserved) {
  1085. qh->period = urb->interval;
  1086. qh->phase = -1; /* Find the best phase */
  1087. i = uhci_check_bandwidth(uhci, qh);
  1088. if (i)
  1089. return i;
  1090. /* Allow a little time to allocate the TDs */
  1091. next = uhci->frame_number + 10;
  1092. frame = qh->phase;
  1093. /* Round up to the first available slot */
  1094. frame += (next - frame + qh->period - 1) & -qh->period;
  1095. } else if (qh->period != urb->interval) {
  1096. return -EINVAL; /* Can't change the period */
  1097. } else {
  1098. next = uhci->frame_number + 1;
  1099. /* Find the next unused frame */
  1100. if (list_empty(&qh->queue)) {
  1101. frame = qh->iso_frame;
  1102. } else {
  1103. struct urb *lurb;
  1104. lurb = list_entry(qh->queue.prev,
  1105. struct urb_priv, node)->urb;
  1106. frame = lurb->start_frame +
  1107. lurb->number_of_packets *
  1108. lurb->interval;
  1109. }
  1110. /* Fell behind? */
  1111. if (!uhci_frame_before_eq(next, frame)) {
  1112. /* USB_ISO_ASAP: Round up to the first available slot */
  1113. if (urb->transfer_flags & URB_ISO_ASAP)
  1114. frame += (next - frame + qh->period - 1) &
  1115. -qh->period;
  1116. /*
  1117. * Not ASAP: Use the next slot in the stream,
  1118. * no matter what.
  1119. */
  1120. else if (!uhci_frame_before_eq(next,
  1121. frame + (urb->number_of_packets - 1) *
  1122. qh->period))
  1123. dev_dbg(uhci_dev(uhci), "iso underrun %p (%u+%u < %u)\n",
  1124. urb, frame,
  1125. (urb->number_of_packets - 1) *
  1126. qh->period,
  1127. next);
  1128. }
  1129. }
  1130. /* Make sure we won't have to go too far into the future */
  1131. if (uhci_frame_before_eq(uhci->last_iso_frame + UHCI_NUMFRAMES,
  1132. frame + urb->number_of_packets * urb->interval))
  1133. return -EFBIG;
  1134. urb->start_frame = frame;
  1135. status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
  1136. destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
  1137. for (i = 0; i < urb->number_of_packets; i++) {
  1138. td = uhci_alloc_td(uhci);
  1139. if (!td)
  1140. return -ENOMEM;
  1141. uhci_add_td_to_urbp(td, urbp);
  1142. uhci_fill_td(uhci, td, status, destination |
  1143. uhci_explen(urb->iso_frame_desc[i].length),
  1144. urb->transfer_dma +
  1145. urb->iso_frame_desc[i].offset);
  1146. }
  1147. /* Set the interrupt-on-completion flag on the last packet. */
  1148. td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
  1149. /* Add the TDs to the frame list */
  1150. frame = urb->start_frame;
  1151. list_for_each_entry(td, &urbp->td_list, list) {
  1152. uhci_insert_td_in_frame_list(uhci, td, frame);
  1153. frame += qh->period;
  1154. }
  1155. if (list_empty(&qh->queue)) {
  1156. qh->iso_packet_desc = &urb->iso_frame_desc[0];
  1157. qh->iso_frame = urb->start_frame;
  1158. }
  1159. qh->skel = SKEL_ISO;
  1160. if (!qh->bandwidth_reserved)
  1161. uhci_reserve_bandwidth(uhci, qh);
  1162. return 0;
  1163. }
  1164. static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
  1165. {
  1166. struct uhci_td *td, *tmp;
  1167. struct urb_priv *urbp = urb->hcpriv;
  1168. struct uhci_qh *qh = urbp->qh;
  1169. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  1170. unsigned int ctrlstat;
  1171. int status;
  1172. int actlength;
  1173. if (uhci_frame_before_eq(uhci->cur_iso_frame, qh->iso_frame))
  1174. return -EINPROGRESS;
  1175. uhci_remove_tds_from_frame(uhci, qh->iso_frame);
  1176. ctrlstat = td_status(uhci, td);
  1177. if (ctrlstat & TD_CTRL_ACTIVE) {
  1178. status = -EXDEV; /* TD was added too late? */
  1179. } else {
  1180. status = uhci_map_status(uhci_status_bits(ctrlstat),
  1181. usb_pipeout(urb->pipe));
  1182. actlength = uhci_actual_length(ctrlstat);
  1183. urb->actual_length += actlength;
  1184. qh->iso_packet_desc->actual_length = actlength;
  1185. qh->iso_packet_desc->status = status;
  1186. }
  1187. if (status)
  1188. urb->error_count++;
  1189. uhci_remove_td_from_urbp(td);
  1190. uhci_free_td(uhci, td);
  1191. qh->iso_frame += qh->period;
  1192. ++qh->iso_packet_desc;
  1193. }
  1194. return 0;
  1195. }
  1196. static int uhci_urb_enqueue(struct usb_hcd *hcd,
  1197. struct urb *urb, gfp_t mem_flags)
  1198. {
  1199. int ret;
  1200. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  1201. unsigned long flags;
  1202. struct urb_priv *urbp;
  1203. struct uhci_qh *qh;
  1204. spin_lock_irqsave(&uhci->lock, flags);
  1205. ret = usb_hcd_link_urb_to_ep(hcd, urb);
  1206. if (ret)
  1207. goto done_not_linked;
  1208. ret = -ENOMEM;
  1209. urbp = uhci_alloc_urb_priv(uhci, urb);
  1210. if (!urbp)
  1211. goto done;
  1212. if (urb->ep->hcpriv)
  1213. qh = urb->ep->hcpriv;
  1214. else {
  1215. qh = uhci_alloc_qh(uhci, urb->dev, urb->ep);
  1216. if (!qh)
  1217. goto err_no_qh;
  1218. }
  1219. urbp->qh = qh;
  1220. switch (qh->type) {
  1221. case USB_ENDPOINT_XFER_CONTROL:
  1222. ret = uhci_submit_control(uhci, urb, qh);
  1223. break;
  1224. case USB_ENDPOINT_XFER_BULK:
  1225. ret = uhci_submit_bulk(uhci, urb, qh);
  1226. break;
  1227. case USB_ENDPOINT_XFER_INT:
  1228. ret = uhci_submit_interrupt(uhci, urb, qh);
  1229. break;
  1230. case USB_ENDPOINT_XFER_ISOC:
  1231. urb->error_count = 0;
  1232. ret = uhci_submit_isochronous(uhci, urb, qh);
  1233. break;
  1234. }
  1235. if (ret != 0)
  1236. goto err_submit_failed;
  1237. /* Add this URB to the QH */
  1238. list_add_tail(&urbp->node, &qh->queue);
  1239. /* If the new URB is the first and only one on this QH then either
  1240. * the QH is new and idle or else it's unlinked and waiting to
  1241. * become idle, so we can activate it right away. But only if the
  1242. * queue isn't stopped. */
  1243. if (qh->queue.next == &urbp->node && !qh->is_stopped) {
  1244. uhci_activate_qh(uhci, qh);
  1245. uhci_urbp_wants_fsbr(uhci, urbp);
  1246. }
  1247. goto done;
  1248. err_submit_failed:
  1249. if (qh->state == QH_STATE_IDLE)
  1250. uhci_make_qh_idle(uhci, qh); /* Reclaim unused QH */
  1251. err_no_qh:
  1252. uhci_free_urb_priv(uhci, urbp);
  1253. done:
  1254. if (ret)
  1255. usb_hcd_unlink_urb_from_ep(hcd, urb);
  1256. done_not_linked:
  1257. spin_unlock_irqrestore(&uhci->lock, flags);
  1258. return ret;
  1259. }
  1260. static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  1261. {
  1262. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  1263. unsigned long flags;
  1264. struct uhci_qh *qh;
  1265. int rc;
  1266. spin_lock_irqsave(&uhci->lock, flags);
  1267. rc = usb_hcd_check_unlink_urb(hcd, urb, status);
  1268. if (rc)
  1269. goto done;
  1270. qh = ((struct urb_priv *) urb->hcpriv)->qh;
  1271. /* Remove Isochronous TDs from the frame list ASAP */
  1272. if (qh->type == USB_ENDPOINT_XFER_ISOC) {
  1273. uhci_unlink_isochronous_tds(uhci, urb);
  1274. mb();
  1275. /* If the URB has already started, update the QH unlink time */
  1276. uhci_get_current_frame_number(uhci);
  1277. if (uhci_frame_before_eq(urb->start_frame, uhci->frame_number))
  1278. qh->unlink_frame = uhci->frame_number;
  1279. }
  1280. uhci_unlink_qh(uhci, qh);
  1281. done:
  1282. spin_unlock_irqrestore(&uhci->lock, flags);
  1283. return rc;
  1284. }
  1285. /*
  1286. * Finish unlinking an URB and give it back
  1287. */
  1288. static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh,
  1289. struct urb *urb, int status)
  1290. __releases(uhci->lock)
  1291. __acquires(uhci->lock)
  1292. {
  1293. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  1294. if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
  1295. /* Subtract off the length of the SETUP packet from
  1296. * urb->actual_length.
  1297. */
  1298. urb->actual_length -= min_t(u32, 8, urb->actual_length);
  1299. }
  1300. /* When giving back the first URB in an Isochronous queue,
  1301. * reinitialize the QH's iso-related members for the next URB. */
  1302. else if (qh->type == USB_ENDPOINT_XFER_ISOC &&
  1303. urbp->node.prev == &qh->queue &&
  1304. urbp->node.next != &qh->queue) {
  1305. struct urb *nurb = list_entry(urbp->node.next,
  1306. struct urb_priv, node)->urb;
  1307. qh->iso_packet_desc = &nurb->iso_frame_desc[0];
  1308. qh->iso_frame = nurb->start_frame;
  1309. }
  1310. /* Take the URB off the QH's queue. If the queue is now empty,
  1311. * this is a perfect time for a toggle fixup. */
  1312. list_del_init(&urbp->node);
  1313. if (list_empty(&qh->queue) && qh->needs_fixup) {
  1314. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  1315. usb_pipeout(urb->pipe), qh->initial_toggle);
  1316. qh->needs_fixup = 0;
  1317. }
  1318. uhci_free_urb_priv(uhci, urbp);
  1319. usb_hcd_unlink_urb_from_ep(uhci_to_hcd(uhci), urb);
  1320. spin_unlock(&uhci->lock);
  1321. usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb, status);
  1322. spin_lock(&uhci->lock);
  1323. /* If the queue is now empty, we can unlink the QH and give up its
  1324. * reserved bandwidth. */
  1325. if (list_empty(&qh->queue)) {
  1326. uhci_unlink_qh(uhci, qh);
  1327. if (qh->bandwidth_reserved)
  1328. uhci_release_bandwidth(uhci, qh);
  1329. }
  1330. }
  1331. /*
  1332. * Scan the URBs in a QH's queue
  1333. */
  1334. #define QH_FINISHED_UNLINKING(qh) \
  1335. (qh->state == QH_STATE_UNLINKING && \
  1336. uhci->frame_number + uhci->is_stopped != qh->unlink_frame)
  1337. static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  1338. {
  1339. struct urb_priv *urbp;
  1340. struct urb *urb;
  1341. int status;
  1342. while (!list_empty(&qh->queue)) {
  1343. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1344. urb = urbp->urb;
  1345. if (qh->type == USB_ENDPOINT_XFER_ISOC)
  1346. status = uhci_result_isochronous(uhci, urb);
  1347. else
  1348. status = uhci_result_common(uhci, urb);
  1349. if (status == -EINPROGRESS)
  1350. break;
  1351. /* Dequeued but completed URBs can't be given back unless
  1352. * the QH is stopped or has finished unlinking. */
  1353. if (urb->unlinked) {
  1354. if (QH_FINISHED_UNLINKING(qh))
  1355. qh->is_stopped = 1;
  1356. else if (!qh->is_stopped)
  1357. return;
  1358. }
  1359. uhci_giveback_urb(uhci, qh, urb, status);
  1360. if (status < 0)
  1361. break;
  1362. }
  1363. /* If the QH is neither stopped nor finished unlinking (normal case),
  1364. * our work here is done. */
  1365. if (QH_FINISHED_UNLINKING(qh))
  1366. qh->is_stopped = 1;
  1367. else if (!qh->is_stopped)
  1368. return;
  1369. /* Otherwise give back each of the dequeued URBs */
  1370. restart:
  1371. list_for_each_entry(urbp, &qh->queue, node) {
  1372. urb = urbp->urb;
  1373. if (urb->unlinked) {
  1374. /* Fix up the TD links and save the toggles for
  1375. * non-Isochronous queues. For Isochronous queues,
  1376. * test for too-recent dequeues. */
  1377. if (!uhci_cleanup_queue(uhci, qh, urb)) {
  1378. qh->is_stopped = 0;
  1379. return;
  1380. }
  1381. uhci_giveback_urb(uhci, qh, urb, 0);
  1382. goto restart;
  1383. }
  1384. }
  1385. qh->is_stopped = 0;
  1386. /* There are no more dequeued URBs. If there are still URBs on the
  1387. * queue, the QH can now be re-activated. */
  1388. if (!list_empty(&qh->queue)) {
  1389. if (qh->needs_fixup)
  1390. uhci_fixup_toggles(uhci, qh, 0);
  1391. /* If the first URB on the queue wants FSBR but its time
  1392. * limit has expired, set the next TD to interrupt on
  1393. * completion before reactivating the QH. */
  1394. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1395. if (urbp->fsbr && qh->wait_expired) {
  1396. struct uhci_td *td = list_entry(urbp->td_list.next,
  1397. struct uhci_td, list);
  1398. td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
  1399. }
  1400. uhci_activate_qh(uhci, qh);
  1401. }
  1402. /* The queue is empty. The QH can become idle if it is fully
  1403. * unlinked. */
  1404. else if (QH_FINISHED_UNLINKING(qh))
  1405. uhci_make_qh_idle(uhci, qh);
  1406. }
  1407. /*
  1408. * Check for queues that have made some forward progress.
  1409. * Returns 0 if the queue is not Isochronous, is ACTIVE, and
  1410. * has not advanced since last examined; 1 otherwise.
  1411. *
  1412. * Early Intel controllers have a bug which causes qh->element sometimes
  1413. * not to advance when a TD completes successfully. The queue remains
  1414. * stuck on the inactive completed TD. We detect such cases and advance
  1415. * the element pointer by hand.
  1416. */
  1417. static int uhci_advance_check(struct uhci_hcd *uhci, struct uhci_qh *qh)
  1418. {
  1419. struct urb_priv *urbp = NULL;
  1420. struct uhci_td *td;
  1421. int ret = 1;
  1422. unsigned status;
  1423. if (qh->type == USB_ENDPOINT_XFER_ISOC)
  1424. goto done;
  1425. /* Treat an UNLINKING queue as though it hasn't advanced.
  1426. * This is okay because reactivation will treat it as though
  1427. * it has advanced, and if it is going to become IDLE then
  1428. * this doesn't matter anyway. Furthermore it's possible
  1429. * for an UNLINKING queue not to have any URBs at all, or
  1430. * for its first URB not to have any TDs (if it was dequeued
  1431. * just as it completed). So it's not easy in any case to
  1432. * test whether such queues have advanced. */
  1433. if (qh->state != QH_STATE_ACTIVE) {
  1434. urbp = NULL;
  1435. status = 0;
  1436. } else {
  1437. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1438. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  1439. status = td_status(uhci, td);
  1440. if (!(status & TD_CTRL_ACTIVE)) {
  1441. /* We're okay, the queue has advanced */
  1442. qh->wait_expired = 0;
  1443. qh->advance_jiffies = jiffies;
  1444. goto done;
  1445. }
  1446. ret = uhci->is_stopped;
  1447. }
  1448. /* The queue hasn't advanced; check for timeout */
  1449. if (qh->wait_expired)
  1450. goto done;
  1451. if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) {
  1452. /* Detect the Intel bug and work around it */
  1453. if (qh->post_td && qh_element(qh) ==
  1454. LINK_TO_TD(uhci, qh->post_td)) {
  1455. qh->element = qh->post_td->link;
  1456. qh->advance_jiffies = jiffies;
  1457. ret = 1;
  1458. goto done;
  1459. }
  1460. qh->wait_expired = 1;
  1461. /* If the current URB wants FSBR, unlink it temporarily
  1462. * so that we can safely set the next TD to interrupt on
  1463. * completion. That way we'll know as soon as the queue
  1464. * starts moving again. */
  1465. if (urbp && urbp->fsbr && !(status & TD_CTRL_IOC))
  1466. uhci_unlink_qh(uhci, qh);
  1467. } else {
  1468. /* Unmoving but not-yet-expired queues keep FSBR alive */
  1469. if (urbp)
  1470. uhci_urbp_wants_fsbr(uhci, urbp);
  1471. }
  1472. done:
  1473. return ret;
  1474. }
  1475. /*
  1476. * Process events in the schedule, but only in one thread at a time
  1477. */
  1478. static void uhci_scan_schedule(struct uhci_hcd *uhci)
  1479. {
  1480. int i;
  1481. struct uhci_qh *qh;
  1482. /* Don't allow re-entrant calls */
  1483. if (uhci->scan_in_progress) {
  1484. uhci->need_rescan = 1;
  1485. return;
  1486. }
  1487. uhci->scan_in_progress = 1;
  1488. rescan:
  1489. uhci->need_rescan = 0;
  1490. uhci->fsbr_is_wanted = 0;
  1491. uhci_clear_next_interrupt(uhci);
  1492. uhci_get_current_frame_number(uhci);
  1493. uhci->cur_iso_frame = uhci->frame_number;
  1494. /* Go through all the QH queues and process the URBs in each one */
  1495. for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) {
  1496. uhci->next_qh = list_entry(uhci->skelqh[i]->node.next,
  1497. struct uhci_qh, node);
  1498. while ((qh = uhci->next_qh) != uhci->skelqh[i]) {
  1499. uhci->next_qh = list_entry(qh->node.next,
  1500. struct uhci_qh, node);
  1501. if (uhci_advance_check(uhci, qh)) {
  1502. uhci_scan_qh(uhci, qh);
  1503. if (qh->state == QH_STATE_ACTIVE) {
  1504. uhci_urbp_wants_fsbr(uhci,
  1505. list_entry(qh->queue.next, struct urb_priv, node));
  1506. }
  1507. }
  1508. }
  1509. }
  1510. uhci->last_iso_frame = uhci->cur_iso_frame;
  1511. if (uhci->need_rescan)
  1512. goto rescan;
  1513. uhci->scan_in_progress = 0;
  1514. if (uhci->fsbr_is_on && !uhci->fsbr_is_wanted &&
  1515. !uhci->fsbr_expiring) {
  1516. uhci->fsbr_expiring = 1;
  1517. mod_timer(&uhci->fsbr_timer, jiffies + FSBR_OFF_DELAY);
  1518. }
  1519. if (list_empty(&uhci->skel_unlink_qh->node))
  1520. uhci_clear_next_interrupt(uhci);
  1521. else
  1522. uhci_set_next_interrupt(uhci);
  1523. }