ohci-pci.c 8.1 KB

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  1. // SPDX-License-Identifier: GPL-1.0+
  2. /*
  3. * OHCI HCD (Host Controller Driver) for USB.
  4. *
  5. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  6. * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  7. *
  8. * [ Initialisation is based on Linus' ]
  9. * [ uhci code and gregs ohci fragments ]
  10. * [ (C) Copyright 1999 Linus Torvalds ]
  11. * [ (C) Copyright 1999 Gregory P. Smith]
  12. *
  13. * PCI Bus Glue
  14. *
  15. * This file is licenced under the GPL.
  16. */
  17. #include <linux/io.h>
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/pci.h>
  21. #include <linux/usb.h>
  22. #include <linux/usb/hcd.h>
  23. #include "ohci.h"
  24. #include "pci-quirks.h"
  25. #define DRIVER_DESC "OHCI PCI platform driver"
  26. static const char hcd_name[] = "ohci-pci";
  27. /*-------------------------------------------------------------------------*/
  28. static int broken_suspend(struct usb_hcd *hcd)
  29. {
  30. device_init_wakeup(&hcd->self.root_hub->dev, 0);
  31. return 0;
  32. }
  33. /* AMD 756, for most chips (early revs), corrupts register
  34. * values on read ... so enable the vendor workaround.
  35. */
  36. static int ohci_quirk_amd756(struct usb_hcd *hcd)
  37. {
  38. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  39. ohci->flags = OHCI_QUIRK_AMD756;
  40. ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
  41. /* also erratum 10 (suspend/resume issues) */
  42. return broken_suspend(hcd);
  43. }
  44. /* Apple's OHCI driver has a lot of bizarre workarounds
  45. * for this chip. Evidently control and bulk lists
  46. * can get confused. (B&W G3 models, and ...)
  47. */
  48. static int ohci_quirk_opti(struct usb_hcd *hcd)
  49. {
  50. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  51. ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
  52. return 0;
  53. }
  54. /* Check for NSC87560. We have to look at the bridge (fn1) to
  55. * identify the USB (fn2). This quirk might apply to more or
  56. * even all NSC stuff.
  57. */
  58. static int ohci_quirk_ns(struct usb_hcd *hcd)
  59. {
  60. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  61. struct pci_dev *b;
  62. b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
  63. if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
  64. && b->vendor == PCI_VENDOR_ID_NS) {
  65. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  66. ohci->flags |= OHCI_QUIRK_SUPERIO;
  67. ohci_dbg (ohci, "Using NSC SuperIO setup\n");
  68. }
  69. pci_dev_put(b);
  70. return 0;
  71. }
  72. /* Check for Compaq's ZFMicro chipset, which needs short
  73. * delays before control or bulk queues get re-activated
  74. * in finish_unlinks()
  75. */
  76. static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
  77. {
  78. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  79. ohci->flags |= OHCI_QUIRK_ZFMICRO;
  80. ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
  81. return 0;
  82. }
  83. /* Check for Toshiba SCC OHCI which has big endian registers
  84. * and little endian in memory data structures
  85. */
  86. static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
  87. {
  88. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  89. /* That chip is only present in the southbridge of some
  90. * cell based platforms which are supposed to select
  91. * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
  92. * that was the case though.
  93. */
  94. #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
  95. ohci->flags |= OHCI_QUIRK_BE_MMIO;
  96. ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
  97. return 0;
  98. #else
  99. ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
  100. return -ENXIO;
  101. #endif
  102. }
  103. /* Check for NEC chip and apply quirk for allegedly lost interrupts.
  104. */
  105. static void ohci_quirk_nec_worker(struct work_struct *work)
  106. {
  107. struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
  108. int status;
  109. status = ohci_restart(ohci);
  110. if (status != 0)
  111. ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
  112. "ohci_restart", status);
  113. }
  114. static int ohci_quirk_nec(struct usb_hcd *hcd)
  115. {
  116. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  117. ohci->flags |= OHCI_QUIRK_NEC;
  118. INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
  119. ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
  120. return 0;
  121. }
  122. static int ohci_quirk_amd700(struct usb_hcd *hcd)
  123. {
  124. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  125. if (usb_amd_quirk_pll_check())
  126. ohci->flags |= OHCI_QUIRK_AMD_PLL;
  127. /* SB800 needs pre-fetch fix */
  128. if (usb_amd_prefetch_quirk()) {
  129. ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
  130. ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
  131. }
  132. ohci->flags |= OHCI_QUIRK_GLOBAL_SUSPEND;
  133. return 0;
  134. }
  135. static int ohci_quirk_qemu(struct usb_hcd *hcd)
  136. {
  137. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  138. ohci->flags |= OHCI_QUIRK_QEMU;
  139. ohci_dbg(ohci, "enabled qemu quirk\n");
  140. return 0;
  141. }
  142. /* List of quirks for OHCI */
  143. static const struct pci_device_id ohci_pci_quirks[] = {
  144. {
  145. PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
  146. .driver_data = (unsigned long)ohci_quirk_amd756,
  147. },
  148. {
  149. PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
  150. .driver_data = (unsigned long)ohci_quirk_opti,
  151. },
  152. {
  153. PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
  154. .driver_data = (unsigned long)ohci_quirk_ns,
  155. },
  156. {
  157. PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
  158. .driver_data = (unsigned long)ohci_quirk_zfmicro,
  159. },
  160. {
  161. PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
  162. .driver_data = (unsigned long)ohci_quirk_toshiba_scc,
  163. },
  164. {
  165. PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
  166. .driver_data = (unsigned long)ohci_quirk_nec,
  167. },
  168. {
  169. /* Toshiba portege 4000 */
  170. .vendor = PCI_VENDOR_ID_AL,
  171. .device = 0x5237,
  172. .subvendor = PCI_VENDOR_ID_TOSHIBA,
  173. .subdevice = 0x0004,
  174. .driver_data = (unsigned long) broken_suspend,
  175. },
  176. {
  177. PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
  178. .driver_data = (unsigned long) broken_suspend,
  179. },
  180. {
  181. PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
  182. .driver_data = (unsigned long)ohci_quirk_amd700,
  183. },
  184. {
  185. PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
  186. .driver_data = (unsigned long)ohci_quirk_amd700,
  187. },
  188. {
  189. PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
  190. .driver_data = (unsigned long)ohci_quirk_amd700,
  191. },
  192. {
  193. .vendor = PCI_VENDOR_ID_APPLE,
  194. .device = 0x003f,
  195. .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
  196. .subdevice = PCI_SUBDEVICE_ID_QEMU,
  197. .driver_data = (unsigned long)ohci_quirk_qemu,
  198. },
  199. /* FIXME for some of the early AMD 760 southbridges, OHCI
  200. * won't work at all. blacklist them.
  201. */
  202. {},
  203. };
  204. static int ohci_pci_reset (struct usb_hcd *hcd)
  205. {
  206. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  207. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  208. int ret = 0;
  209. if (hcd->self.controller) {
  210. const struct pci_device_id *quirk_id;
  211. quirk_id = pci_match_id(ohci_pci_quirks, pdev);
  212. if (quirk_id != NULL) {
  213. int (*quirk)(struct usb_hcd *ohci);
  214. quirk = (void *)quirk_id->driver_data;
  215. ret = quirk(hcd);
  216. }
  217. }
  218. if (ret == 0)
  219. ret = ohci_setup(hcd);
  220. /*
  221. * After ohci setup RWC may not be set for add-in PCI cards.
  222. * This transfers PCI PM wakeup capabilities.
  223. */
  224. if (device_can_wakeup(&pdev->dev))
  225. ohci->hc_control |= OHCI_CTRL_RWC;
  226. return ret;
  227. }
  228. static struct hc_driver __read_mostly ohci_pci_hc_driver;
  229. static const struct ohci_driver_overrides pci_overrides __initconst = {
  230. .product_desc = "OHCI PCI host controller",
  231. .reset = ohci_pci_reset,
  232. };
  233. static const struct pci_device_id pci_ids[] = { {
  234. /* handle any USB OHCI controller */
  235. PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
  236. .driver_data = (unsigned long) &ohci_pci_hc_driver,
  237. }, {
  238. /* The device in the ConneXT I/O hub has no class reg */
  239. PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI),
  240. .driver_data = (unsigned long) &ohci_pci_hc_driver,
  241. }, { /* end: all zeroes */ }
  242. };
  243. MODULE_DEVICE_TABLE (pci, pci_ids);
  244. /* pci driver glue; this is a "new style" PCI driver module */
  245. static struct pci_driver ohci_pci_driver = {
  246. .name = (char *) hcd_name,
  247. .id_table = pci_ids,
  248. .probe = usb_hcd_pci_probe,
  249. .remove = usb_hcd_pci_remove,
  250. .shutdown = usb_hcd_pci_shutdown,
  251. #ifdef CONFIG_PM
  252. .driver = {
  253. .pm = &usb_hcd_pci_pm_ops
  254. },
  255. #endif
  256. };
  257. static int __init ohci_pci_init(void)
  258. {
  259. if (usb_disabled())
  260. return -ENODEV;
  261. pr_info("%s: " DRIVER_DESC "\n", hcd_name);
  262. ohci_init_driver(&ohci_pci_hc_driver, &pci_overrides);
  263. #ifdef CONFIG_PM
  264. /* Entries for the PCI suspend/resume callbacks are special */
  265. ohci_pci_hc_driver.pci_suspend = ohci_suspend;
  266. ohci_pci_hc_driver.pci_resume = ohci_resume;
  267. #endif
  268. return pci_register_driver(&ohci_pci_driver);
  269. }
  270. module_init(ohci_pci_init);
  271. static void __exit ohci_pci_cleanup(void)
  272. {
  273. pci_unregister_driver(&ohci_pci_driver);
  274. }
  275. module_exit(ohci_pci_cleanup);
  276. MODULE_DESCRIPTION(DRIVER_DESC);
  277. MODULE_LICENSE("GPL");
  278. MODULE_SOFTDEP("pre: ehci_pci");