ehci-orion.c 9.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * drivers/usb/host/ehci-orion.c
  4. *
  5. * Tzachi Perelstein <tzachi@marvell.com>
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mbus.h>
  11. #include <linux/clk.h>
  12. #include <linux/platform_data/usb-ehci-orion.h>
  13. #include <linux/of.h>
  14. #include <linux/phy/phy.h>
  15. #include <linux/of_device.h>
  16. #include <linux/of_irq.h>
  17. #include <linux/usb.h>
  18. #include <linux/usb/hcd.h>
  19. #include <linux/io.h>
  20. #include <linux/dma-mapping.h>
  21. #include "ehci.h"
  22. #define rdl(off) readl_relaxed(hcd->regs + (off))
  23. #define wrl(off, val) writel_relaxed((val), hcd->regs + (off))
  24. #define USB_CMD 0x140
  25. #define USB_CMD_RUN BIT(0)
  26. #define USB_CMD_RESET BIT(1)
  27. #define USB_MODE 0x1a8
  28. #define USB_MODE_MASK GENMASK(1, 0)
  29. #define USB_MODE_DEVICE 0x2
  30. #define USB_MODE_HOST 0x3
  31. #define USB_MODE_SDIS BIT(4)
  32. #define USB_CAUSE 0x310
  33. #define USB_MASK 0x314
  34. #define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
  35. #define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
  36. #define USB_IPG 0x360
  37. #define USB_PHY_PWR_CTRL 0x400
  38. #define USB_PHY_TX_CTRL 0x420
  39. #define USB_PHY_RX_CTRL 0x430
  40. #define USB_PHY_IVREF_CTRL 0x440
  41. #define USB_PHY_TST_GRP_CTRL 0x450
  42. #define USB_SBUSCFG 0x90
  43. /* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
  44. #define USB_SBUSCFG_BAWR_ALIGN_128B (0x3 << 6)
  45. #define USB_SBUSCFG_BARD_ALIGN_128B (0x3 << 3)
  46. /* AHBBRST = 3 : Align AHB Burst to INCR16 (64 bytes) */
  47. #define USB_SBUSCFG_AHBBRST_INCR16 (0x3 << 0)
  48. #define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B \
  49. | USB_SBUSCFG_BARD_ALIGN_128B \
  50. | USB_SBUSCFG_AHBBRST_INCR16)
  51. #define DRIVER_DESC "EHCI orion driver"
  52. #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
  53. struct orion_ehci_hcd {
  54. struct clk *clk;
  55. struct phy *phy;
  56. };
  57. static const char hcd_name[] = "ehci-orion";
  58. static struct hc_driver __read_mostly ehci_orion_hc_driver;
  59. /*
  60. * Implement Orion USB controller specification guidelines
  61. */
  62. static void orion_usb_phy_v1_setup(struct usb_hcd *hcd)
  63. {
  64. /* The below GLs are according to the Orion Errata document */
  65. /*
  66. * Clear interrupt cause and mask
  67. */
  68. wrl(USB_CAUSE, 0);
  69. wrl(USB_MASK, 0);
  70. /*
  71. * Reset controller
  72. */
  73. wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
  74. while (rdl(USB_CMD) & USB_CMD_RESET);
  75. /*
  76. * GL# USB-10: Set IPG for non start of frame packets
  77. * Bits[14:8]=0xc
  78. */
  79. wrl(USB_IPG, (rdl(USB_IPG) & ~0x7f00) | 0xc00);
  80. /*
  81. * GL# USB-9: USB 2.0 Power Control
  82. * BG_VSEL[7:6]=0x1
  83. */
  84. wrl(USB_PHY_PWR_CTRL, (rdl(USB_PHY_PWR_CTRL) & ~0xc0)| 0x40);
  85. /*
  86. * GL# USB-1: USB PHY Tx Control - force calibration to '8'
  87. * TXDATA_BLOCK_EN[21]=0x1, EXT_RCAL_EN[13]=0x1, IMP_CAL[6:3]=0x8
  88. */
  89. wrl(USB_PHY_TX_CTRL, (rdl(USB_PHY_TX_CTRL) & ~0x78) | 0x202040);
  90. /*
  91. * GL# USB-3 GL# USB-9: USB PHY Rx Control
  92. * RXDATA_BLOCK_LENGHT[31:30]=0x3, EDGE_DET_SEL[27:26]=0,
  93. * CDR_FASTLOCK_EN[21]=0, DISCON_THRESHOLD[9:8]=0, SQ_THRESH[7:4]=0x1
  94. */
  95. wrl(USB_PHY_RX_CTRL, (rdl(USB_PHY_RX_CTRL) & ~0xc2003f0) | 0xc0000010);
  96. /*
  97. * GL# USB-3 GL# USB-9: USB PHY IVREF Control
  98. * PLLVDD12[1:0]=0x2, RXVDD[5:4]=0x3, Reserved[19]=0
  99. */
  100. wrl(USB_PHY_IVREF_CTRL, (rdl(USB_PHY_IVREF_CTRL) & ~0x80003 ) | 0x32);
  101. /*
  102. * GL# USB-3 GL# USB-9: USB PHY Test Group Control
  103. * REG_FIFO_SQ_RST[15]=0
  104. */
  105. wrl(USB_PHY_TST_GRP_CTRL, rdl(USB_PHY_TST_GRP_CTRL) & ~0x8000);
  106. /*
  107. * Stop and reset controller
  108. */
  109. wrl(USB_CMD, rdl(USB_CMD) & ~USB_CMD_RUN);
  110. wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
  111. while (rdl(USB_CMD) & USB_CMD_RESET);
  112. /*
  113. * GL# USB-5 Streaming disable REG_USB_MODE[4]=1
  114. * TBD: This need to be done after each reset!
  115. * GL# USB-4 Setup USB Host mode
  116. */
  117. wrl(USB_MODE, USB_MODE_SDIS | USB_MODE_HOST);
  118. }
  119. static void
  120. ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
  121. const struct mbus_dram_target_info *dram)
  122. {
  123. int i;
  124. for (i = 0; i < 4; i++) {
  125. wrl(USB_WINDOW_CTRL(i), 0);
  126. wrl(USB_WINDOW_BASE(i), 0);
  127. }
  128. for (i = 0; i < dram->num_cs; i++) {
  129. const struct mbus_dram_window *cs = dram->cs + i;
  130. wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) |
  131. (cs->mbus_attr << 8) |
  132. (dram->mbus_dram_target_id << 4) | 1);
  133. wrl(USB_WINDOW_BASE(i), cs->base);
  134. }
  135. }
  136. static int ehci_orion_drv_reset(struct usb_hcd *hcd)
  137. {
  138. struct device *dev = hcd->self.controller;
  139. int ret;
  140. ret = ehci_setup(hcd);
  141. if (ret)
  142. return ret;
  143. /*
  144. * For SoC without hlock, need to program sbuscfg value to guarantee
  145. * AHB master's burst would not overrun or underrun FIFO.
  146. *
  147. * sbuscfg reg has to be set after usb controller reset, otherwise
  148. * the value would be override to 0.
  149. */
  150. if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
  151. wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
  152. return ret;
  153. }
  154. static int __maybe_unused ehci_orion_drv_suspend(struct device *dev)
  155. {
  156. struct usb_hcd *hcd = dev_get_drvdata(dev);
  157. return ehci_suspend(hcd, device_may_wakeup(dev));
  158. }
  159. static int __maybe_unused ehci_orion_drv_resume(struct device *dev)
  160. {
  161. struct usb_hcd *hcd = dev_get_drvdata(dev);
  162. return ehci_resume(hcd, false);
  163. }
  164. static SIMPLE_DEV_PM_OPS(ehci_orion_pm_ops, ehci_orion_drv_suspend,
  165. ehci_orion_drv_resume);
  166. static const struct ehci_driver_overrides orion_overrides __initconst = {
  167. .extra_priv_size = sizeof(struct orion_ehci_hcd),
  168. .reset = ehci_orion_drv_reset,
  169. };
  170. static int ehci_orion_drv_probe(struct platform_device *pdev)
  171. {
  172. struct orion_ehci_data *pd = dev_get_platdata(&pdev->dev);
  173. const struct mbus_dram_target_info *dram;
  174. struct resource *res;
  175. struct usb_hcd *hcd;
  176. struct ehci_hcd *ehci;
  177. void __iomem *regs;
  178. int irq, err;
  179. enum orion_ehci_phy_ver phy_version;
  180. struct orion_ehci_hcd *priv;
  181. if (usb_disabled())
  182. return -ENODEV;
  183. pr_debug("Initializing Orion-SoC USB Host Controller\n");
  184. irq = platform_get_irq(pdev, 0);
  185. if (irq <= 0) {
  186. err = -ENODEV;
  187. goto err;
  188. }
  189. /*
  190. * Right now device-tree probed devices don't get dma_mask
  191. * set. Since shared usb code relies on it, set it here for
  192. * now. Once we have dma capability bindings this can go away.
  193. */
  194. err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  195. if (err)
  196. goto err;
  197. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  198. regs = devm_ioremap_resource(&pdev->dev, res);
  199. if (IS_ERR(regs)) {
  200. err = PTR_ERR(regs);
  201. goto err;
  202. }
  203. hcd = usb_create_hcd(&ehci_orion_hc_driver,
  204. &pdev->dev, dev_name(&pdev->dev));
  205. if (!hcd) {
  206. err = -ENOMEM;
  207. goto err;
  208. }
  209. hcd->rsrc_start = res->start;
  210. hcd->rsrc_len = resource_size(res);
  211. hcd->regs = regs;
  212. ehci = hcd_to_ehci(hcd);
  213. ehci->caps = hcd->regs + 0x100;
  214. hcd->has_tt = 1;
  215. priv = hcd_to_orion_priv(hcd);
  216. /*
  217. * Not all platforms can gate the clock, so it is not an error if
  218. * the clock does not exists.
  219. */
  220. priv->clk = devm_clk_get(&pdev->dev, NULL);
  221. if (!IS_ERR(priv->clk)) {
  222. err = clk_prepare_enable(priv->clk);
  223. if (err)
  224. goto err_put_hcd;
  225. }
  226. priv->phy = devm_phy_optional_get(&pdev->dev, "usb");
  227. if (IS_ERR(priv->phy)) {
  228. err = PTR_ERR(priv->phy);
  229. if (err != -ENOSYS)
  230. goto err_dis_clk;
  231. }
  232. /*
  233. * (Re-)program MBUS remapping windows if we are asked to.
  234. */
  235. dram = mv_mbus_dram_info();
  236. if (dram)
  237. ehci_orion_conf_mbus_windows(hcd, dram);
  238. /*
  239. * setup Orion USB controller.
  240. */
  241. if (pdev->dev.of_node)
  242. phy_version = EHCI_PHY_NA;
  243. else
  244. phy_version = pd->phy_version;
  245. switch (phy_version) {
  246. case EHCI_PHY_NA: /* dont change USB phy settings */
  247. break;
  248. case EHCI_PHY_ORION:
  249. orion_usb_phy_v1_setup(hcd);
  250. break;
  251. case EHCI_PHY_DD:
  252. case EHCI_PHY_KW:
  253. default:
  254. dev_warn(&pdev->dev, "USB phy version isn't supported.\n");
  255. }
  256. err = usb_add_hcd(hcd, irq, IRQF_SHARED);
  257. if (err)
  258. goto err_dis_clk;
  259. device_wakeup_enable(hcd->self.controller);
  260. return 0;
  261. err_dis_clk:
  262. if (!IS_ERR(priv->clk))
  263. clk_disable_unprepare(priv->clk);
  264. err_put_hcd:
  265. usb_put_hcd(hcd);
  266. err:
  267. dev_err(&pdev->dev, "init %s fail, %d\n",
  268. dev_name(&pdev->dev), err);
  269. return err;
  270. }
  271. static int ehci_orion_drv_remove(struct platform_device *pdev)
  272. {
  273. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  274. struct orion_ehci_hcd *priv = hcd_to_orion_priv(hcd);
  275. usb_remove_hcd(hcd);
  276. if (!IS_ERR(priv->clk))
  277. clk_disable_unprepare(priv->clk);
  278. usb_put_hcd(hcd);
  279. return 0;
  280. }
  281. static const struct of_device_id ehci_orion_dt_ids[] = {
  282. { .compatible = "marvell,orion-ehci", },
  283. { .compatible = "marvell,armada-3700-ehci", },
  284. {},
  285. };
  286. MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
  287. static struct platform_driver ehci_orion_driver = {
  288. .probe = ehci_orion_drv_probe,
  289. .remove = ehci_orion_drv_remove,
  290. .shutdown = usb_hcd_platform_shutdown,
  291. .driver = {
  292. .name = "orion-ehci",
  293. .of_match_table = ehci_orion_dt_ids,
  294. .pm = &ehci_orion_pm_ops,
  295. },
  296. };
  297. static int __init ehci_orion_init(void)
  298. {
  299. if (usb_disabled())
  300. return -ENODEV;
  301. pr_info("%s: " DRIVER_DESC "\n", hcd_name);
  302. ehci_init_driver(&ehci_orion_hc_driver, &orion_overrides);
  303. return platform_driver_register(&ehci_orion_driver);
  304. }
  305. module_init(ehci_orion_init);
  306. static void __exit ehci_orion_cleanup(void)
  307. {
  308. platform_driver_unregister(&ehci_orion_driver);
  309. }
  310. module_exit(ehci_orion_cleanup);
  311. MODULE_DESCRIPTION(DRIVER_DESC);
  312. MODULE_ALIAS("platform:orion-ehci");
  313. MODULE_AUTHOR("Tzachi Perelstein");
  314. MODULE_LICENSE("GPL v2");