ehci-dbg.c 28 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2001-2002 by David Brownell
  4. */
  5. /* this file is part of ehci-hcd.c */
  6. #ifdef CONFIG_DYNAMIC_DEBUG
  7. /*
  8. * check the values in the HCSPARAMS register
  9. * (host controller _Structural_ parameters)
  10. * see EHCI spec, Table 2-4 for each value
  11. */
  12. static void dbg_hcs_params(struct ehci_hcd *ehci, char *label)
  13. {
  14. u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
  15. ehci_dbg(ehci,
  16. "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
  17. label, params,
  18. HCS_DEBUG_PORT(params),
  19. HCS_INDICATOR(params) ? " ind" : "",
  20. HCS_N_CC(params),
  21. HCS_N_PCC(params),
  22. HCS_PORTROUTED(params) ? "" : " ordered",
  23. HCS_PPC(params) ? "" : " !ppc",
  24. HCS_N_PORTS(params));
  25. /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
  26. if (HCS_PORTROUTED(params)) {
  27. int i;
  28. char buf[46], tmp[7], byte;
  29. buf[0] = 0;
  30. for (i = 0; i < HCS_N_PORTS(params); i++) {
  31. /* FIXME MIPS won't readb() ... */
  32. byte = readb(&ehci->caps->portroute[(i >> 1)]);
  33. sprintf(tmp, "%d ",
  34. (i & 0x1) ? byte & 0xf : (byte >> 4) & 0xf);
  35. strcat(buf, tmp);
  36. }
  37. ehci_dbg(ehci, "%s portroute %s\n", label, buf);
  38. }
  39. }
  40. /*
  41. * check the values in the HCCPARAMS register
  42. * (host controller _Capability_ parameters)
  43. * see EHCI Spec, Table 2-5 for each value
  44. */
  45. static void dbg_hcc_params(struct ehci_hcd *ehci, char *label)
  46. {
  47. u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
  48. if (HCC_ISOC_CACHE(params)) {
  49. ehci_dbg(ehci,
  50. "%s hcc_params %04x caching frame %s%s%s\n",
  51. label, params,
  52. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  53. HCC_CANPARK(params) ? " park" : "",
  54. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
  55. } else {
  56. ehci_dbg(ehci,
  57. "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
  58. label,
  59. params,
  60. HCC_ISOC_THRES(params),
  61. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  62. HCC_CANPARK(params) ? " park" : "",
  63. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
  64. HCC_LPM(params) ? " LPM" : "",
  65. HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
  66. HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
  67. HCC_32FRAME_PERIODIC_LIST(params) ?
  68. " 32 periodic list" : "");
  69. }
  70. }
  71. static void __maybe_unused
  72. dbg_qtd(const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
  73. {
  74. ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
  75. hc32_to_cpup(ehci, &qtd->hw_next),
  76. hc32_to_cpup(ehci, &qtd->hw_alt_next),
  77. hc32_to_cpup(ehci, &qtd->hw_token),
  78. hc32_to_cpup(ehci, &qtd->hw_buf[0]));
  79. if (qtd->hw_buf[1])
  80. ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
  81. hc32_to_cpup(ehci, &qtd->hw_buf[1]),
  82. hc32_to_cpup(ehci, &qtd->hw_buf[2]),
  83. hc32_to_cpup(ehci, &qtd->hw_buf[3]),
  84. hc32_to_cpup(ehci, &qtd->hw_buf[4]));
  85. }
  86. static void __maybe_unused
  87. dbg_qh(const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
  88. {
  89. struct ehci_qh_hw *hw = qh->hw;
  90. ehci_dbg(ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
  91. qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
  92. dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
  93. }
  94. static void __maybe_unused
  95. dbg_itd(const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
  96. {
  97. ehci_dbg(ehci, "%s [%d] itd %p, next %08x, urb %p\n",
  98. label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
  99. itd->urb);
  100. ehci_dbg(ehci,
  101. " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
  102. hc32_to_cpu(ehci, itd->hw_transaction[0]),
  103. hc32_to_cpu(ehci, itd->hw_transaction[1]),
  104. hc32_to_cpu(ehci, itd->hw_transaction[2]),
  105. hc32_to_cpu(ehci, itd->hw_transaction[3]),
  106. hc32_to_cpu(ehci, itd->hw_transaction[4]),
  107. hc32_to_cpu(ehci, itd->hw_transaction[5]),
  108. hc32_to_cpu(ehci, itd->hw_transaction[6]),
  109. hc32_to_cpu(ehci, itd->hw_transaction[7]));
  110. ehci_dbg(ehci,
  111. " buf: %08x %08x %08x %08x %08x %08x %08x\n",
  112. hc32_to_cpu(ehci, itd->hw_bufp[0]),
  113. hc32_to_cpu(ehci, itd->hw_bufp[1]),
  114. hc32_to_cpu(ehci, itd->hw_bufp[2]),
  115. hc32_to_cpu(ehci, itd->hw_bufp[3]),
  116. hc32_to_cpu(ehci, itd->hw_bufp[4]),
  117. hc32_to_cpu(ehci, itd->hw_bufp[5]),
  118. hc32_to_cpu(ehci, itd->hw_bufp[6]));
  119. ehci_dbg(ehci, " index: %d %d %d %d %d %d %d %d\n",
  120. itd->index[0], itd->index[1], itd->index[2],
  121. itd->index[3], itd->index[4], itd->index[5],
  122. itd->index[6], itd->index[7]);
  123. }
  124. static void __maybe_unused
  125. dbg_sitd(const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
  126. {
  127. ehci_dbg(ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
  128. label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
  129. sitd->urb);
  130. ehci_dbg(ehci,
  131. " addr %08x sched %04x result %08x buf %08x %08x\n",
  132. hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
  133. hc32_to_cpu(ehci, sitd->hw_uframe),
  134. hc32_to_cpu(ehci, sitd->hw_results),
  135. hc32_to_cpu(ehci, sitd->hw_buf[0]),
  136. hc32_to_cpu(ehci, sitd->hw_buf[1]));
  137. }
  138. static int __maybe_unused
  139. dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
  140. {
  141. return scnprintf(buf, len,
  142. "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
  143. label, label[0] ? " " : "", status,
  144. (status & STS_PPCE_MASK) ? " PPCE" : "",
  145. (status & STS_ASS) ? " Async" : "",
  146. (status & STS_PSS) ? " Periodic" : "",
  147. (status & STS_RECL) ? " Recl" : "",
  148. (status & STS_HALT) ? " Halt" : "",
  149. (status & STS_IAA) ? " IAA" : "",
  150. (status & STS_FATAL) ? " FATAL" : "",
  151. (status & STS_FLR) ? " FLR" : "",
  152. (status & STS_PCD) ? " PCD" : "",
  153. (status & STS_ERR) ? " ERR" : "",
  154. (status & STS_INT) ? " INT" : "");
  155. }
  156. static int __maybe_unused
  157. dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
  158. {
  159. return scnprintf(buf, len,
  160. "%s%sintrenable %02x%s%s%s%s%s%s%s",
  161. label, label[0] ? " " : "", enable,
  162. (enable & STS_PPCE_MASK) ? " PPCE" : "",
  163. (enable & STS_IAA) ? " IAA" : "",
  164. (enable & STS_FATAL) ? " FATAL" : "",
  165. (enable & STS_FLR) ? " FLR" : "",
  166. (enable & STS_PCD) ? " PCD" : "",
  167. (enable & STS_ERR) ? " ERR" : "",
  168. (enable & STS_INT) ? " INT" : "");
  169. }
  170. static const char *const fls_strings[] = { "1024", "512", "256", "??" };
  171. static int
  172. dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
  173. {
  174. return scnprintf(buf, len,
  175. "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
  176. "period=%s%s %s",
  177. label, label[0] ? " " : "", command,
  178. (command & CMD_HIRD) ? " HIRD" : "",
  179. (command & CMD_PPCEE) ? " PPCEE" : "",
  180. (command & CMD_FSP) ? " FSP" : "",
  181. (command & CMD_ASPE) ? " ASPE" : "",
  182. (command & CMD_PSPE) ? " PSPE" : "",
  183. (command & CMD_PARK) ? " park" : "(park)",
  184. CMD_PARK_CNT(command),
  185. (command >> 16) & 0x3f,
  186. (command & CMD_LRESET) ? " LReset" : "",
  187. (command & CMD_IAAD) ? " IAAD" : "",
  188. (command & CMD_ASE) ? " Async" : "",
  189. (command & CMD_PSE) ? " Periodic" : "",
  190. fls_strings[(command >> 2) & 0x3],
  191. (command & CMD_RESET) ? " Reset" : "",
  192. (command & CMD_RUN) ? "RUN" : "HALT");
  193. }
  194. static int
  195. dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
  196. {
  197. char *sig;
  198. /* signaling state */
  199. switch (status & (3 << 10)) {
  200. case 0 << 10:
  201. sig = "se0";
  202. break;
  203. case 1 << 10: /* low speed */
  204. sig = "k";
  205. break;
  206. case 2 << 10:
  207. sig = "j";
  208. break;
  209. default:
  210. sig = "?";
  211. break;
  212. }
  213. return scnprintf(buf, len,
  214. "%s%sport:%d status %06x %d %s%s%s%s%s%s "
  215. "sig=%s%s%s%s%s%s%s%s%s%s%s",
  216. label, label[0] ? " " : "", port, status,
  217. status >> 25, /*device address */
  218. (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ACK ?
  219. " ACK" : "",
  220. (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_NYET ?
  221. " NYET" : "",
  222. (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_STALL ?
  223. " STALL" : "",
  224. (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ERR ?
  225. " ERR" : "",
  226. (status & PORT_POWER) ? " POWER" : "",
  227. (status & PORT_OWNER) ? " OWNER" : "",
  228. sig,
  229. (status & PORT_LPM) ? " LPM" : "",
  230. (status & PORT_RESET) ? " RESET" : "",
  231. (status & PORT_SUSPEND) ? " SUSPEND" : "",
  232. (status & PORT_RESUME) ? " RESUME" : "",
  233. (status & PORT_OCC) ? " OCC" : "",
  234. (status & PORT_OC) ? " OC" : "",
  235. (status & PORT_PEC) ? " PEC" : "",
  236. (status & PORT_PE) ? " PE" : "",
  237. (status & PORT_CSC) ? " CSC" : "",
  238. (status & PORT_CONNECT) ? " CONNECT" : "");
  239. }
  240. static inline void
  241. dbg_status(struct ehci_hcd *ehci, const char *label, u32 status)
  242. {
  243. char buf[80];
  244. dbg_status_buf(buf, sizeof(buf), label, status);
  245. ehci_dbg(ehci, "%s\n", buf);
  246. }
  247. static inline void
  248. dbg_cmd(struct ehci_hcd *ehci, const char *label, u32 command)
  249. {
  250. char buf[80];
  251. dbg_command_buf(buf, sizeof(buf), label, command);
  252. ehci_dbg(ehci, "%s\n", buf);
  253. }
  254. static inline void
  255. dbg_port(struct ehci_hcd *ehci, const char *label, int port, u32 status)
  256. {
  257. char buf[80];
  258. dbg_port_buf(buf, sizeof(buf), label, port, status);
  259. ehci_dbg(ehci, "%s\n", buf);
  260. }
  261. /*-------------------------------------------------------------------------*/
  262. /* troubleshooting help: expose state in debugfs */
  263. static int debug_async_open(struct inode *, struct file *);
  264. static int debug_bandwidth_open(struct inode *, struct file *);
  265. static int debug_periodic_open(struct inode *, struct file *);
  266. static int debug_registers_open(struct inode *, struct file *);
  267. static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
  268. static int debug_close(struct inode *, struct file *);
  269. static const struct file_operations debug_async_fops = {
  270. .owner = THIS_MODULE,
  271. .open = debug_async_open,
  272. .read = debug_output,
  273. .release = debug_close,
  274. .llseek = default_llseek,
  275. };
  276. static const struct file_operations debug_bandwidth_fops = {
  277. .owner = THIS_MODULE,
  278. .open = debug_bandwidth_open,
  279. .read = debug_output,
  280. .release = debug_close,
  281. .llseek = default_llseek,
  282. };
  283. static const struct file_operations debug_periodic_fops = {
  284. .owner = THIS_MODULE,
  285. .open = debug_periodic_open,
  286. .read = debug_output,
  287. .release = debug_close,
  288. .llseek = default_llseek,
  289. };
  290. static const struct file_operations debug_registers_fops = {
  291. .owner = THIS_MODULE,
  292. .open = debug_registers_open,
  293. .read = debug_output,
  294. .release = debug_close,
  295. .llseek = default_llseek,
  296. };
  297. static struct dentry *ehci_debug_root;
  298. struct debug_buffer {
  299. ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
  300. struct usb_bus *bus;
  301. struct mutex mutex; /* protect filling of buffer */
  302. size_t count; /* number of characters filled into buffer */
  303. char *output_buf;
  304. size_t alloc_size;
  305. };
  306. static inline char speed_char(u32 info1)
  307. {
  308. switch (info1 & (3 << 12)) {
  309. case QH_FULL_SPEED:
  310. return 'f';
  311. case QH_LOW_SPEED:
  312. return 'l';
  313. case QH_HIGH_SPEED:
  314. return 'h';
  315. default:
  316. return '?';
  317. }
  318. }
  319. static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
  320. {
  321. __u32 v = hc32_to_cpu(ehci, token);
  322. if (v & QTD_STS_ACTIVE)
  323. return '*';
  324. if (v & QTD_STS_HALT)
  325. return '-';
  326. if (!IS_SHORT_READ(v))
  327. return ' ';
  328. /* tries to advance through hw_alt_next */
  329. return '/';
  330. }
  331. static void qh_lines(struct ehci_hcd *ehci, struct ehci_qh *qh,
  332. char **nextp, unsigned *sizep)
  333. {
  334. u32 scratch;
  335. u32 hw_curr;
  336. struct list_head *entry;
  337. struct ehci_qtd *td;
  338. unsigned temp;
  339. unsigned size = *sizep;
  340. char *next = *nextp;
  341. char mark;
  342. __le32 list_end = EHCI_LIST_END(ehci);
  343. struct ehci_qh_hw *hw = qh->hw;
  344. if (hw->hw_qtd_next == list_end) /* NEC does this */
  345. mark = '@';
  346. else
  347. mark = token_mark(ehci, hw->hw_token);
  348. if (mark == '/') { /* qh_alt_next controls qh advance? */
  349. if ((hw->hw_alt_next & QTD_MASK(ehci))
  350. == ehci->async->hw->hw_alt_next)
  351. mark = '#'; /* blocked */
  352. else if (hw->hw_alt_next == list_end)
  353. mark = '.'; /* use hw_qtd_next */
  354. /* else alt_next points to some other qtd */
  355. }
  356. scratch = hc32_to_cpup(ehci, &hw->hw_info1);
  357. hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
  358. temp = scnprintf(next, size,
  359. "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
  360. " [cur %08x next %08x buf[0] %08x]",
  361. qh, scratch & 0x007f,
  362. speed_char (scratch),
  363. (scratch >> 8) & 0x000f,
  364. scratch, hc32_to_cpup(ehci, &hw->hw_info2),
  365. hc32_to_cpup(ehci, &hw->hw_token), mark,
  366. (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
  367. ? "data1" : "data0",
  368. (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f,
  369. hc32_to_cpup(ehci, &hw->hw_current),
  370. hc32_to_cpup(ehci, &hw->hw_qtd_next),
  371. hc32_to_cpup(ehci, &hw->hw_buf[0]));
  372. size -= temp;
  373. next += temp;
  374. /* hc may be modifying the list as we read it ... */
  375. list_for_each(entry, &qh->qtd_list) {
  376. char *type;
  377. td = list_entry(entry, struct ehci_qtd, qtd_list);
  378. scratch = hc32_to_cpup(ehci, &td->hw_token);
  379. mark = ' ';
  380. if (hw_curr == td->qtd_dma) {
  381. mark = '*';
  382. } else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) {
  383. mark = '+';
  384. } else if (QTD_LENGTH(scratch)) {
  385. if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
  386. mark = '#';
  387. else if (td->hw_alt_next != list_end)
  388. mark = '/';
  389. }
  390. switch ((scratch >> 8) & 0x03) {
  391. case 0:
  392. type = "out";
  393. break;
  394. case 1:
  395. type = "in";
  396. break;
  397. case 2:
  398. type = "setup";
  399. break;
  400. default:
  401. type = "?";
  402. break;
  403. }
  404. temp = scnprintf(next, size,
  405. "\n\t%p%c%s len=%d %08x urb %p"
  406. " [td %08x buf[0] %08x]",
  407. td, mark, type,
  408. (scratch >> 16) & 0x7fff,
  409. scratch,
  410. td->urb,
  411. (u32) td->qtd_dma,
  412. hc32_to_cpup(ehci, &td->hw_buf[0]));
  413. size -= temp;
  414. next += temp;
  415. if (temp == size)
  416. goto done;
  417. }
  418. temp = scnprintf(next, size, "\n");
  419. size -= temp;
  420. next += temp;
  421. done:
  422. *sizep = size;
  423. *nextp = next;
  424. }
  425. static ssize_t fill_async_buffer(struct debug_buffer *buf)
  426. {
  427. struct usb_hcd *hcd;
  428. struct ehci_hcd *ehci;
  429. unsigned long flags;
  430. unsigned temp, size;
  431. char *next;
  432. struct ehci_qh *qh;
  433. hcd = bus_to_hcd(buf->bus);
  434. ehci = hcd_to_ehci(hcd);
  435. next = buf->output_buf;
  436. size = buf->alloc_size;
  437. *next = 0;
  438. /*
  439. * dumps a snapshot of the async schedule.
  440. * usually empty except for long-term bulk reads, or head.
  441. * one QH per line, and TDs we know about
  442. */
  443. spin_lock_irqsave(&ehci->lock, flags);
  444. for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
  445. qh_lines(ehci, qh, &next, &size);
  446. if (!list_empty(&ehci->async_unlink) && size > 0) {
  447. temp = scnprintf(next, size, "\nunlink =\n");
  448. size -= temp;
  449. next += temp;
  450. list_for_each_entry(qh, &ehci->async_unlink, unlink_node) {
  451. if (size <= 0)
  452. break;
  453. qh_lines(ehci, qh, &next, &size);
  454. }
  455. }
  456. spin_unlock_irqrestore(&ehci->lock, flags);
  457. return strlen(buf->output_buf);
  458. }
  459. static ssize_t fill_bandwidth_buffer(struct debug_buffer *buf)
  460. {
  461. struct ehci_hcd *ehci;
  462. struct ehci_tt *tt;
  463. struct ehci_per_sched *ps;
  464. unsigned temp, size;
  465. char *next;
  466. unsigned i;
  467. u8 *bw;
  468. u16 *bf;
  469. u8 budget[EHCI_BANDWIDTH_SIZE];
  470. ehci = hcd_to_ehci(bus_to_hcd(buf->bus));
  471. next = buf->output_buf;
  472. size = buf->alloc_size;
  473. *next = 0;
  474. spin_lock_irq(&ehci->lock);
  475. /* Dump the HS bandwidth table */
  476. temp = scnprintf(next, size,
  477. "HS bandwidth allocation (us per microframe)\n");
  478. size -= temp;
  479. next += temp;
  480. for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
  481. bw = &ehci->bandwidth[i];
  482. temp = scnprintf(next, size,
  483. "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
  484. i, bw[0], bw[1], bw[2], bw[3],
  485. bw[4], bw[5], bw[6], bw[7]);
  486. size -= temp;
  487. next += temp;
  488. }
  489. /* Dump all the FS/LS tables */
  490. list_for_each_entry(tt, &ehci->tt_list, tt_list) {
  491. temp = scnprintf(next, size,
  492. "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
  493. dev_name(&tt->usb_tt->hub->dev),
  494. tt->tt_port + !!tt->usb_tt->multi);
  495. size -= temp;
  496. next += temp;
  497. bf = tt->bandwidth;
  498. temp = scnprintf(next, size,
  499. " %5u%5u%5u%5u%5u%5u%5u%5u\n",
  500. bf[0], bf[1], bf[2], bf[3],
  501. bf[4], bf[5], bf[6], bf[7]);
  502. size -= temp;
  503. next += temp;
  504. temp = scnprintf(next, size,
  505. "FS/LS budget (us per microframe)\n");
  506. size -= temp;
  507. next += temp;
  508. compute_tt_budget(budget, tt);
  509. for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
  510. bw = &budget[i];
  511. temp = scnprintf(next, size,
  512. "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
  513. i, bw[0], bw[1], bw[2], bw[3],
  514. bw[4], bw[5], bw[6], bw[7]);
  515. size -= temp;
  516. next += temp;
  517. }
  518. list_for_each_entry(ps, &tt->ps_list, ps_list) {
  519. temp = scnprintf(next, size,
  520. "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
  521. dev_name(&ps->udev->dev),
  522. ps->ep->desc.bEndpointAddress,
  523. ps->tt_usecs,
  524. ps->bw_phase, ps->phase_uf,
  525. ps->bw_period, ps->cs_mask);
  526. size -= temp;
  527. next += temp;
  528. }
  529. }
  530. spin_unlock_irq(&ehci->lock);
  531. return next - buf->output_buf;
  532. }
  533. static unsigned output_buf_tds_dir(char *buf, struct ehci_hcd *ehci,
  534. struct ehci_qh_hw *hw, struct ehci_qh *qh, unsigned size)
  535. {
  536. u32 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
  537. struct ehci_qtd *qtd;
  538. char *type = "";
  539. unsigned temp = 0;
  540. /* count tds, get ep direction */
  541. list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
  542. temp++;
  543. switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) {
  544. case 0:
  545. type = "out";
  546. continue;
  547. case 1:
  548. type = "in";
  549. continue;
  550. }
  551. }
  552. return scnprintf(buf, size, " (%c%d ep%d%s [%d/%d] q%d p%d)",
  553. speed_char(scratch), scratch & 0x007f,
  554. (scratch >> 8) & 0x000f, type, qh->ps.usecs,
  555. qh->ps.c_usecs, temp, 0x7ff & (scratch >> 16));
  556. }
  557. #define DBG_SCHED_LIMIT 64
  558. static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
  559. {
  560. struct usb_hcd *hcd;
  561. struct ehci_hcd *ehci;
  562. unsigned long flags;
  563. union ehci_shadow p, *seen;
  564. unsigned temp, size, seen_count;
  565. char *next;
  566. unsigned i;
  567. __hc32 tag;
  568. seen = kmalloc_array(DBG_SCHED_LIMIT, sizeof(*seen), GFP_ATOMIC);
  569. if (!seen)
  570. return 0;
  571. seen_count = 0;
  572. hcd = bus_to_hcd(buf->bus);
  573. ehci = hcd_to_ehci(hcd);
  574. next = buf->output_buf;
  575. size = buf->alloc_size;
  576. temp = scnprintf(next, size, "size = %d\n", ehci->periodic_size);
  577. size -= temp;
  578. next += temp;
  579. /*
  580. * dump a snapshot of the periodic schedule.
  581. * iso changes, interrupt usually doesn't.
  582. */
  583. spin_lock_irqsave(&ehci->lock, flags);
  584. for (i = 0; i < ehci->periodic_size; i++) {
  585. p = ehci->pshadow[i];
  586. if (likely(!p.ptr))
  587. continue;
  588. tag = Q_NEXT_TYPE(ehci, ehci->periodic[i]);
  589. temp = scnprintf(next, size, "%4d: ", i);
  590. size -= temp;
  591. next += temp;
  592. do {
  593. struct ehci_qh_hw *hw;
  594. switch (hc32_to_cpu(ehci, tag)) {
  595. case Q_TYPE_QH:
  596. hw = p.qh->hw;
  597. temp = scnprintf(next, size, " qh%d-%04x/%p",
  598. p.qh->ps.period,
  599. hc32_to_cpup(ehci,
  600. &hw->hw_info2)
  601. /* uframe masks */
  602. & (QH_CMASK | QH_SMASK),
  603. p.qh);
  604. size -= temp;
  605. next += temp;
  606. /* don't repeat what follows this qh */
  607. for (temp = 0; temp < seen_count; temp++) {
  608. if (seen[temp].ptr != p.ptr)
  609. continue;
  610. if (p.qh->qh_next.ptr) {
  611. temp = scnprintf(next, size,
  612. " ...");
  613. size -= temp;
  614. next += temp;
  615. }
  616. break;
  617. }
  618. /* show more info the first time around */
  619. if (temp == seen_count) {
  620. temp = output_buf_tds_dir(next, ehci,
  621. hw, p.qh, size);
  622. if (seen_count < DBG_SCHED_LIMIT)
  623. seen[seen_count++].qh = p.qh;
  624. } else {
  625. temp = 0;
  626. }
  627. tag = Q_NEXT_TYPE(ehci, hw->hw_next);
  628. p = p.qh->qh_next;
  629. break;
  630. case Q_TYPE_FSTN:
  631. temp = scnprintf(next, size,
  632. " fstn-%8x/%p", p.fstn->hw_prev,
  633. p.fstn);
  634. tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
  635. p = p.fstn->fstn_next;
  636. break;
  637. case Q_TYPE_ITD:
  638. temp = scnprintf(next, size,
  639. " itd/%p", p.itd);
  640. tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
  641. p = p.itd->itd_next;
  642. break;
  643. case Q_TYPE_SITD:
  644. temp = scnprintf(next, size,
  645. " sitd%d-%04x/%p",
  646. p.sitd->stream->ps.period,
  647. hc32_to_cpup(ehci, &p.sitd->hw_uframe)
  648. & 0x0000ffff,
  649. p.sitd);
  650. tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
  651. p = p.sitd->sitd_next;
  652. break;
  653. }
  654. size -= temp;
  655. next += temp;
  656. } while (p.ptr);
  657. temp = scnprintf(next, size, "\n");
  658. size -= temp;
  659. next += temp;
  660. }
  661. spin_unlock_irqrestore(&ehci->lock, flags);
  662. kfree(seen);
  663. return buf->alloc_size - size;
  664. }
  665. #undef DBG_SCHED_LIMIT
  666. static const char *rh_state_string(struct ehci_hcd *ehci)
  667. {
  668. switch (ehci->rh_state) {
  669. case EHCI_RH_HALTED:
  670. return "halted";
  671. case EHCI_RH_SUSPENDED:
  672. return "suspended";
  673. case EHCI_RH_RUNNING:
  674. return "running";
  675. case EHCI_RH_STOPPING:
  676. return "stopping";
  677. }
  678. return "?";
  679. }
  680. static ssize_t fill_registers_buffer(struct debug_buffer *buf)
  681. {
  682. struct usb_hcd *hcd;
  683. struct ehci_hcd *ehci;
  684. unsigned long flags;
  685. unsigned temp, size, i;
  686. char *next, scratch[80];
  687. static char fmt[] = "%*s\n";
  688. static char label[] = "";
  689. hcd = bus_to_hcd(buf->bus);
  690. ehci = hcd_to_ehci(hcd);
  691. next = buf->output_buf;
  692. size = buf->alloc_size;
  693. spin_lock_irqsave(&ehci->lock, flags);
  694. if (!HCD_HW_ACCESSIBLE(hcd)) {
  695. size = scnprintf(next, size,
  696. "bus %s, device %s\n"
  697. "%s\n"
  698. "SUSPENDED (no register access)\n",
  699. hcd->self.controller->bus->name,
  700. dev_name(hcd->self.controller),
  701. hcd->product_desc);
  702. goto done;
  703. }
  704. /* Capability Registers */
  705. i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
  706. temp = scnprintf(next, size,
  707. "bus %s, device %s\n"
  708. "%s\n"
  709. "EHCI %x.%02x, rh state %s\n",
  710. hcd->self.controller->bus->name,
  711. dev_name(hcd->self.controller),
  712. hcd->product_desc,
  713. i >> 8, i & 0x0ff, rh_state_string(ehci));
  714. size -= temp;
  715. next += temp;
  716. #ifdef CONFIG_USB_PCI
  717. /* EHCI 0.96 and later may have "extended capabilities" */
  718. if (dev_is_pci(hcd->self.controller)) {
  719. struct pci_dev *pdev;
  720. u32 offset, cap, cap2;
  721. unsigned count = 256 / 4;
  722. pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
  723. offset = HCC_EXT_CAPS(ehci_readl(ehci,
  724. &ehci->caps->hcc_params));
  725. while (offset && count--) {
  726. pci_read_config_dword(pdev, offset, &cap);
  727. switch (cap & 0xff) {
  728. case 1:
  729. temp = scnprintf(next, size,
  730. "ownership %08x%s%s\n", cap,
  731. (cap & (1 << 24)) ? " linux" : "",
  732. (cap & (1 << 16)) ? " firmware" : "");
  733. size -= temp;
  734. next += temp;
  735. offset += 4;
  736. pci_read_config_dword(pdev, offset, &cap2);
  737. temp = scnprintf(next, size,
  738. "SMI sts/enable 0x%08x\n", cap2);
  739. size -= temp;
  740. next += temp;
  741. break;
  742. case 0: /* illegal reserved capability */
  743. cap = 0;
  744. /* FALLTHROUGH */
  745. default: /* unknown */
  746. break;
  747. }
  748. offset = (cap >> 8) & 0xff;
  749. }
  750. }
  751. #endif
  752. /* FIXME interpret both types of params */
  753. i = ehci_readl(ehci, &ehci->caps->hcs_params);
  754. temp = scnprintf(next, size, "structural params 0x%08x\n", i);
  755. size -= temp;
  756. next += temp;
  757. i = ehci_readl(ehci, &ehci->caps->hcc_params);
  758. temp = scnprintf(next, size, "capability params 0x%08x\n", i);
  759. size -= temp;
  760. next += temp;
  761. /* Operational Registers */
  762. temp = dbg_status_buf(scratch, sizeof(scratch), label,
  763. ehci_readl(ehci, &ehci->regs->status));
  764. temp = scnprintf(next, size, fmt, temp, scratch);
  765. size -= temp;
  766. next += temp;
  767. temp = dbg_command_buf(scratch, sizeof(scratch), label,
  768. ehci_readl(ehci, &ehci->regs->command));
  769. temp = scnprintf(next, size, fmt, temp, scratch);
  770. size -= temp;
  771. next += temp;
  772. temp = dbg_intr_buf(scratch, sizeof(scratch), label,
  773. ehci_readl(ehci, &ehci->regs->intr_enable));
  774. temp = scnprintf(next, size, fmt, temp, scratch);
  775. size -= temp;
  776. next += temp;
  777. temp = scnprintf(next, size, "uframe %04x\n",
  778. ehci_read_frame_index(ehci));
  779. size -= temp;
  780. next += temp;
  781. for (i = 1; i <= HCS_N_PORTS(ehci->hcs_params); i++) {
  782. temp = dbg_port_buf(scratch, sizeof(scratch), label, i,
  783. ehci_readl(ehci,
  784. &ehci->regs->port_status[i - 1]));
  785. temp = scnprintf(next, size, fmt, temp, scratch);
  786. size -= temp;
  787. next += temp;
  788. if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
  789. temp = scnprintf(next, size,
  790. " debug control %08x\n",
  791. ehci_readl(ehci,
  792. &ehci->debug->control));
  793. size -= temp;
  794. next += temp;
  795. }
  796. }
  797. if (!list_empty(&ehci->async_unlink)) {
  798. temp = scnprintf(next, size, "async unlink qh %p\n",
  799. list_first_entry(&ehci->async_unlink,
  800. struct ehci_qh, unlink_node));
  801. size -= temp;
  802. next += temp;
  803. }
  804. #ifdef EHCI_STATS
  805. temp = scnprintf(next, size,
  806. "irq normal %ld err %ld iaa %ld (lost %ld)\n",
  807. ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
  808. ehci->stats.lost_iaa);
  809. size -= temp;
  810. next += temp;
  811. temp = scnprintf(next, size, "complete %ld unlink %ld\n",
  812. ehci->stats.complete, ehci->stats.unlink);
  813. size -= temp;
  814. next += temp;
  815. #endif
  816. done:
  817. spin_unlock_irqrestore(&ehci->lock, flags);
  818. return buf->alloc_size - size;
  819. }
  820. static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
  821. ssize_t (*fill_func)(struct debug_buffer *))
  822. {
  823. struct debug_buffer *buf;
  824. buf = kzalloc(sizeof(*buf), GFP_KERNEL);
  825. if (buf) {
  826. buf->bus = bus;
  827. buf->fill_func = fill_func;
  828. mutex_init(&buf->mutex);
  829. buf->alloc_size = PAGE_SIZE;
  830. }
  831. return buf;
  832. }
  833. static int fill_buffer(struct debug_buffer *buf)
  834. {
  835. int ret = 0;
  836. if (!buf->output_buf)
  837. buf->output_buf = vmalloc(buf->alloc_size);
  838. if (!buf->output_buf) {
  839. ret = -ENOMEM;
  840. goto out;
  841. }
  842. ret = buf->fill_func(buf);
  843. if (ret >= 0) {
  844. buf->count = ret;
  845. ret = 0;
  846. }
  847. out:
  848. return ret;
  849. }
  850. static ssize_t debug_output(struct file *file, char __user *user_buf,
  851. size_t len, loff_t *offset)
  852. {
  853. struct debug_buffer *buf = file->private_data;
  854. int ret = 0;
  855. mutex_lock(&buf->mutex);
  856. if (buf->count == 0) {
  857. ret = fill_buffer(buf);
  858. if (ret != 0) {
  859. mutex_unlock(&buf->mutex);
  860. goto out;
  861. }
  862. }
  863. mutex_unlock(&buf->mutex);
  864. ret = simple_read_from_buffer(user_buf, len, offset,
  865. buf->output_buf, buf->count);
  866. out:
  867. return ret;
  868. }
  869. static int debug_close(struct inode *inode, struct file *file)
  870. {
  871. struct debug_buffer *buf = file->private_data;
  872. if (buf) {
  873. vfree(buf->output_buf);
  874. kfree(buf);
  875. }
  876. return 0;
  877. }
  878. static int debug_async_open(struct inode *inode, struct file *file)
  879. {
  880. file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
  881. return file->private_data ? 0 : -ENOMEM;
  882. }
  883. static int debug_bandwidth_open(struct inode *inode, struct file *file)
  884. {
  885. file->private_data = alloc_buffer(inode->i_private,
  886. fill_bandwidth_buffer);
  887. return file->private_data ? 0 : -ENOMEM;
  888. }
  889. static int debug_periodic_open(struct inode *inode, struct file *file)
  890. {
  891. struct debug_buffer *buf;
  892. buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
  893. if (!buf)
  894. return -ENOMEM;
  895. buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE;
  896. file->private_data = buf;
  897. return 0;
  898. }
  899. static int debug_registers_open(struct inode *inode, struct file *file)
  900. {
  901. file->private_data = alloc_buffer(inode->i_private,
  902. fill_registers_buffer);
  903. return file->private_data ? 0 : -ENOMEM;
  904. }
  905. static inline void create_debug_files(struct ehci_hcd *ehci)
  906. {
  907. struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
  908. ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
  909. debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
  910. &debug_async_fops);
  911. debugfs_create_file("bandwidth", S_IRUGO, ehci->debug_dir, bus,
  912. &debug_bandwidth_fops);
  913. debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
  914. &debug_periodic_fops);
  915. debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
  916. &debug_registers_fops);
  917. }
  918. static inline void remove_debug_files(struct ehci_hcd *ehci)
  919. {
  920. debugfs_remove_recursive(ehci->debug_dir);
  921. }
  922. #else /* CONFIG_DYNAMIC_DEBUG */
  923. static inline void dbg_hcs_params(struct ehci_hcd *ehci, char *label) { }
  924. static inline void dbg_hcc_params(struct ehci_hcd *ehci, char *label) { }
  925. static inline void __maybe_unused dbg_qh(const char *label,
  926. struct ehci_hcd *ehci, struct ehci_qh *qh) { }
  927. static inline int __maybe_unused dbg_status_buf(const char *buf,
  928. unsigned int len, const char *label, u32 status)
  929. { return 0; }
  930. static inline int __maybe_unused dbg_command_buf(const char *buf,
  931. unsigned int len, const char *label, u32 command)
  932. { return 0; }
  933. static inline int __maybe_unused dbg_intr_buf(const char *buf,
  934. unsigned int len, const char *label, u32 enable)
  935. { return 0; }
  936. static inline int __maybe_unused dbg_port_buf(char *buf,
  937. unsigned int len, const char *label, int port, u32 status)
  938. { return 0; }
  939. static inline void dbg_status(struct ehci_hcd *ehci, const char *label,
  940. u32 status) { }
  941. static inline void dbg_cmd(struct ehci_hcd *ehci, const char *label,
  942. u32 command) { }
  943. static inline void dbg_port(struct ehci_hcd *ehci, const char *label,
  944. int port, u32 status) { }
  945. static inline void create_debug_files(struct ehci_hcd *bus) { }
  946. static inline void remove_debug_files(struct ehci_hcd *bus) { }
  947. #endif /* CONFIG_DYNAMIC_DEBUG */