bcma-hcd.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Broadcom specific Advanced Microcontroller Bus
  4. * Broadcom USB-core driver (BCMA bus glue)
  5. *
  6. * Copyright 2011-2015 Hauke Mehrtens <hauke@hauke-m.de>
  7. * Copyright 2015 Felix Fietkau <nbd@openwrt.org>
  8. *
  9. * Based on ssb-ohci driver
  10. * Copyright 2007 Michael Buesch <m@bues.ch>
  11. *
  12. * Derived from the OHCI-PCI driver
  13. * Copyright 1999 Roman Weissgaerber
  14. * Copyright 2000-2002 David Brownell
  15. * Copyright 1999 Linus Torvalds
  16. * Copyright 1999 Gregory P. Smith
  17. *
  18. * Derived from the USBcore related parts of Broadcom-SB
  19. * Copyright 2005-2011 Broadcom Corporation
  20. */
  21. #include <linux/bcma/bcma.h>
  22. #include <linux/delay.h>
  23. #include <linux/gpio/consumer.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/module.h>
  26. #include <linux/slab.h>
  27. #include <linux/of.h>
  28. #include <linux/of_gpio.h>
  29. #include <linux/of_platform.h>
  30. #include <linux/usb/ehci_pdriver.h>
  31. #include <linux/usb/ohci_pdriver.h>
  32. MODULE_AUTHOR("Hauke Mehrtens");
  33. MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
  34. MODULE_LICENSE("GPL");
  35. /* See BCMA_CLKCTLST_EXTRESREQ and BCMA_CLKCTLST_EXTRESST */
  36. #define USB_BCMA_CLKCTLST_USB_CLK_REQ 0x00000100
  37. struct bcma_hcd_device {
  38. struct bcma_device *core;
  39. struct platform_device *ehci_dev;
  40. struct platform_device *ohci_dev;
  41. struct gpio_desc *gpio_desc;
  42. };
  43. /* Wait for bitmask in a register to get set or cleared.
  44. * timeout is in units of ten-microseconds.
  45. */
  46. static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
  47. int timeout)
  48. {
  49. int i;
  50. u32 val;
  51. for (i = 0; i < timeout; i++) {
  52. val = bcma_read32(dev, reg);
  53. if ((val & bitmask) == bitmask)
  54. return 0;
  55. udelay(10);
  56. }
  57. return -ETIMEDOUT;
  58. }
  59. static void bcma_hcd_4716wa(struct bcma_device *dev)
  60. {
  61. #ifdef CONFIG_BCMA_DRIVER_MIPS
  62. /* Work around for 4716 failures. */
  63. if (dev->bus->chipinfo.id == 0x4716) {
  64. u32 tmp;
  65. tmp = bcma_cpu_clock(&dev->bus->drv_mips);
  66. if (tmp >= 480000000)
  67. tmp = 0x1846b; /* set CDR to 0x11(fast) */
  68. else if (tmp == 453000000)
  69. tmp = 0x1046b; /* set CDR to 0x10(slow) */
  70. else
  71. tmp = 0;
  72. /* Change Shim mdio control reg to fix host not acking at
  73. * high frequencies
  74. */
  75. if (tmp) {
  76. bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
  77. udelay(500);
  78. bcma_write32(dev, 0x524, tmp);
  79. udelay(500);
  80. bcma_write32(dev, 0x524, 0x4ab);
  81. udelay(500);
  82. bcma_read32(dev, 0x528);
  83. bcma_write32(dev, 0x528, 0x80000000);
  84. }
  85. }
  86. #endif /* CONFIG_BCMA_DRIVER_MIPS */
  87. }
  88. /* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
  89. static void bcma_hcd_init_chip_mips(struct bcma_device *dev)
  90. {
  91. u32 tmp;
  92. /*
  93. * USB 2.0 special considerations:
  94. *
  95. * 1. Since the core supports both OHCI and EHCI functions, it must
  96. * only be reset once.
  97. *
  98. * 2. In addition to the standard SI reset sequence, the Host Control
  99. * Register must be programmed to bring the USB core and various
  100. * phy components out of reset.
  101. */
  102. if (!bcma_core_is_enabled(dev)) {
  103. bcma_core_enable(dev, 0);
  104. mdelay(10);
  105. if (dev->id.rev >= 5) {
  106. /* Enable Misc PLL */
  107. tmp = bcma_read32(dev, 0x1e0);
  108. tmp |= 0x100;
  109. bcma_write32(dev, 0x1e0, tmp);
  110. if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
  111. printk(KERN_EMERG "Failed to enable misc PPL!\n");
  112. /* Take out of resets */
  113. bcma_write32(dev, 0x200, 0x4ff);
  114. udelay(25);
  115. bcma_write32(dev, 0x200, 0x6ff);
  116. udelay(25);
  117. /* Make sure digital and AFE are locked in USB PHY */
  118. bcma_write32(dev, 0x524, 0x6b);
  119. udelay(50);
  120. tmp = bcma_read32(dev, 0x524);
  121. udelay(50);
  122. bcma_write32(dev, 0x524, 0xab);
  123. udelay(50);
  124. tmp = bcma_read32(dev, 0x524);
  125. udelay(50);
  126. bcma_write32(dev, 0x524, 0x2b);
  127. udelay(50);
  128. tmp = bcma_read32(dev, 0x524);
  129. udelay(50);
  130. bcma_write32(dev, 0x524, 0x10ab);
  131. udelay(50);
  132. tmp = bcma_read32(dev, 0x524);
  133. if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
  134. tmp = bcma_read32(dev, 0x528);
  135. printk(KERN_EMERG
  136. "USB20H mdio_rddata 0x%08x\n", tmp);
  137. }
  138. bcma_write32(dev, 0x528, 0x80000000);
  139. tmp = bcma_read32(dev, 0x314);
  140. udelay(265);
  141. bcma_write32(dev, 0x200, 0x7ff);
  142. udelay(10);
  143. /* Take USB and HSIC out of non-driving modes */
  144. bcma_write32(dev, 0x510, 0);
  145. } else {
  146. bcma_write32(dev, 0x200, 0x7ff);
  147. udelay(1);
  148. }
  149. bcma_hcd_4716wa(dev);
  150. }
  151. }
  152. /**
  153. * bcma_hcd_usb20_old_arm_init - Initialize old USB 2.0 controller on ARM
  154. *
  155. * Old USB 2.0 core is identified as BCMA_CORE_USB20_HOST and was introduced
  156. * long before Northstar devices. It seems some cheaper chipsets like BCM53573
  157. * still use it.
  158. * Initialization of this old core differs between MIPS and ARM.
  159. */
  160. static int bcma_hcd_usb20_old_arm_init(struct bcma_hcd_device *usb_dev)
  161. {
  162. struct bcma_device *core = usb_dev->core;
  163. struct device *dev = &core->dev;
  164. struct bcma_device *pmu_core;
  165. usleep_range(10000, 20000);
  166. if (core->id.rev < 5)
  167. return 0;
  168. pmu_core = bcma_find_core(core->bus, BCMA_CORE_PMU);
  169. if (!pmu_core) {
  170. dev_err(dev, "Could not find PMU core\n");
  171. return -ENOENT;
  172. }
  173. /* Take USB core out of reset */
  174. bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK | BCMA_IOCTL_FGC);
  175. usleep_range(100, 200);
  176. bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
  177. usleep_range(100, 200);
  178. bcma_awrite32(core, BCMA_RESET_CTL, 0);
  179. usleep_range(100, 200);
  180. bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK);
  181. usleep_range(100, 200);
  182. /* Enable Misc PLL */
  183. bcma_write32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT |
  184. BCMA_CLKCTLST_HQCLKREQ |
  185. USB_BCMA_CLKCTLST_USB_CLK_REQ);
  186. usleep_range(100, 200);
  187. bcma_write32(core, 0x510, 0xc7f85000);
  188. bcma_write32(core, 0x510, 0xc7f85003);
  189. usleep_range(300, 600);
  190. /* Program USB PHY PLL parameters */
  191. bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x6);
  192. bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x005360c1);
  193. usleep_range(100, 200);
  194. bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x7);
  195. bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x0);
  196. usleep_range(100, 200);
  197. bcma_set32(pmu_core, BCMA_CC_PMU_CTL, BCMA_CC_PMU_CTL_PLL_UPD);
  198. usleep_range(100, 200);
  199. bcma_write32(core, 0x510, 0x7f8d007);
  200. udelay(1000);
  201. /* Take controller out of reset */
  202. bcma_write32(core, 0x200, 0x4ff);
  203. usleep_range(25, 50);
  204. bcma_write32(core, 0x200, 0x6ff);
  205. usleep_range(25, 50);
  206. bcma_write32(core, 0x200, 0x7ff);
  207. usleep_range(25, 50);
  208. of_platform_default_populate(dev->of_node, NULL, dev);
  209. return 0;
  210. }
  211. static void bcma_hcd_usb20_ns_init_hc(struct bcma_device *dev)
  212. {
  213. u32 val;
  214. /* Set packet buffer OUT threshold */
  215. val = bcma_read32(dev, 0x94);
  216. val &= 0xffff;
  217. val |= 0x80 << 16;
  218. bcma_write32(dev, 0x94, val);
  219. /* Enable break memory transfer */
  220. val = bcma_read32(dev, 0x9c);
  221. val |= 1;
  222. bcma_write32(dev, 0x9c, val);
  223. /*
  224. * Broadcom initializes PHY and then waits to ensure HC is ready to be
  225. * configured. In our case the order is reversed. We just initialized
  226. * controller and we let HCD initialize PHY, so let's wait (sleep) now.
  227. */
  228. usleep_range(1000, 2000);
  229. }
  230. /**
  231. * bcma_hcd_usb20_ns_init - Initialize Northstar USB 2.0 controller
  232. */
  233. static int bcma_hcd_usb20_ns_init(struct bcma_hcd_device *bcma_hcd)
  234. {
  235. struct bcma_device *core = bcma_hcd->core;
  236. struct bcma_chipinfo *ci = &core->bus->chipinfo;
  237. struct device *dev = &core->dev;
  238. bcma_core_enable(core, 0);
  239. if (ci->id == BCMA_CHIP_ID_BCM4707 ||
  240. ci->id == BCMA_CHIP_ID_BCM53018)
  241. bcma_hcd_usb20_ns_init_hc(core);
  242. of_platform_default_populate(dev->of_node, NULL, dev);
  243. return 0;
  244. }
  245. static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val)
  246. {
  247. struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
  248. if (IS_ERR_OR_NULL(usb_dev->gpio_desc))
  249. return;
  250. gpiod_set_value(usb_dev->gpio_desc, val);
  251. }
  252. static const struct usb_ehci_pdata ehci_pdata = {
  253. };
  254. static const struct usb_ohci_pdata ohci_pdata = {
  255. };
  256. static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
  257. const char *name, u32 addr,
  258. const void *data,
  259. size_t size)
  260. {
  261. struct platform_device *hci_dev;
  262. struct resource hci_res[2];
  263. int ret;
  264. memset(hci_res, 0, sizeof(hci_res));
  265. hci_res[0].start = addr;
  266. hci_res[0].end = hci_res[0].start + 0x1000 - 1;
  267. hci_res[0].flags = IORESOURCE_MEM;
  268. hci_res[1].start = dev->irq;
  269. hci_res[1].flags = IORESOURCE_IRQ;
  270. hci_dev = platform_device_alloc(name, 0);
  271. if (!hci_dev)
  272. return ERR_PTR(-ENOMEM);
  273. hci_dev->dev.parent = &dev->dev;
  274. hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
  275. ret = platform_device_add_resources(hci_dev, hci_res,
  276. ARRAY_SIZE(hci_res));
  277. if (ret)
  278. goto err_alloc;
  279. if (data)
  280. ret = platform_device_add_data(hci_dev, data, size);
  281. if (ret)
  282. goto err_alloc;
  283. ret = platform_device_add(hci_dev);
  284. if (ret)
  285. goto err_alloc;
  286. return hci_dev;
  287. err_alloc:
  288. platform_device_put(hci_dev);
  289. return ERR_PTR(ret);
  290. }
  291. static int bcma_hcd_usb20_init(struct bcma_hcd_device *usb_dev)
  292. {
  293. struct bcma_device *dev = usb_dev->core;
  294. struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo;
  295. u32 ohci_addr;
  296. int err;
  297. if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
  298. return -EOPNOTSUPP;
  299. bcma_hcd_init_chip_mips(dev);
  300. /* In AI chips EHCI is addrspace 0, OHCI is 1 */
  301. ohci_addr = dev->addr_s[0];
  302. if ((chipinfo->id == BCMA_CHIP_ID_BCM5357 ||
  303. chipinfo->id == BCMA_CHIP_ID_BCM4749)
  304. && chipinfo->rev == 0)
  305. ohci_addr = 0x18009000;
  306. usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform",
  307. ohci_addr, &ohci_pdata,
  308. sizeof(ohci_pdata));
  309. if (IS_ERR(usb_dev->ohci_dev))
  310. return PTR_ERR(usb_dev->ohci_dev);
  311. usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform",
  312. dev->addr, &ehci_pdata,
  313. sizeof(ehci_pdata));
  314. if (IS_ERR(usb_dev->ehci_dev)) {
  315. err = PTR_ERR(usb_dev->ehci_dev);
  316. goto err_unregister_ohci_dev;
  317. }
  318. return 0;
  319. err_unregister_ohci_dev:
  320. platform_device_unregister(usb_dev->ohci_dev);
  321. return err;
  322. }
  323. static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd)
  324. {
  325. struct bcma_device *core = bcma_hcd->core;
  326. struct device *dev = &core->dev;
  327. bcma_core_enable(core, 0);
  328. of_platform_default_populate(dev->of_node, NULL, dev);
  329. return 0;
  330. }
  331. static int bcma_hcd_probe(struct bcma_device *core)
  332. {
  333. int err;
  334. struct bcma_hcd_device *usb_dev;
  335. /* TODO: Probably need checks here; is the core connected? */
  336. usb_dev = devm_kzalloc(&core->dev, sizeof(struct bcma_hcd_device),
  337. GFP_KERNEL);
  338. if (!usb_dev)
  339. return -ENOMEM;
  340. usb_dev->core = core;
  341. if (core->dev.of_node)
  342. usb_dev->gpio_desc = devm_gpiod_get(&core->dev, "vcc",
  343. GPIOD_OUT_HIGH);
  344. switch (core->id.id) {
  345. case BCMA_CORE_USB20_HOST:
  346. if (IS_ENABLED(CONFIG_ARM))
  347. err = bcma_hcd_usb20_old_arm_init(usb_dev);
  348. else if (IS_ENABLED(CONFIG_MIPS))
  349. err = bcma_hcd_usb20_init(usb_dev);
  350. else
  351. err = -ENOTSUPP;
  352. break;
  353. case BCMA_CORE_NS_USB20:
  354. err = bcma_hcd_usb20_ns_init(usb_dev);
  355. break;
  356. case BCMA_CORE_NS_USB30:
  357. err = bcma_hcd_usb30_init(usb_dev);
  358. break;
  359. default:
  360. return -ENODEV;
  361. }
  362. if (err)
  363. return err;
  364. bcma_set_drvdata(core, usb_dev);
  365. return 0;
  366. }
  367. static void bcma_hcd_remove(struct bcma_device *dev)
  368. {
  369. struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
  370. struct platform_device *ohci_dev = usb_dev->ohci_dev;
  371. struct platform_device *ehci_dev = usb_dev->ehci_dev;
  372. if (ohci_dev)
  373. platform_device_unregister(ohci_dev);
  374. if (ehci_dev)
  375. platform_device_unregister(ehci_dev);
  376. bcma_core_disable(dev, 0);
  377. }
  378. static void bcma_hcd_shutdown(struct bcma_device *dev)
  379. {
  380. bcma_hci_platform_power_gpio(dev, false);
  381. bcma_core_disable(dev, 0);
  382. }
  383. #ifdef CONFIG_PM
  384. static int bcma_hcd_suspend(struct bcma_device *dev)
  385. {
  386. bcma_hci_platform_power_gpio(dev, false);
  387. bcma_core_disable(dev, 0);
  388. return 0;
  389. }
  390. static int bcma_hcd_resume(struct bcma_device *dev)
  391. {
  392. bcma_hci_platform_power_gpio(dev, true);
  393. bcma_core_enable(dev, 0);
  394. return 0;
  395. }
  396. #else /* !CONFIG_PM */
  397. #define bcma_hcd_suspend NULL
  398. #define bcma_hcd_resume NULL
  399. #endif /* CONFIG_PM */
  400. static const struct bcma_device_id bcma_hcd_table[] = {
  401. BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
  402. BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS),
  403. BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB30, BCMA_ANY_REV, BCMA_ANY_CLASS),
  404. {},
  405. };
  406. MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
  407. static struct bcma_driver bcma_hcd_driver = {
  408. .name = KBUILD_MODNAME,
  409. .id_table = bcma_hcd_table,
  410. .probe = bcma_hcd_probe,
  411. .remove = bcma_hcd_remove,
  412. .shutdown = bcma_hcd_shutdown,
  413. .suspend = bcma_hcd_suspend,
  414. .resume = bcma_hcd_resume,
  415. };
  416. static int __init bcma_hcd_init(void)
  417. {
  418. return bcma_driver_register(&bcma_hcd_driver);
  419. }
  420. module_init(bcma_hcd_init);
  421. static void __exit bcma_hcd_exit(void)
  422. {
  423. bcma_driver_unregister(&bcma_hcd_driver);
  424. }
  425. module_exit(bcma_hcd_exit);