sunsu.c 38 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  4. *
  5. * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
  6. * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
  7. *
  8. * This is mainly a variation of 8250.c, credits go to authors mentioned
  9. * therein. In fact this driver should be merged into the generic 8250.c
  10. * infrastructure perhaps using a 8250_sparc.c module.
  11. *
  12. * Fixed to use tty_get_baud_rate().
  13. * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  14. *
  15. * Converted to new 2.5.x UART layer.
  16. * David S. Miller (davem@davemloft.net), 2002-Jul-29
  17. */
  18. #include <linux/module.h>
  19. #include <linux/kernel.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/errno.h>
  22. #include <linux/tty.h>
  23. #include <linux/tty_flip.h>
  24. #include <linux/major.h>
  25. #include <linux/string.h>
  26. #include <linux/ptrace.h>
  27. #include <linux/ioport.h>
  28. #include <linux/circ_buf.h>
  29. #include <linux/serial.h>
  30. #include <linux/sysrq.h>
  31. #include <linux/console.h>
  32. #include <linux/slab.h>
  33. #ifdef CONFIG_SERIO
  34. #include <linux/serio.h>
  35. #endif
  36. #include <linux/serial_reg.h>
  37. #include <linux/init.h>
  38. #include <linux/delay.h>
  39. #include <linux/of_device.h>
  40. #include <asm/io.h>
  41. #include <asm/irq.h>
  42. #include <asm/prom.h>
  43. #include <asm/setup.h>
  44. #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  45. #define SUPPORT_SYSRQ
  46. #endif
  47. #include <linux/serial_core.h>
  48. #include <linux/sunserialcore.h>
  49. /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  50. * in a UART clock of 1.8462 MHz.
  51. */
  52. #define SU_BASE_BAUD (1846200 / 16)
  53. enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  54. static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  55. struct serial_uart_config {
  56. char *name;
  57. int dfl_xmit_fifo_size;
  58. int flags;
  59. };
  60. /*
  61. * Here we define the default xmit fifo size used for each type of UART.
  62. */
  63. static const struct serial_uart_config uart_config[] = {
  64. { "unknown", 1, 0 },
  65. { "8250", 1, 0 },
  66. { "16450", 1, 0 },
  67. { "16550", 1, 0 },
  68. { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
  69. { "Cirrus", 1, 0 },
  70. { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
  71. { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  72. { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
  73. { "Startech", 1, 0 },
  74. { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
  75. { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  76. { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  77. { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
  78. };
  79. struct uart_sunsu_port {
  80. struct uart_port port;
  81. unsigned char acr;
  82. unsigned char ier;
  83. unsigned short rev;
  84. unsigned char lcr;
  85. unsigned int lsr_break_flag;
  86. unsigned int cflag;
  87. /* Probing information. */
  88. enum su_type su_type;
  89. unsigned int type_probed; /* XXX Stupid */
  90. unsigned long reg_size;
  91. #ifdef CONFIG_SERIO
  92. struct serio serio;
  93. int serio_open;
  94. #endif
  95. };
  96. static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
  97. {
  98. offset <<= up->port.regshift;
  99. switch (up->port.iotype) {
  100. case UPIO_HUB6:
  101. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  102. return inb(up->port.iobase + 1);
  103. case UPIO_MEM:
  104. return readb(up->port.membase + offset);
  105. default:
  106. return inb(up->port.iobase + offset);
  107. }
  108. }
  109. static void serial_out(struct uart_sunsu_port *up, int offset, int value)
  110. {
  111. #ifndef CONFIG_SPARC64
  112. /*
  113. * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
  114. * connected with a gate then go to SlavIO. When IRQ4 goes tristated
  115. * gate outputs a logical one. Since we use level triggered interrupts
  116. * we have lockup and watchdog reset. We cannot mask IRQ because
  117. * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
  118. * This problem is similar to what Alpha people suffer, see serial.c.
  119. */
  120. if (offset == UART_MCR)
  121. value |= UART_MCR_OUT2;
  122. #endif
  123. offset <<= up->port.regshift;
  124. switch (up->port.iotype) {
  125. case UPIO_HUB6:
  126. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  127. outb(value, up->port.iobase + 1);
  128. break;
  129. case UPIO_MEM:
  130. writeb(value, up->port.membase + offset);
  131. break;
  132. default:
  133. outb(value, up->port.iobase + offset);
  134. }
  135. }
  136. /*
  137. * We used to support using pause I/O for certain machines. We
  138. * haven't supported this for a while, but just in case it's badly
  139. * needed for certain old 386 machines, I've left these #define's
  140. * in....
  141. */
  142. #define serial_inp(up, offset) serial_in(up, offset)
  143. #define serial_outp(up, offset, value) serial_out(up, offset, value)
  144. /*
  145. * For the 16C950
  146. */
  147. static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
  148. {
  149. serial_out(up, UART_SCR, offset);
  150. serial_out(up, UART_ICR, value);
  151. }
  152. #if 0 /* Unused currently */
  153. static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
  154. {
  155. unsigned int value;
  156. serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
  157. serial_out(up, UART_SCR, offset);
  158. value = serial_in(up, UART_ICR);
  159. serial_icr_write(up, UART_ACR, up->acr);
  160. return value;
  161. }
  162. #endif
  163. #ifdef CONFIG_SERIAL_8250_RSA
  164. /*
  165. * Attempts to turn on the RSA FIFO. Returns zero on failure.
  166. * We set the port uart clock rate if we succeed.
  167. */
  168. static int __enable_rsa(struct uart_sunsu_port *up)
  169. {
  170. unsigned char mode;
  171. int result;
  172. mode = serial_inp(up, UART_RSA_MSR);
  173. result = mode & UART_RSA_MSR_FIFO;
  174. if (!result) {
  175. serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
  176. mode = serial_inp(up, UART_RSA_MSR);
  177. result = mode & UART_RSA_MSR_FIFO;
  178. }
  179. if (result)
  180. up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
  181. return result;
  182. }
  183. static void enable_rsa(struct uart_sunsu_port *up)
  184. {
  185. if (up->port.type == PORT_RSA) {
  186. if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
  187. spin_lock_irq(&up->port.lock);
  188. __enable_rsa(up);
  189. spin_unlock_irq(&up->port.lock);
  190. }
  191. if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
  192. serial_outp(up, UART_RSA_FRR, 0);
  193. }
  194. }
  195. /*
  196. * Attempts to turn off the RSA FIFO. Returns zero on failure.
  197. * It is unknown why interrupts were disabled in here. However,
  198. * the caller is expected to preserve this behaviour by grabbing
  199. * the spinlock before calling this function.
  200. */
  201. static void disable_rsa(struct uart_sunsu_port *up)
  202. {
  203. unsigned char mode;
  204. int result;
  205. if (up->port.type == PORT_RSA &&
  206. up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
  207. spin_lock_irq(&up->port.lock);
  208. mode = serial_inp(up, UART_RSA_MSR);
  209. result = !(mode & UART_RSA_MSR_FIFO);
  210. if (!result) {
  211. serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
  212. mode = serial_inp(up, UART_RSA_MSR);
  213. result = !(mode & UART_RSA_MSR_FIFO);
  214. }
  215. if (result)
  216. up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
  217. spin_unlock_irq(&up->port.lock);
  218. }
  219. }
  220. #endif /* CONFIG_SERIAL_8250_RSA */
  221. static inline void __stop_tx(struct uart_sunsu_port *p)
  222. {
  223. if (p->ier & UART_IER_THRI) {
  224. p->ier &= ~UART_IER_THRI;
  225. serial_out(p, UART_IER, p->ier);
  226. }
  227. }
  228. static void sunsu_stop_tx(struct uart_port *port)
  229. {
  230. struct uart_sunsu_port *up =
  231. container_of(port, struct uart_sunsu_port, port);
  232. __stop_tx(up);
  233. /*
  234. * We really want to stop the transmitter from sending.
  235. */
  236. if (up->port.type == PORT_16C950) {
  237. up->acr |= UART_ACR_TXDIS;
  238. serial_icr_write(up, UART_ACR, up->acr);
  239. }
  240. }
  241. static void sunsu_start_tx(struct uart_port *port)
  242. {
  243. struct uart_sunsu_port *up =
  244. container_of(port, struct uart_sunsu_port, port);
  245. if (!(up->ier & UART_IER_THRI)) {
  246. up->ier |= UART_IER_THRI;
  247. serial_out(up, UART_IER, up->ier);
  248. }
  249. /*
  250. * Re-enable the transmitter if we disabled it.
  251. */
  252. if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
  253. up->acr &= ~UART_ACR_TXDIS;
  254. serial_icr_write(up, UART_ACR, up->acr);
  255. }
  256. }
  257. static void sunsu_stop_rx(struct uart_port *port)
  258. {
  259. struct uart_sunsu_port *up =
  260. container_of(port, struct uart_sunsu_port, port);
  261. up->ier &= ~UART_IER_RLSI;
  262. up->port.read_status_mask &= ~UART_LSR_DR;
  263. serial_out(up, UART_IER, up->ier);
  264. }
  265. static void sunsu_enable_ms(struct uart_port *port)
  266. {
  267. struct uart_sunsu_port *up =
  268. container_of(port, struct uart_sunsu_port, port);
  269. unsigned long flags;
  270. spin_lock_irqsave(&up->port.lock, flags);
  271. up->ier |= UART_IER_MSI;
  272. serial_out(up, UART_IER, up->ier);
  273. spin_unlock_irqrestore(&up->port.lock, flags);
  274. }
  275. static void
  276. receive_chars(struct uart_sunsu_port *up, unsigned char *status)
  277. {
  278. struct tty_port *port = &up->port.state->port;
  279. unsigned char ch, flag;
  280. int max_count = 256;
  281. int saw_console_brk = 0;
  282. do {
  283. ch = serial_inp(up, UART_RX);
  284. flag = TTY_NORMAL;
  285. up->port.icount.rx++;
  286. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  287. UART_LSR_FE | UART_LSR_OE))) {
  288. /*
  289. * For statistics only
  290. */
  291. if (*status & UART_LSR_BI) {
  292. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  293. up->port.icount.brk++;
  294. if (up->port.cons != NULL &&
  295. up->port.line == up->port.cons->index)
  296. saw_console_brk = 1;
  297. /*
  298. * We do the SysRQ and SAK checking
  299. * here because otherwise the break
  300. * may get masked by ignore_status_mask
  301. * or read_status_mask.
  302. */
  303. if (uart_handle_break(&up->port))
  304. goto ignore_char;
  305. } else if (*status & UART_LSR_PE)
  306. up->port.icount.parity++;
  307. else if (*status & UART_LSR_FE)
  308. up->port.icount.frame++;
  309. if (*status & UART_LSR_OE)
  310. up->port.icount.overrun++;
  311. /*
  312. * Mask off conditions which should be ingored.
  313. */
  314. *status &= up->port.read_status_mask;
  315. if (up->port.cons != NULL &&
  316. up->port.line == up->port.cons->index) {
  317. /* Recover the break flag from console xmit */
  318. *status |= up->lsr_break_flag;
  319. up->lsr_break_flag = 0;
  320. }
  321. if (*status & UART_LSR_BI) {
  322. flag = TTY_BREAK;
  323. } else if (*status & UART_LSR_PE)
  324. flag = TTY_PARITY;
  325. else if (*status & UART_LSR_FE)
  326. flag = TTY_FRAME;
  327. }
  328. if (uart_handle_sysrq_char(&up->port, ch))
  329. goto ignore_char;
  330. if ((*status & up->port.ignore_status_mask) == 0)
  331. tty_insert_flip_char(port, ch, flag);
  332. if (*status & UART_LSR_OE)
  333. /*
  334. * Overrun is special, since it's reported
  335. * immediately, and doesn't affect the current
  336. * character.
  337. */
  338. tty_insert_flip_char(port, 0, TTY_OVERRUN);
  339. ignore_char:
  340. *status = serial_inp(up, UART_LSR);
  341. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  342. if (saw_console_brk)
  343. sun_do_break();
  344. }
  345. static void transmit_chars(struct uart_sunsu_port *up)
  346. {
  347. struct circ_buf *xmit = &up->port.state->xmit;
  348. int count;
  349. if (up->port.x_char) {
  350. serial_outp(up, UART_TX, up->port.x_char);
  351. up->port.icount.tx++;
  352. up->port.x_char = 0;
  353. return;
  354. }
  355. if (uart_tx_stopped(&up->port)) {
  356. sunsu_stop_tx(&up->port);
  357. return;
  358. }
  359. if (uart_circ_empty(xmit)) {
  360. __stop_tx(up);
  361. return;
  362. }
  363. count = up->port.fifosize;
  364. do {
  365. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  366. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  367. up->port.icount.tx++;
  368. if (uart_circ_empty(xmit))
  369. break;
  370. } while (--count > 0);
  371. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  372. uart_write_wakeup(&up->port);
  373. if (uart_circ_empty(xmit))
  374. __stop_tx(up);
  375. }
  376. static void check_modem_status(struct uart_sunsu_port *up)
  377. {
  378. int status;
  379. status = serial_in(up, UART_MSR);
  380. if ((status & UART_MSR_ANY_DELTA) == 0)
  381. return;
  382. if (status & UART_MSR_TERI)
  383. up->port.icount.rng++;
  384. if (status & UART_MSR_DDSR)
  385. up->port.icount.dsr++;
  386. if (status & UART_MSR_DDCD)
  387. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  388. if (status & UART_MSR_DCTS)
  389. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  390. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  391. }
  392. static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
  393. {
  394. struct uart_sunsu_port *up = dev_id;
  395. unsigned long flags;
  396. unsigned char status;
  397. spin_lock_irqsave(&up->port.lock, flags);
  398. do {
  399. status = serial_inp(up, UART_LSR);
  400. if (status & UART_LSR_DR)
  401. receive_chars(up, &status);
  402. check_modem_status(up);
  403. if (status & UART_LSR_THRE)
  404. transmit_chars(up);
  405. spin_unlock_irqrestore(&up->port.lock, flags);
  406. tty_flip_buffer_push(&up->port.state->port);
  407. spin_lock_irqsave(&up->port.lock, flags);
  408. } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
  409. spin_unlock_irqrestore(&up->port.lock, flags);
  410. return IRQ_HANDLED;
  411. }
  412. /* Separate interrupt handling path for keyboard/mouse ports. */
  413. static void
  414. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  415. unsigned int iflag, unsigned int quot);
  416. static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
  417. {
  418. unsigned int cur_cflag = up->cflag;
  419. int quot, new_baud;
  420. up->cflag &= ~CBAUD;
  421. up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
  422. quot = up->port.uartclk / (16 * new_baud);
  423. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  424. }
  425. static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
  426. {
  427. do {
  428. unsigned char ch = serial_inp(up, UART_RX);
  429. /* Stop-A is handled by drivers/char/keyboard.c now. */
  430. if (up->su_type == SU_PORT_KBD) {
  431. #ifdef CONFIG_SERIO
  432. serio_interrupt(&up->serio, ch, 0);
  433. #endif
  434. } else if (up->su_type == SU_PORT_MS) {
  435. int ret = suncore_mouse_baud_detection(ch, is_break);
  436. switch (ret) {
  437. case 2:
  438. sunsu_change_mouse_baud(up);
  439. /* fallthru */
  440. case 1:
  441. break;
  442. case 0:
  443. #ifdef CONFIG_SERIO
  444. serio_interrupt(&up->serio, ch, 0);
  445. #endif
  446. break;
  447. }
  448. }
  449. } while (serial_in(up, UART_LSR) & UART_LSR_DR);
  450. }
  451. static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
  452. {
  453. struct uart_sunsu_port *up = dev_id;
  454. if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
  455. unsigned char status = serial_inp(up, UART_LSR);
  456. if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
  457. receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
  458. }
  459. return IRQ_HANDLED;
  460. }
  461. static unsigned int sunsu_tx_empty(struct uart_port *port)
  462. {
  463. struct uart_sunsu_port *up =
  464. container_of(port, struct uart_sunsu_port, port);
  465. unsigned long flags;
  466. unsigned int ret;
  467. spin_lock_irqsave(&up->port.lock, flags);
  468. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  469. spin_unlock_irqrestore(&up->port.lock, flags);
  470. return ret;
  471. }
  472. static unsigned int sunsu_get_mctrl(struct uart_port *port)
  473. {
  474. struct uart_sunsu_port *up =
  475. container_of(port, struct uart_sunsu_port, port);
  476. unsigned char status;
  477. unsigned int ret;
  478. status = serial_in(up, UART_MSR);
  479. ret = 0;
  480. if (status & UART_MSR_DCD)
  481. ret |= TIOCM_CAR;
  482. if (status & UART_MSR_RI)
  483. ret |= TIOCM_RNG;
  484. if (status & UART_MSR_DSR)
  485. ret |= TIOCM_DSR;
  486. if (status & UART_MSR_CTS)
  487. ret |= TIOCM_CTS;
  488. return ret;
  489. }
  490. static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  491. {
  492. struct uart_sunsu_port *up =
  493. container_of(port, struct uart_sunsu_port, port);
  494. unsigned char mcr = 0;
  495. if (mctrl & TIOCM_RTS)
  496. mcr |= UART_MCR_RTS;
  497. if (mctrl & TIOCM_DTR)
  498. mcr |= UART_MCR_DTR;
  499. if (mctrl & TIOCM_OUT1)
  500. mcr |= UART_MCR_OUT1;
  501. if (mctrl & TIOCM_OUT2)
  502. mcr |= UART_MCR_OUT2;
  503. if (mctrl & TIOCM_LOOP)
  504. mcr |= UART_MCR_LOOP;
  505. serial_out(up, UART_MCR, mcr);
  506. }
  507. static void sunsu_break_ctl(struct uart_port *port, int break_state)
  508. {
  509. struct uart_sunsu_port *up =
  510. container_of(port, struct uart_sunsu_port, port);
  511. unsigned long flags;
  512. spin_lock_irqsave(&up->port.lock, flags);
  513. if (break_state == -1)
  514. up->lcr |= UART_LCR_SBC;
  515. else
  516. up->lcr &= ~UART_LCR_SBC;
  517. serial_out(up, UART_LCR, up->lcr);
  518. spin_unlock_irqrestore(&up->port.lock, flags);
  519. }
  520. static int sunsu_startup(struct uart_port *port)
  521. {
  522. struct uart_sunsu_port *up =
  523. container_of(port, struct uart_sunsu_port, port);
  524. unsigned long flags;
  525. int retval;
  526. if (up->port.type == PORT_16C950) {
  527. /* Wake up and initialize UART */
  528. up->acr = 0;
  529. serial_outp(up, UART_LCR, 0xBF);
  530. serial_outp(up, UART_EFR, UART_EFR_ECB);
  531. serial_outp(up, UART_IER, 0);
  532. serial_outp(up, UART_LCR, 0);
  533. serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
  534. serial_outp(up, UART_LCR, 0xBF);
  535. serial_outp(up, UART_EFR, UART_EFR_ECB);
  536. serial_outp(up, UART_LCR, 0);
  537. }
  538. #ifdef CONFIG_SERIAL_8250_RSA
  539. /*
  540. * If this is an RSA port, see if we can kick it up to the
  541. * higher speed clock.
  542. */
  543. enable_rsa(up);
  544. #endif
  545. /*
  546. * Clear the FIFO buffers and disable them.
  547. * (they will be reenabled in set_termios())
  548. */
  549. if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
  550. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  551. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  552. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  553. serial_outp(up, UART_FCR, 0);
  554. }
  555. /*
  556. * Clear the interrupt registers.
  557. */
  558. (void) serial_inp(up, UART_LSR);
  559. (void) serial_inp(up, UART_RX);
  560. (void) serial_inp(up, UART_IIR);
  561. (void) serial_inp(up, UART_MSR);
  562. /*
  563. * At this point, there's no way the LSR could still be 0xff;
  564. * if it is, then bail out, because there's likely no UART
  565. * here.
  566. */
  567. if (!(up->port.flags & UPF_BUGGY_UART) &&
  568. (serial_inp(up, UART_LSR) == 0xff)) {
  569. printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
  570. return -ENODEV;
  571. }
  572. if (up->su_type != SU_PORT_PORT) {
  573. retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
  574. IRQF_SHARED, su_typev[up->su_type], up);
  575. } else {
  576. retval = request_irq(up->port.irq, sunsu_serial_interrupt,
  577. IRQF_SHARED, su_typev[up->su_type], up);
  578. }
  579. if (retval) {
  580. printk("su: Cannot register IRQ %d\n", up->port.irq);
  581. return retval;
  582. }
  583. /*
  584. * Now, initialize the UART
  585. */
  586. serial_outp(up, UART_LCR, UART_LCR_WLEN8);
  587. spin_lock_irqsave(&up->port.lock, flags);
  588. up->port.mctrl |= TIOCM_OUT2;
  589. sunsu_set_mctrl(&up->port, up->port.mctrl);
  590. spin_unlock_irqrestore(&up->port.lock, flags);
  591. /*
  592. * Finally, enable interrupts. Note: Modem status interrupts
  593. * are set via set_termios(), which will be occurring imminently
  594. * anyway, so we don't enable them here.
  595. */
  596. up->ier = UART_IER_RLSI | UART_IER_RDI;
  597. serial_outp(up, UART_IER, up->ier);
  598. if (up->port.flags & UPF_FOURPORT) {
  599. unsigned int icp;
  600. /*
  601. * Enable interrupts on the AST Fourport board
  602. */
  603. icp = (up->port.iobase & 0xfe0) | 0x01f;
  604. outb_p(0x80, icp);
  605. (void) inb_p(icp);
  606. }
  607. /*
  608. * And clear the interrupt registers again for luck.
  609. */
  610. (void) serial_inp(up, UART_LSR);
  611. (void) serial_inp(up, UART_RX);
  612. (void) serial_inp(up, UART_IIR);
  613. (void) serial_inp(up, UART_MSR);
  614. return 0;
  615. }
  616. static void sunsu_shutdown(struct uart_port *port)
  617. {
  618. struct uart_sunsu_port *up =
  619. container_of(port, struct uart_sunsu_port, port);
  620. unsigned long flags;
  621. /*
  622. * Disable interrupts from this port
  623. */
  624. up->ier = 0;
  625. serial_outp(up, UART_IER, 0);
  626. spin_lock_irqsave(&up->port.lock, flags);
  627. if (up->port.flags & UPF_FOURPORT) {
  628. /* reset interrupts on the AST Fourport board */
  629. inb((up->port.iobase & 0xfe0) | 0x1f);
  630. up->port.mctrl |= TIOCM_OUT1;
  631. } else
  632. up->port.mctrl &= ~TIOCM_OUT2;
  633. sunsu_set_mctrl(&up->port, up->port.mctrl);
  634. spin_unlock_irqrestore(&up->port.lock, flags);
  635. /*
  636. * Disable break condition and FIFOs
  637. */
  638. serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
  639. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  640. UART_FCR_CLEAR_RCVR |
  641. UART_FCR_CLEAR_XMIT);
  642. serial_outp(up, UART_FCR, 0);
  643. #ifdef CONFIG_SERIAL_8250_RSA
  644. /*
  645. * Reset the RSA board back to 115kbps compat mode.
  646. */
  647. disable_rsa(up);
  648. #endif
  649. /*
  650. * Read data port to reset things.
  651. */
  652. (void) serial_in(up, UART_RX);
  653. free_irq(up->port.irq, up);
  654. }
  655. static void
  656. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  657. unsigned int iflag, unsigned int quot)
  658. {
  659. struct uart_sunsu_port *up =
  660. container_of(port, struct uart_sunsu_port, port);
  661. unsigned char cval, fcr = 0;
  662. unsigned long flags;
  663. switch (cflag & CSIZE) {
  664. case CS5:
  665. cval = 0x00;
  666. break;
  667. case CS6:
  668. cval = 0x01;
  669. break;
  670. case CS7:
  671. cval = 0x02;
  672. break;
  673. default:
  674. case CS8:
  675. cval = 0x03;
  676. break;
  677. }
  678. if (cflag & CSTOPB)
  679. cval |= 0x04;
  680. if (cflag & PARENB)
  681. cval |= UART_LCR_PARITY;
  682. if (!(cflag & PARODD))
  683. cval |= UART_LCR_EPAR;
  684. #ifdef CMSPAR
  685. if (cflag & CMSPAR)
  686. cval |= UART_LCR_SPAR;
  687. #endif
  688. /*
  689. * Work around a bug in the Oxford Semiconductor 952 rev B
  690. * chip which causes it to seriously miscalculate baud rates
  691. * when DLL is 0.
  692. */
  693. if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
  694. up->rev == 0x5201)
  695. quot ++;
  696. if (uart_config[up->port.type].flags & UART_USE_FIFO) {
  697. if ((up->port.uartclk / quot) < (2400 * 16))
  698. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
  699. #ifdef CONFIG_SERIAL_8250_RSA
  700. else if (up->port.type == PORT_RSA)
  701. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
  702. #endif
  703. else
  704. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
  705. }
  706. if (up->port.type == PORT_16750)
  707. fcr |= UART_FCR7_64BYTE;
  708. /*
  709. * Ok, we're now changing the port state. Do it with
  710. * interrupts disabled.
  711. */
  712. spin_lock_irqsave(&up->port.lock, flags);
  713. /*
  714. * Update the per-port timeout.
  715. */
  716. uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
  717. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  718. if (iflag & INPCK)
  719. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  720. if (iflag & (IGNBRK | BRKINT | PARMRK))
  721. up->port.read_status_mask |= UART_LSR_BI;
  722. /*
  723. * Characteres to ignore
  724. */
  725. up->port.ignore_status_mask = 0;
  726. if (iflag & IGNPAR)
  727. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  728. if (iflag & IGNBRK) {
  729. up->port.ignore_status_mask |= UART_LSR_BI;
  730. /*
  731. * If we're ignoring parity and break indicators,
  732. * ignore overruns too (for real raw support).
  733. */
  734. if (iflag & IGNPAR)
  735. up->port.ignore_status_mask |= UART_LSR_OE;
  736. }
  737. /*
  738. * ignore all characters if CREAD is not set
  739. */
  740. if ((cflag & CREAD) == 0)
  741. up->port.ignore_status_mask |= UART_LSR_DR;
  742. /*
  743. * CTS flow control flag and modem status interrupts
  744. */
  745. up->ier &= ~UART_IER_MSI;
  746. if (UART_ENABLE_MS(&up->port, cflag))
  747. up->ier |= UART_IER_MSI;
  748. serial_out(up, UART_IER, up->ier);
  749. if (uart_config[up->port.type].flags & UART_STARTECH) {
  750. serial_outp(up, UART_LCR, 0xBF);
  751. serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
  752. }
  753. serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  754. serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
  755. serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
  756. if (up->port.type == PORT_16750)
  757. serial_outp(up, UART_FCR, fcr); /* set fcr */
  758. serial_outp(up, UART_LCR, cval); /* reset DLAB */
  759. up->lcr = cval; /* Save LCR */
  760. if (up->port.type != PORT_16750) {
  761. if (fcr & UART_FCR_ENABLE_FIFO) {
  762. /* emulated UARTs (Lucent Venus 167x) need two steps */
  763. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  764. }
  765. serial_outp(up, UART_FCR, fcr); /* set fcr */
  766. }
  767. up->cflag = cflag;
  768. spin_unlock_irqrestore(&up->port.lock, flags);
  769. }
  770. static void
  771. sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
  772. struct ktermios *old)
  773. {
  774. unsigned int baud, quot;
  775. /*
  776. * Ask the core to calculate the divisor for us.
  777. */
  778. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  779. quot = uart_get_divisor(port, baud);
  780. sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
  781. }
  782. static void sunsu_release_port(struct uart_port *port)
  783. {
  784. }
  785. static int sunsu_request_port(struct uart_port *port)
  786. {
  787. return 0;
  788. }
  789. static void sunsu_config_port(struct uart_port *port, int flags)
  790. {
  791. struct uart_sunsu_port *up =
  792. container_of(port, struct uart_sunsu_port, port);
  793. if (flags & UART_CONFIG_TYPE) {
  794. /*
  795. * We are supposed to call autoconfig here, but this requires
  796. * splitting all the OBP probing crap from the UART probing.
  797. * We'll do it when we kill sunsu.c altogether.
  798. */
  799. port->type = up->type_probed; /* XXX */
  800. }
  801. }
  802. static int
  803. sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
  804. {
  805. return -EINVAL;
  806. }
  807. static const char *
  808. sunsu_type(struct uart_port *port)
  809. {
  810. int type = port->type;
  811. if (type >= ARRAY_SIZE(uart_config))
  812. type = 0;
  813. return uart_config[type].name;
  814. }
  815. static const struct uart_ops sunsu_pops = {
  816. .tx_empty = sunsu_tx_empty,
  817. .set_mctrl = sunsu_set_mctrl,
  818. .get_mctrl = sunsu_get_mctrl,
  819. .stop_tx = sunsu_stop_tx,
  820. .start_tx = sunsu_start_tx,
  821. .stop_rx = sunsu_stop_rx,
  822. .enable_ms = sunsu_enable_ms,
  823. .break_ctl = sunsu_break_ctl,
  824. .startup = sunsu_startup,
  825. .shutdown = sunsu_shutdown,
  826. .set_termios = sunsu_set_termios,
  827. .type = sunsu_type,
  828. .release_port = sunsu_release_port,
  829. .request_port = sunsu_request_port,
  830. .config_port = sunsu_config_port,
  831. .verify_port = sunsu_verify_port,
  832. };
  833. #define UART_NR 4
  834. static struct uart_sunsu_port sunsu_ports[UART_NR];
  835. static int nr_inst; /* Number of already registered ports */
  836. #ifdef CONFIG_SERIO
  837. static DEFINE_SPINLOCK(sunsu_serio_lock);
  838. static int sunsu_serio_write(struct serio *serio, unsigned char ch)
  839. {
  840. struct uart_sunsu_port *up = serio->port_data;
  841. unsigned long flags;
  842. int lsr;
  843. spin_lock_irqsave(&sunsu_serio_lock, flags);
  844. do {
  845. lsr = serial_in(up, UART_LSR);
  846. } while (!(lsr & UART_LSR_THRE));
  847. /* Send the character out. */
  848. serial_out(up, UART_TX, ch);
  849. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  850. return 0;
  851. }
  852. static int sunsu_serio_open(struct serio *serio)
  853. {
  854. struct uart_sunsu_port *up = serio->port_data;
  855. unsigned long flags;
  856. int ret;
  857. spin_lock_irqsave(&sunsu_serio_lock, flags);
  858. if (!up->serio_open) {
  859. up->serio_open = 1;
  860. ret = 0;
  861. } else
  862. ret = -EBUSY;
  863. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  864. return ret;
  865. }
  866. static void sunsu_serio_close(struct serio *serio)
  867. {
  868. struct uart_sunsu_port *up = serio->port_data;
  869. unsigned long flags;
  870. spin_lock_irqsave(&sunsu_serio_lock, flags);
  871. up->serio_open = 0;
  872. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  873. }
  874. #endif /* CONFIG_SERIO */
  875. static void sunsu_autoconfig(struct uart_sunsu_port *up)
  876. {
  877. unsigned char status1, status2, scratch, scratch2, scratch3;
  878. unsigned char save_lcr, save_mcr;
  879. unsigned long flags;
  880. if (up->su_type == SU_PORT_NONE)
  881. return;
  882. up->type_probed = PORT_UNKNOWN;
  883. up->port.iotype = UPIO_MEM;
  884. spin_lock_irqsave(&up->port.lock, flags);
  885. if (!(up->port.flags & UPF_BUGGY_UART)) {
  886. /*
  887. * Do a simple existence test first; if we fail this, there's
  888. * no point trying anything else.
  889. *
  890. * 0x80 is used as a nonsense port to prevent against false
  891. * positives due to ISA bus float. The assumption is that
  892. * 0x80 is a non-existent port; which should be safe since
  893. * include/asm/io.h also makes this assumption.
  894. */
  895. scratch = serial_inp(up, UART_IER);
  896. serial_outp(up, UART_IER, 0);
  897. #ifdef __i386__
  898. outb(0xff, 0x080);
  899. #endif
  900. scratch2 = serial_inp(up, UART_IER);
  901. serial_outp(up, UART_IER, 0x0f);
  902. #ifdef __i386__
  903. outb(0, 0x080);
  904. #endif
  905. scratch3 = serial_inp(up, UART_IER);
  906. serial_outp(up, UART_IER, scratch);
  907. if (scratch2 != 0 || scratch3 != 0x0F)
  908. goto out; /* We failed; there's nothing here */
  909. }
  910. save_mcr = serial_in(up, UART_MCR);
  911. save_lcr = serial_in(up, UART_LCR);
  912. /*
  913. * Check to see if a UART is really there. Certain broken
  914. * internal modems based on the Rockwell chipset fail this
  915. * test, because they apparently don't implement the loopback
  916. * test mode. So this test is skipped on the COM 1 through
  917. * COM 4 ports. This *should* be safe, since no board
  918. * manufacturer would be stupid enough to design a board
  919. * that conflicts with COM 1-4 --- we hope!
  920. */
  921. if (!(up->port.flags & UPF_SKIP_TEST)) {
  922. serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
  923. status1 = serial_inp(up, UART_MSR) & 0xF0;
  924. serial_outp(up, UART_MCR, save_mcr);
  925. if (status1 != 0x90)
  926. goto out; /* We failed loopback test */
  927. }
  928. serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
  929. serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
  930. serial_outp(up, UART_LCR, 0);
  931. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  932. scratch = serial_in(up, UART_IIR) >> 6;
  933. switch (scratch) {
  934. case 0:
  935. up->port.type = PORT_16450;
  936. break;
  937. case 1:
  938. up->port.type = PORT_UNKNOWN;
  939. break;
  940. case 2:
  941. up->port.type = PORT_16550;
  942. break;
  943. case 3:
  944. up->port.type = PORT_16550A;
  945. break;
  946. }
  947. if (up->port.type == PORT_16550A) {
  948. /* Check for Startech UART's */
  949. serial_outp(up, UART_LCR, UART_LCR_DLAB);
  950. if (serial_in(up, UART_EFR) == 0) {
  951. up->port.type = PORT_16650;
  952. } else {
  953. serial_outp(up, UART_LCR, 0xBF);
  954. if (serial_in(up, UART_EFR) == 0)
  955. up->port.type = PORT_16650V2;
  956. }
  957. }
  958. if (up->port.type == PORT_16550A) {
  959. /* Check for TI 16750 */
  960. serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
  961. serial_outp(up, UART_FCR,
  962. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  963. scratch = serial_in(up, UART_IIR) >> 5;
  964. if (scratch == 7) {
  965. /*
  966. * If this is a 16750, and not a cheap UART
  967. * clone, then it should only go into 64 byte
  968. * mode if the UART_FCR7_64BYTE bit was set
  969. * while UART_LCR_DLAB was latched.
  970. */
  971. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  972. serial_outp(up, UART_LCR, 0);
  973. serial_outp(up, UART_FCR,
  974. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  975. scratch = serial_in(up, UART_IIR) >> 5;
  976. if (scratch == 6)
  977. up->port.type = PORT_16750;
  978. }
  979. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  980. }
  981. serial_outp(up, UART_LCR, save_lcr);
  982. if (up->port.type == PORT_16450) {
  983. scratch = serial_in(up, UART_SCR);
  984. serial_outp(up, UART_SCR, 0xa5);
  985. status1 = serial_in(up, UART_SCR);
  986. serial_outp(up, UART_SCR, 0x5a);
  987. status2 = serial_in(up, UART_SCR);
  988. serial_outp(up, UART_SCR, scratch);
  989. if ((status1 != 0xa5) || (status2 != 0x5a))
  990. up->port.type = PORT_8250;
  991. }
  992. up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
  993. if (up->port.type == PORT_UNKNOWN)
  994. goto out;
  995. up->type_probed = up->port.type; /* XXX */
  996. /*
  997. * Reset the UART.
  998. */
  999. #ifdef CONFIG_SERIAL_8250_RSA
  1000. if (up->port.type == PORT_RSA)
  1001. serial_outp(up, UART_RSA_FRR, 0);
  1002. #endif
  1003. serial_outp(up, UART_MCR, save_mcr);
  1004. serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
  1005. UART_FCR_CLEAR_RCVR |
  1006. UART_FCR_CLEAR_XMIT));
  1007. serial_outp(up, UART_FCR, 0);
  1008. (void)serial_in(up, UART_RX);
  1009. serial_outp(up, UART_IER, 0);
  1010. out:
  1011. spin_unlock_irqrestore(&up->port.lock, flags);
  1012. }
  1013. static struct uart_driver sunsu_reg = {
  1014. .owner = THIS_MODULE,
  1015. .driver_name = "sunsu",
  1016. .dev_name = "ttyS",
  1017. .major = TTY_MAJOR,
  1018. };
  1019. static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
  1020. {
  1021. int quot, baud;
  1022. #ifdef CONFIG_SERIO
  1023. struct serio *serio;
  1024. #endif
  1025. if (up->su_type == SU_PORT_KBD) {
  1026. up->cflag = B1200 | CS8 | CLOCAL | CREAD;
  1027. baud = 1200;
  1028. } else {
  1029. up->cflag = B4800 | CS8 | CLOCAL | CREAD;
  1030. baud = 4800;
  1031. }
  1032. quot = up->port.uartclk / (16 * baud);
  1033. sunsu_autoconfig(up);
  1034. if (up->port.type == PORT_UNKNOWN)
  1035. return -ENODEV;
  1036. printk("%pOF: %s port at %llx, irq %u\n",
  1037. up->port.dev->of_node,
  1038. (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
  1039. (unsigned long long) up->port.mapbase,
  1040. up->port.irq);
  1041. #ifdef CONFIG_SERIO
  1042. serio = &up->serio;
  1043. serio->port_data = up;
  1044. serio->id.type = SERIO_RS232;
  1045. if (up->su_type == SU_PORT_KBD) {
  1046. serio->id.proto = SERIO_SUNKBD;
  1047. strlcpy(serio->name, "sukbd", sizeof(serio->name));
  1048. } else {
  1049. serio->id.proto = SERIO_SUN;
  1050. serio->id.extra = 1;
  1051. strlcpy(serio->name, "sums", sizeof(serio->name));
  1052. }
  1053. strlcpy(serio->phys,
  1054. (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
  1055. sizeof(serio->phys));
  1056. serio->write = sunsu_serio_write;
  1057. serio->open = sunsu_serio_open;
  1058. serio->close = sunsu_serio_close;
  1059. serio->dev.parent = up->port.dev;
  1060. serio_register_port(serio);
  1061. #endif
  1062. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  1063. sunsu_startup(&up->port);
  1064. return 0;
  1065. }
  1066. /*
  1067. * ------------------------------------------------------------
  1068. * Serial console driver
  1069. * ------------------------------------------------------------
  1070. */
  1071. #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
  1072. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  1073. /*
  1074. * Wait for transmitter & holding register to empty
  1075. */
  1076. static void wait_for_xmitr(struct uart_sunsu_port *up)
  1077. {
  1078. unsigned int status, tmout = 10000;
  1079. /* Wait up to 10ms for the character(s) to be sent. */
  1080. do {
  1081. status = serial_in(up, UART_LSR);
  1082. if (status & UART_LSR_BI)
  1083. up->lsr_break_flag = UART_LSR_BI;
  1084. if (--tmout == 0)
  1085. break;
  1086. udelay(1);
  1087. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  1088. /* Wait up to 1s for flow control if necessary */
  1089. if (up->port.flags & UPF_CONS_FLOW) {
  1090. tmout = 1000000;
  1091. while (--tmout &&
  1092. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  1093. udelay(1);
  1094. }
  1095. }
  1096. static void sunsu_console_putchar(struct uart_port *port, int ch)
  1097. {
  1098. struct uart_sunsu_port *up =
  1099. container_of(port, struct uart_sunsu_port, port);
  1100. wait_for_xmitr(up);
  1101. serial_out(up, UART_TX, ch);
  1102. }
  1103. /*
  1104. * Print a string to the serial port trying not to disturb
  1105. * any possible real use of the port...
  1106. */
  1107. static void sunsu_console_write(struct console *co, const char *s,
  1108. unsigned int count)
  1109. {
  1110. struct uart_sunsu_port *up = &sunsu_ports[co->index];
  1111. unsigned long flags;
  1112. unsigned int ier;
  1113. int locked = 1;
  1114. if (up->port.sysrq || oops_in_progress)
  1115. locked = spin_trylock_irqsave(&up->port.lock, flags);
  1116. else
  1117. spin_lock_irqsave(&up->port.lock, flags);
  1118. /*
  1119. * First save the UER then disable the interrupts
  1120. */
  1121. ier = serial_in(up, UART_IER);
  1122. serial_out(up, UART_IER, 0);
  1123. uart_console_write(&up->port, s, count, sunsu_console_putchar);
  1124. /*
  1125. * Finally, wait for transmitter to become empty
  1126. * and restore the IER
  1127. */
  1128. wait_for_xmitr(up);
  1129. serial_out(up, UART_IER, ier);
  1130. if (locked)
  1131. spin_unlock_irqrestore(&up->port.lock, flags);
  1132. }
  1133. /*
  1134. * Setup initial baud/bits/parity. We do two things here:
  1135. * - construct a cflag setting for the first su_open()
  1136. * - initialize the serial port
  1137. * Return non-zero if we didn't find a serial port.
  1138. */
  1139. static int __init sunsu_console_setup(struct console *co, char *options)
  1140. {
  1141. static struct ktermios dummy;
  1142. struct ktermios termios;
  1143. struct uart_port *port;
  1144. printk("Console: ttyS%d (SU)\n",
  1145. (sunsu_reg.minor - 64) + co->index);
  1146. if (co->index > nr_inst)
  1147. return -ENODEV;
  1148. port = &sunsu_ports[co->index].port;
  1149. /*
  1150. * Temporary fix.
  1151. */
  1152. spin_lock_init(&port->lock);
  1153. /* Get firmware console settings. */
  1154. sunserial_console_termios(co, port->dev->of_node);
  1155. memset(&termios, 0, sizeof(struct ktermios));
  1156. termios.c_cflag = co->cflag;
  1157. port->mctrl |= TIOCM_DTR;
  1158. port->ops->set_termios(port, &termios, &dummy);
  1159. return 0;
  1160. }
  1161. static struct console sunsu_console = {
  1162. .name = "ttyS",
  1163. .write = sunsu_console_write,
  1164. .device = uart_console_device,
  1165. .setup = sunsu_console_setup,
  1166. .flags = CON_PRINTBUFFER,
  1167. .index = -1,
  1168. .data = &sunsu_reg,
  1169. };
  1170. /*
  1171. * Register console.
  1172. */
  1173. static inline struct console *SUNSU_CONSOLE(void)
  1174. {
  1175. return &sunsu_console;
  1176. }
  1177. #else
  1178. #define SUNSU_CONSOLE() (NULL)
  1179. #define sunsu_serial_console_init() do { } while (0)
  1180. #endif
  1181. static enum su_type su_get_type(struct device_node *dp)
  1182. {
  1183. struct device_node *ap = of_find_node_by_path("/aliases");
  1184. enum su_type rc = SU_PORT_PORT;
  1185. if (ap) {
  1186. const char *keyb = of_get_property(ap, "keyboard", NULL);
  1187. const char *ms = of_get_property(ap, "mouse", NULL);
  1188. struct device_node *match;
  1189. if (keyb) {
  1190. match = of_find_node_by_path(keyb);
  1191. /*
  1192. * The pointer is used as an identifier not
  1193. * as a pointer, we can drop the refcount on
  1194. * the of__node immediately after getting it.
  1195. */
  1196. of_node_put(match);
  1197. if (dp == match) {
  1198. rc = SU_PORT_KBD;
  1199. goto out;
  1200. }
  1201. }
  1202. if (ms) {
  1203. match = of_find_node_by_path(ms);
  1204. of_node_put(match);
  1205. if (dp == match) {
  1206. rc = SU_PORT_MS;
  1207. goto out;
  1208. }
  1209. }
  1210. }
  1211. out:
  1212. of_node_put(ap);
  1213. return rc;
  1214. }
  1215. static int su_probe(struct platform_device *op)
  1216. {
  1217. struct device_node *dp = op->dev.of_node;
  1218. struct uart_sunsu_port *up;
  1219. struct resource *rp;
  1220. enum su_type type;
  1221. bool ignore_line;
  1222. int err;
  1223. type = su_get_type(dp);
  1224. if (type == SU_PORT_PORT) {
  1225. if (nr_inst >= UART_NR)
  1226. return -EINVAL;
  1227. up = &sunsu_ports[nr_inst];
  1228. } else {
  1229. up = kzalloc(sizeof(*up), GFP_KERNEL);
  1230. if (!up)
  1231. return -ENOMEM;
  1232. }
  1233. up->port.line = nr_inst;
  1234. spin_lock_init(&up->port.lock);
  1235. up->su_type = type;
  1236. rp = &op->resource[0];
  1237. up->port.mapbase = rp->start;
  1238. up->reg_size = resource_size(rp);
  1239. up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
  1240. if (!up->port.membase) {
  1241. if (type != SU_PORT_PORT)
  1242. kfree(up);
  1243. return -ENOMEM;
  1244. }
  1245. up->port.irq = op->archdata.irqs[0];
  1246. up->port.dev = &op->dev;
  1247. up->port.type = PORT_UNKNOWN;
  1248. up->port.uartclk = (SU_BASE_BAUD * 16);
  1249. err = 0;
  1250. if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
  1251. err = sunsu_kbd_ms_init(up);
  1252. if (err) {
  1253. of_iounmap(&op->resource[0],
  1254. up->port.membase, up->reg_size);
  1255. kfree(up);
  1256. return err;
  1257. }
  1258. platform_set_drvdata(op, up);
  1259. nr_inst++;
  1260. return 0;
  1261. }
  1262. up->port.flags |= UPF_BOOT_AUTOCONF;
  1263. sunsu_autoconfig(up);
  1264. err = -ENODEV;
  1265. if (up->port.type == PORT_UNKNOWN)
  1266. goto out_unmap;
  1267. up->port.ops = &sunsu_pops;
  1268. ignore_line = false;
  1269. if (of_node_name_eq(dp, "rsc-console") ||
  1270. of_node_name_eq(dp, "lom-console"))
  1271. ignore_line = true;
  1272. sunserial_console_match(SUNSU_CONSOLE(), dp,
  1273. &sunsu_reg, up->port.line,
  1274. ignore_line);
  1275. err = uart_add_one_port(&sunsu_reg, &up->port);
  1276. if (err)
  1277. goto out_unmap;
  1278. platform_set_drvdata(op, up);
  1279. nr_inst++;
  1280. return 0;
  1281. out_unmap:
  1282. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1283. kfree(up);
  1284. return err;
  1285. }
  1286. static int su_remove(struct platform_device *op)
  1287. {
  1288. struct uart_sunsu_port *up = platform_get_drvdata(op);
  1289. bool kbdms = false;
  1290. if (up->su_type == SU_PORT_MS ||
  1291. up->su_type == SU_PORT_KBD)
  1292. kbdms = true;
  1293. if (kbdms) {
  1294. #ifdef CONFIG_SERIO
  1295. serio_unregister_port(&up->serio);
  1296. #endif
  1297. } else if (up->port.type != PORT_UNKNOWN)
  1298. uart_remove_one_port(&sunsu_reg, &up->port);
  1299. if (up->port.membase)
  1300. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1301. if (kbdms)
  1302. kfree(up);
  1303. return 0;
  1304. }
  1305. static const struct of_device_id su_match[] = {
  1306. {
  1307. .name = "su",
  1308. },
  1309. {
  1310. .name = "su_pnp",
  1311. },
  1312. {
  1313. .name = "serial",
  1314. .compatible = "su",
  1315. },
  1316. {
  1317. .type = "serial",
  1318. .compatible = "su",
  1319. },
  1320. {},
  1321. };
  1322. MODULE_DEVICE_TABLE(of, su_match);
  1323. static struct platform_driver su_driver = {
  1324. .driver = {
  1325. .name = "su",
  1326. .of_match_table = su_match,
  1327. },
  1328. .probe = su_probe,
  1329. .remove = su_remove,
  1330. };
  1331. static int __init sunsu_init(void)
  1332. {
  1333. struct device_node *dp;
  1334. int err;
  1335. int num_uart = 0;
  1336. for_each_node_by_name(dp, "su") {
  1337. if (su_get_type(dp) == SU_PORT_PORT)
  1338. num_uart++;
  1339. }
  1340. for_each_node_by_name(dp, "su_pnp") {
  1341. if (su_get_type(dp) == SU_PORT_PORT)
  1342. num_uart++;
  1343. }
  1344. for_each_node_by_name(dp, "serial") {
  1345. if (of_device_is_compatible(dp, "su")) {
  1346. if (su_get_type(dp) == SU_PORT_PORT)
  1347. num_uart++;
  1348. }
  1349. }
  1350. for_each_node_by_type(dp, "serial") {
  1351. if (of_device_is_compatible(dp, "su")) {
  1352. if (su_get_type(dp) == SU_PORT_PORT)
  1353. num_uart++;
  1354. }
  1355. }
  1356. if (num_uart) {
  1357. err = sunserial_register_minors(&sunsu_reg, num_uart);
  1358. if (err)
  1359. return err;
  1360. }
  1361. err = platform_driver_register(&su_driver);
  1362. if (err && num_uart)
  1363. sunserial_unregister_minors(&sunsu_reg, num_uart);
  1364. return err;
  1365. }
  1366. static void __exit sunsu_exit(void)
  1367. {
  1368. platform_driver_unregister(&su_driver);
  1369. if (sunsu_reg.nr)
  1370. sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
  1371. }
  1372. module_init(sunsu_init);
  1373. module_exit(sunsu_exit);
  1374. MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
  1375. MODULE_DESCRIPTION("Sun SU serial port driver");
  1376. MODULE_VERSION("2.0");
  1377. MODULE_LICENSE("GPL");