serial_txx9.c 33 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Derived from many drivers using generic_serial interface,
  4. * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
  5. * (was in Linux/VR tree) by Jim Pick.
  6. *
  7. * Copyright (C) 1999 Harald Koerfgen
  8. * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
  9. * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
  10. * Copyright (C) 2000-2002 Toshiba Corporation
  11. *
  12. * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
  13. */
  14. #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  15. #define SUPPORT_SYSRQ
  16. #endif
  17. #include <linux/module.h>
  18. #include <linux/ioport.h>
  19. #include <linux/init.h>
  20. #include <linux/console.h>
  21. #include <linux/delay.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pci.h>
  24. #include <linux/serial_core.h>
  25. #include <linux/serial.h>
  26. #include <linux/tty.h>
  27. #include <linux/tty_flip.h>
  28. #include <asm/io.h>
  29. static char *serial_version = "1.11";
  30. static char *serial_name = "TX39/49 Serial driver";
  31. #define PASS_LIMIT 256
  32. #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
  33. /* "ttyS" is used for standard serial driver */
  34. #define TXX9_TTY_NAME "ttyTX"
  35. #define TXX9_TTY_MINOR_START 196
  36. #define TXX9_TTY_MAJOR 204
  37. #else
  38. /* acts like standard serial driver */
  39. #define TXX9_TTY_NAME "ttyS"
  40. #define TXX9_TTY_MINOR_START 64
  41. #define TXX9_TTY_MAJOR TTY_MAJOR
  42. #endif
  43. /* flag aliases */
  44. #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
  45. #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
  46. #ifdef CONFIG_PCI
  47. /* support for Toshiba TC86C001 SIO */
  48. #define ENABLE_SERIAL_TXX9_PCI
  49. #endif
  50. /*
  51. * Number of serial ports
  52. */
  53. #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
  54. struct uart_txx9_port {
  55. struct uart_port port;
  56. /* No additional info for now */
  57. };
  58. #define TXX9_REGION_SIZE 0x24
  59. /* TXX9 Serial Registers */
  60. #define TXX9_SILCR 0x00
  61. #define TXX9_SIDICR 0x04
  62. #define TXX9_SIDISR 0x08
  63. #define TXX9_SICISR 0x0c
  64. #define TXX9_SIFCR 0x10
  65. #define TXX9_SIFLCR 0x14
  66. #define TXX9_SIBGR 0x18
  67. #define TXX9_SITFIFO 0x1c
  68. #define TXX9_SIRFIFO 0x20
  69. /* SILCR : Line Control */
  70. #define TXX9_SILCR_SCS_MASK 0x00000060
  71. #define TXX9_SILCR_SCS_IMCLK 0x00000000
  72. #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
  73. #define TXX9_SILCR_SCS_SCLK 0x00000040
  74. #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
  75. #define TXX9_SILCR_UEPS 0x00000010
  76. #define TXX9_SILCR_UPEN 0x00000008
  77. #define TXX9_SILCR_USBL_MASK 0x00000004
  78. #define TXX9_SILCR_USBL_1BIT 0x00000000
  79. #define TXX9_SILCR_USBL_2BIT 0x00000004
  80. #define TXX9_SILCR_UMODE_MASK 0x00000003
  81. #define TXX9_SILCR_UMODE_8BIT 0x00000000
  82. #define TXX9_SILCR_UMODE_7BIT 0x00000001
  83. /* SIDICR : DMA/Int. Control */
  84. #define TXX9_SIDICR_TDE 0x00008000
  85. #define TXX9_SIDICR_RDE 0x00004000
  86. #define TXX9_SIDICR_TIE 0x00002000
  87. #define TXX9_SIDICR_RIE 0x00001000
  88. #define TXX9_SIDICR_SPIE 0x00000800
  89. #define TXX9_SIDICR_CTSAC 0x00000600
  90. #define TXX9_SIDICR_STIE_MASK 0x0000003f
  91. #define TXX9_SIDICR_STIE_OERS 0x00000020
  92. #define TXX9_SIDICR_STIE_CTSS 0x00000010
  93. #define TXX9_SIDICR_STIE_RBRKD 0x00000008
  94. #define TXX9_SIDICR_STIE_TRDY 0x00000004
  95. #define TXX9_SIDICR_STIE_TXALS 0x00000002
  96. #define TXX9_SIDICR_STIE_UBRKD 0x00000001
  97. /* SIDISR : DMA/Int. Status */
  98. #define TXX9_SIDISR_UBRK 0x00008000
  99. #define TXX9_SIDISR_UVALID 0x00004000
  100. #define TXX9_SIDISR_UFER 0x00002000
  101. #define TXX9_SIDISR_UPER 0x00001000
  102. #define TXX9_SIDISR_UOER 0x00000800
  103. #define TXX9_SIDISR_ERI 0x00000400
  104. #define TXX9_SIDISR_TOUT 0x00000200
  105. #define TXX9_SIDISR_TDIS 0x00000100
  106. #define TXX9_SIDISR_RDIS 0x00000080
  107. #define TXX9_SIDISR_STIS 0x00000040
  108. #define TXX9_SIDISR_RFDN_MASK 0x0000001f
  109. /* SICISR : Change Int. Status */
  110. #define TXX9_SICISR_OERS 0x00000020
  111. #define TXX9_SICISR_CTSS 0x00000010
  112. #define TXX9_SICISR_RBRKD 0x00000008
  113. #define TXX9_SICISR_TRDY 0x00000004
  114. #define TXX9_SICISR_TXALS 0x00000002
  115. #define TXX9_SICISR_UBRKD 0x00000001
  116. /* SIFCR : FIFO Control */
  117. #define TXX9_SIFCR_SWRST 0x00008000
  118. #define TXX9_SIFCR_RDIL_MASK 0x00000180
  119. #define TXX9_SIFCR_RDIL_1 0x00000000
  120. #define TXX9_SIFCR_RDIL_4 0x00000080
  121. #define TXX9_SIFCR_RDIL_8 0x00000100
  122. #define TXX9_SIFCR_RDIL_12 0x00000180
  123. #define TXX9_SIFCR_RDIL_MAX 0x00000180
  124. #define TXX9_SIFCR_TDIL_MASK 0x00000018
  125. #define TXX9_SIFCR_TDIL_1 0x00000000
  126. #define TXX9_SIFCR_TDIL_4 0x00000001
  127. #define TXX9_SIFCR_TDIL_8 0x00000010
  128. #define TXX9_SIFCR_TDIL_MAX 0x00000010
  129. #define TXX9_SIFCR_TFRST 0x00000004
  130. #define TXX9_SIFCR_RFRST 0x00000002
  131. #define TXX9_SIFCR_FRSTE 0x00000001
  132. #define TXX9_SIO_TX_FIFO 8
  133. #define TXX9_SIO_RX_FIFO 16
  134. /* SIFLCR : Flow Control */
  135. #define TXX9_SIFLCR_RCS 0x00001000
  136. #define TXX9_SIFLCR_TES 0x00000800
  137. #define TXX9_SIFLCR_RTSSC 0x00000200
  138. #define TXX9_SIFLCR_RSDE 0x00000100
  139. #define TXX9_SIFLCR_TSDE 0x00000080
  140. #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
  141. #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
  142. #define TXX9_SIFLCR_TBRK 0x00000001
  143. /* SIBGR : Baudrate Control */
  144. #define TXX9_SIBGR_BCLK_MASK 0x00000300
  145. #define TXX9_SIBGR_BCLK_T0 0x00000000
  146. #define TXX9_SIBGR_BCLK_T2 0x00000100
  147. #define TXX9_SIBGR_BCLK_T4 0x00000200
  148. #define TXX9_SIBGR_BCLK_T6 0x00000300
  149. #define TXX9_SIBGR_BRD_MASK 0x000000ff
  150. static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
  151. {
  152. switch (up->port.iotype) {
  153. default:
  154. return __raw_readl(up->port.membase + offset);
  155. case UPIO_PORT:
  156. return inl(up->port.iobase + offset);
  157. }
  158. }
  159. static inline void
  160. sio_out(struct uart_txx9_port *up, int offset, int value)
  161. {
  162. switch (up->port.iotype) {
  163. default:
  164. __raw_writel(value, up->port.membase + offset);
  165. break;
  166. case UPIO_PORT:
  167. outl(value, up->port.iobase + offset);
  168. break;
  169. }
  170. }
  171. static inline void
  172. sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
  173. {
  174. sio_out(up, offset, sio_in(up, offset) & ~value);
  175. }
  176. static inline void
  177. sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
  178. {
  179. sio_out(up, offset, sio_in(up, offset) | value);
  180. }
  181. static inline void
  182. sio_quot_set(struct uart_txx9_port *up, int quot)
  183. {
  184. quot >>= 1;
  185. if (quot < 256)
  186. sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
  187. else if (quot < (256 << 2))
  188. sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
  189. else if (quot < (256 << 4))
  190. sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
  191. else if (quot < (256 << 6))
  192. sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
  193. else
  194. sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
  195. }
  196. static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port)
  197. {
  198. return container_of(port, struct uart_txx9_port, port);
  199. }
  200. static void serial_txx9_stop_tx(struct uart_port *port)
  201. {
  202. struct uart_txx9_port *up = to_uart_txx9_port(port);
  203. sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
  204. }
  205. static void serial_txx9_start_tx(struct uart_port *port)
  206. {
  207. struct uart_txx9_port *up = to_uart_txx9_port(port);
  208. sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
  209. }
  210. static void serial_txx9_stop_rx(struct uart_port *port)
  211. {
  212. struct uart_txx9_port *up = to_uart_txx9_port(port);
  213. up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
  214. }
  215. static void serial_txx9_initialize(struct uart_port *port)
  216. {
  217. struct uart_txx9_port *up = to_uart_txx9_port(port);
  218. unsigned int tmout = 10000;
  219. sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
  220. /* TX4925 BUG WORKAROUND. Accessing SIOC register
  221. * immediately after soft reset causes bus error. */
  222. udelay(1);
  223. while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
  224. udelay(1);
  225. /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
  226. sio_set(up, TXX9_SIFCR,
  227. TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
  228. /* initial settings */
  229. sio_out(up, TXX9_SILCR,
  230. TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
  231. ((up->port.flags & UPF_TXX9_USE_SCLK) ?
  232. TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
  233. sio_quot_set(up, uart_get_divisor(port, 9600));
  234. sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
  235. sio_out(up, TXX9_SIDICR, 0);
  236. }
  237. static inline void
  238. receive_chars(struct uart_txx9_port *up, unsigned int *status)
  239. {
  240. unsigned char ch;
  241. unsigned int disr = *status;
  242. int max_count = 256;
  243. char flag;
  244. unsigned int next_ignore_status_mask;
  245. do {
  246. ch = sio_in(up, TXX9_SIRFIFO);
  247. flag = TTY_NORMAL;
  248. up->port.icount.rx++;
  249. /* mask out RFDN_MASK bit added by previous overrun */
  250. next_ignore_status_mask =
  251. up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
  252. if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
  253. TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
  254. /*
  255. * For statistics only
  256. */
  257. if (disr & TXX9_SIDISR_UBRK) {
  258. disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
  259. up->port.icount.brk++;
  260. /*
  261. * We do the SysRQ and SAK checking
  262. * here because otherwise the break
  263. * may get masked by ignore_status_mask
  264. * or read_status_mask.
  265. */
  266. if (uart_handle_break(&up->port))
  267. goto ignore_char;
  268. } else if (disr & TXX9_SIDISR_UPER)
  269. up->port.icount.parity++;
  270. else if (disr & TXX9_SIDISR_UFER)
  271. up->port.icount.frame++;
  272. if (disr & TXX9_SIDISR_UOER) {
  273. up->port.icount.overrun++;
  274. /*
  275. * The receiver read buffer still hold
  276. * a char which caused overrun.
  277. * Ignore next char by adding RFDN_MASK
  278. * to ignore_status_mask temporarily.
  279. */
  280. next_ignore_status_mask |=
  281. TXX9_SIDISR_RFDN_MASK;
  282. }
  283. /*
  284. * Mask off conditions which should be ingored.
  285. */
  286. disr &= up->port.read_status_mask;
  287. if (disr & TXX9_SIDISR_UBRK) {
  288. flag = TTY_BREAK;
  289. } else if (disr & TXX9_SIDISR_UPER)
  290. flag = TTY_PARITY;
  291. else if (disr & TXX9_SIDISR_UFER)
  292. flag = TTY_FRAME;
  293. }
  294. if (uart_handle_sysrq_char(&up->port, ch))
  295. goto ignore_char;
  296. uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
  297. ignore_char:
  298. up->port.ignore_status_mask = next_ignore_status_mask;
  299. disr = sio_in(up, TXX9_SIDISR);
  300. } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
  301. spin_unlock(&up->port.lock);
  302. tty_flip_buffer_push(&up->port.state->port);
  303. spin_lock(&up->port.lock);
  304. *status = disr;
  305. }
  306. static inline void transmit_chars(struct uart_txx9_port *up)
  307. {
  308. struct circ_buf *xmit = &up->port.state->xmit;
  309. int count;
  310. if (up->port.x_char) {
  311. sio_out(up, TXX9_SITFIFO, up->port.x_char);
  312. up->port.icount.tx++;
  313. up->port.x_char = 0;
  314. return;
  315. }
  316. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  317. serial_txx9_stop_tx(&up->port);
  318. return;
  319. }
  320. count = TXX9_SIO_TX_FIFO;
  321. do {
  322. sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
  323. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  324. up->port.icount.tx++;
  325. if (uart_circ_empty(xmit))
  326. break;
  327. } while (--count > 0);
  328. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  329. uart_write_wakeup(&up->port);
  330. if (uart_circ_empty(xmit))
  331. serial_txx9_stop_tx(&up->port);
  332. }
  333. static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
  334. {
  335. int pass_counter = 0;
  336. struct uart_txx9_port *up = dev_id;
  337. unsigned int status;
  338. while (1) {
  339. spin_lock(&up->port.lock);
  340. status = sio_in(up, TXX9_SIDISR);
  341. if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
  342. status &= ~TXX9_SIDISR_TDIS;
  343. if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
  344. TXX9_SIDISR_TOUT))) {
  345. spin_unlock(&up->port.lock);
  346. break;
  347. }
  348. if (status & TXX9_SIDISR_RDIS)
  349. receive_chars(up, &status);
  350. if (status & TXX9_SIDISR_TDIS)
  351. transmit_chars(up);
  352. /* Clear TX/RX Int. Status */
  353. sio_mask(up, TXX9_SIDISR,
  354. TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
  355. TXX9_SIDISR_TOUT);
  356. spin_unlock(&up->port.lock);
  357. if (pass_counter++ > PASS_LIMIT)
  358. break;
  359. }
  360. return pass_counter ? IRQ_HANDLED : IRQ_NONE;
  361. }
  362. static unsigned int serial_txx9_tx_empty(struct uart_port *port)
  363. {
  364. struct uart_txx9_port *up = to_uart_txx9_port(port);
  365. unsigned long flags;
  366. unsigned int ret;
  367. spin_lock_irqsave(&up->port.lock, flags);
  368. ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
  369. spin_unlock_irqrestore(&up->port.lock, flags);
  370. return ret;
  371. }
  372. static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
  373. {
  374. struct uart_txx9_port *up = to_uart_txx9_port(port);
  375. unsigned int ret;
  376. /* no modem control lines */
  377. ret = TIOCM_CAR | TIOCM_DSR;
  378. ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
  379. ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
  380. return ret;
  381. }
  382. static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
  383. {
  384. struct uart_txx9_port *up = to_uart_txx9_port(port);
  385. if (mctrl & TIOCM_RTS)
  386. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
  387. else
  388. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
  389. }
  390. static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
  391. {
  392. struct uart_txx9_port *up = to_uart_txx9_port(port);
  393. unsigned long flags;
  394. spin_lock_irqsave(&up->port.lock, flags);
  395. if (break_state == -1)
  396. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  397. else
  398. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  399. spin_unlock_irqrestore(&up->port.lock, flags);
  400. }
  401. #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
  402. /*
  403. * Wait for transmitter & holding register to empty
  404. */
  405. static void wait_for_xmitr(struct uart_txx9_port *up)
  406. {
  407. unsigned int tmout = 10000;
  408. /* Wait up to 10ms for the character(s) to be sent. */
  409. while (--tmout &&
  410. !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
  411. udelay(1);
  412. /* Wait up to 1s for flow control if necessary */
  413. if (up->port.flags & UPF_CONS_FLOW) {
  414. tmout = 1000000;
  415. while (--tmout &&
  416. (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
  417. udelay(1);
  418. }
  419. }
  420. #endif
  421. #ifdef CONFIG_CONSOLE_POLL
  422. /*
  423. * Console polling routines for writing and reading from the uart while
  424. * in an interrupt or debug context.
  425. */
  426. static int serial_txx9_get_poll_char(struct uart_port *port)
  427. {
  428. unsigned int ier;
  429. unsigned char c;
  430. struct uart_txx9_port *up = to_uart_txx9_port(port);
  431. /*
  432. * First save the IER then disable the interrupts
  433. */
  434. ier = sio_in(up, TXX9_SIDICR);
  435. sio_out(up, TXX9_SIDICR, 0);
  436. while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
  437. ;
  438. c = sio_in(up, TXX9_SIRFIFO);
  439. /*
  440. * Finally, clear RX interrupt status
  441. * and restore the IER
  442. */
  443. sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
  444. sio_out(up, TXX9_SIDICR, ier);
  445. return c;
  446. }
  447. static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c)
  448. {
  449. unsigned int ier;
  450. struct uart_txx9_port *up = to_uart_txx9_port(port);
  451. /*
  452. * First save the IER then disable the interrupts
  453. */
  454. ier = sio_in(up, TXX9_SIDICR);
  455. sio_out(up, TXX9_SIDICR, 0);
  456. wait_for_xmitr(up);
  457. /*
  458. * Send the character out.
  459. */
  460. sio_out(up, TXX9_SITFIFO, c);
  461. /*
  462. * Finally, wait for transmitter to become empty
  463. * and restore the IER
  464. */
  465. wait_for_xmitr(up);
  466. sio_out(up, TXX9_SIDICR, ier);
  467. }
  468. #endif /* CONFIG_CONSOLE_POLL */
  469. static int serial_txx9_startup(struct uart_port *port)
  470. {
  471. struct uart_txx9_port *up = to_uart_txx9_port(port);
  472. unsigned long flags;
  473. int retval;
  474. /*
  475. * Clear the FIFO buffers and disable them.
  476. * (they will be reenabled in set_termios())
  477. */
  478. sio_set(up, TXX9_SIFCR,
  479. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  480. /* clear reset */
  481. sio_mask(up, TXX9_SIFCR,
  482. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  483. sio_out(up, TXX9_SIDICR, 0);
  484. /*
  485. * Clear the interrupt registers.
  486. */
  487. sio_out(up, TXX9_SIDISR, 0);
  488. retval = request_irq(up->port.irq, serial_txx9_interrupt,
  489. IRQF_SHARED, "serial_txx9", up);
  490. if (retval)
  491. return retval;
  492. /*
  493. * Now, initialize the UART
  494. */
  495. spin_lock_irqsave(&up->port.lock, flags);
  496. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  497. spin_unlock_irqrestore(&up->port.lock, flags);
  498. /* Enable RX/TX */
  499. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
  500. /*
  501. * Finally, enable interrupts.
  502. */
  503. sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
  504. return 0;
  505. }
  506. static void serial_txx9_shutdown(struct uart_port *port)
  507. {
  508. struct uart_txx9_port *up = to_uart_txx9_port(port);
  509. unsigned long flags;
  510. /*
  511. * Disable interrupts from this port
  512. */
  513. sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
  514. spin_lock_irqsave(&up->port.lock, flags);
  515. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  516. spin_unlock_irqrestore(&up->port.lock, flags);
  517. /*
  518. * Disable break condition
  519. */
  520. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  521. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  522. if (up->port.cons && up->port.line == up->port.cons->index) {
  523. free_irq(up->port.irq, up);
  524. return;
  525. }
  526. #endif
  527. /* reset FIFOs */
  528. sio_set(up, TXX9_SIFCR,
  529. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  530. /* clear reset */
  531. sio_mask(up, TXX9_SIFCR,
  532. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  533. /* Disable RX/TX */
  534. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
  535. free_irq(up->port.irq, up);
  536. }
  537. static void
  538. serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
  539. struct ktermios *old)
  540. {
  541. struct uart_txx9_port *up = to_uart_txx9_port(port);
  542. unsigned int cval, fcr = 0;
  543. unsigned long flags;
  544. unsigned int baud, quot;
  545. /*
  546. * We don't support modem control lines.
  547. */
  548. termios->c_cflag &= ~(HUPCL | CMSPAR);
  549. termios->c_cflag |= CLOCAL;
  550. cval = sio_in(up, TXX9_SILCR);
  551. /* byte size and parity */
  552. cval &= ~TXX9_SILCR_UMODE_MASK;
  553. switch (termios->c_cflag & CSIZE) {
  554. case CS7:
  555. cval |= TXX9_SILCR_UMODE_7BIT;
  556. break;
  557. default:
  558. case CS5: /* not supported */
  559. case CS6: /* not supported */
  560. case CS8:
  561. cval |= TXX9_SILCR_UMODE_8BIT;
  562. break;
  563. }
  564. cval &= ~TXX9_SILCR_USBL_MASK;
  565. if (termios->c_cflag & CSTOPB)
  566. cval |= TXX9_SILCR_USBL_2BIT;
  567. else
  568. cval |= TXX9_SILCR_USBL_1BIT;
  569. cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
  570. if (termios->c_cflag & PARENB)
  571. cval |= TXX9_SILCR_UPEN;
  572. if (!(termios->c_cflag & PARODD))
  573. cval |= TXX9_SILCR_UEPS;
  574. /*
  575. * Ask the core to calculate the divisor for us.
  576. */
  577. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
  578. quot = uart_get_divisor(port, baud);
  579. /* Set up FIFOs */
  580. /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
  581. fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
  582. /*
  583. * Ok, we're now changing the port state. Do it with
  584. * interrupts disabled.
  585. */
  586. spin_lock_irqsave(&up->port.lock, flags);
  587. /*
  588. * Update the per-port timeout.
  589. */
  590. uart_update_timeout(port, termios->c_cflag, baud);
  591. up->port.read_status_mask = TXX9_SIDISR_UOER |
  592. TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
  593. if (termios->c_iflag & INPCK)
  594. up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
  595. if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
  596. up->port.read_status_mask |= TXX9_SIDISR_UBRK;
  597. /*
  598. * Characteres to ignore
  599. */
  600. up->port.ignore_status_mask = 0;
  601. if (termios->c_iflag & IGNPAR)
  602. up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
  603. if (termios->c_iflag & IGNBRK) {
  604. up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
  605. /*
  606. * If we're ignoring parity and break indicators,
  607. * ignore overruns too (for real raw support).
  608. */
  609. if (termios->c_iflag & IGNPAR)
  610. up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
  611. }
  612. /*
  613. * ignore all characters if CREAD is not set
  614. */
  615. if ((termios->c_cflag & CREAD) == 0)
  616. up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
  617. /* CTS flow control flag */
  618. if ((termios->c_cflag & CRTSCTS) &&
  619. (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
  620. sio_set(up, TXX9_SIFLCR,
  621. TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
  622. } else {
  623. sio_mask(up, TXX9_SIFLCR,
  624. TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
  625. }
  626. sio_out(up, TXX9_SILCR, cval);
  627. sio_quot_set(up, quot);
  628. sio_out(up, TXX9_SIFCR, fcr);
  629. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  630. spin_unlock_irqrestore(&up->port.lock, flags);
  631. }
  632. static void
  633. serial_txx9_pm(struct uart_port *port, unsigned int state,
  634. unsigned int oldstate)
  635. {
  636. /*
  637. * If oldstate was -1 this is called from
  638. * uart_configure_port(). In this case do not initialize the
  639. * port now, because the port was already initialized (for
  640. * non-console port) or should not be initialized here (for
  641. * console port). If we initialized the port here we lose
  642. * serial console settings.
  643. */
  644. if (state == 0 && oldstate != -1)
  645. serial_txx9_initialize(port);
  646. }
  647. static int serial_txx9_request_resource(struct uart_txx9_port *up)
  648. {
  649. unsigned int size = TXX9_REGION_SIZE;
  650. int ret = 0;
  651. switch (up->port.iotype) {
  652. default:
  653. if (!up->port.mapbase)
  654. break;
  655. if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
  656. ret = -EBUSY;
  657. break;
  658. }
  659. if (up->port.flags & UPF_IOREMAP) {
  660. up->port.membase = ioremap(up->port.mapbase, size);
  661. if (!up->port.membase) {
  662. release_mem_region(up->port.mapbase, size);
  663. ret = -ENOMEM;
  664. }
  665. }
  666. break;
  667. case UPIO_PORT:
  668. if (!request_region(up->port.iobase, size, "serial_txx9"))
  669. ret = -EBUSY;
  670. break;
  671. }
  672. return ret;
  673. }
  674. static void serial_txx9_release_resource(struct uart_txx9_port *up)
  675. {
  676. unsigned int size = TXX9_REGION_SIZE;
  677. switch (up->port.iotype) {
  678. default:
  679. if (!up->port.mapbase)
  680. break;
  681. if (up->port.flags & UPF_IOREMAP) {
  682. iounmap(up->port.membase);
  683. up->port.membase = NULL;
  684. }
  685. release_mem_region(up->port.mapbase, size);
  686. break;
  687. case UPIO_PORT:
  688. release_region(up->port.iobase, size);
  689. break;
  690. }
  691. }
  692. static void serial_txx9_release_port(struct uart_port *port)
  693. {
  694. struct uart_txx9_port *up = to_uart_txx9_port(port);
  695. serial_txx9_release_resource(up);
  696. }
  697. static int serial_txx9_request_port(struct uart_port *port)
  698. {
  699. struct uart_txx9_port *up = to_uart_txx9_port(port);
  700. return serial_txx9_request_resource(up);
  701. }
  702. static void serial_txx9_config_port(struct uart_port *port, int uflags)
  703. {
  704. struct uart_txx9_port *up = to_uart_txx9_port(port);
  705. int ret;
  706. /*
  707. * Find the region that we can probe for. This in turn
  708. * tells us whether we can probe for the type of port.
  709. */
  710. ret = serial_txx9_request_resource(up);
  711. if (ret < 0)
  712. return;
  713. port->type = PORT_TXX9;
  714. up->port.fifosize = TXX9_SIO_TX_FIFO;
  715. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  716. if (up->port.line == up->port.cons->index)
  717. return;
  718. #endif
  719. serial_txx9_initialize(port);
  720. }
  721. static const char *
  722. serial_txx9_type(struct uart_port *port)
  723. {
  724. return "txx9";
  725. }
  726. static const struct uart_ops serial_txx9_pops = {
  727. .tx_empty = serial_txx9_tx_empty,
  728. .set_mctrl = serial_txx9_set_mctrl,
  729. .get_mctrl = serial_txx9_get_mctrl,
  730. .stop_tx = serial_txx9_stop_tx,
  731. .start_tx = serial_txx9_start_tx,
  732. .stop_rx = serial_txx9_stop_rx,
  733. .break_ctl = serial_txx9_break_ctl,
  734. .startup = serial_txx9_startup,
  735. .shutdown = serial_txx9_shutdown,
  736. .set_termios = serial_txx9_set_termios,
  737. .pm = serial_txx9_pm,
  738. .type = serial_txx9_type,
  739. .release_port = serial_txx9_release_port,
  740. .request_port = serial_txx9_request_port,
  741. .config_port = serial_txx9_config_port,
  742. #ifdef CONFIG_CONSOLE_POLL
  743. .poll_get_char = serial_txx9_get_poll_char,
  744. .poll_put_char = serial_txx9_put_poll_char,
  745. #endif
  746. };
  747. static struct uart_txx9_port serial_txx9_ports[UART_NR];
  748. static void __init serial_txx9_register_ports(struct uart_driver *drv,
  749. struct device *dev)
  750. {
  751. int i;
  752. for (i = 0; i < UART_NR; i++) {
  753. struct uart_txx9_port *up = &serial_txx9_ports[i];
  754. up->port.line = i;
  755. up->port.ops = &serial_txx9_pops;
  756. up->port.dev = dev;
  757. if (up->port.iobase || up->port.mapbase)
  758. uart_add_one_port(drv, &up->port);
  759. }
  760. }
  761. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  762. static void serial_txx9_console_putchar(struct uart_port *port, int ch)
  763. {
  764. struct uart_txx9_port *up = to_uart_txx9_port(port);
  765. wait_for_xmitr(up);
  766. sio_out(up, TXX9_SITFIFO, ch);
  767. }
  768. /*
  769. * Print a string to the serial port trying not to disturb
  770. * any possible real use of the port...
  771. *
  772. * The console_lock must be held when we get here.
  773. */
  774. static void
  775. serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
  776. {
  777. struct uart_txx9_port *up = &serial_txx9_ports[co->index];
  778. unsigned int ier, flcr;
  779. /*
  780. * First save the UER then disable the interrupts
  781. */
  782. ier = sio_in(up, TXX9_SIDICR);
  783. sio_out(up, TXX9_SIDICR, 0);
  784. /*
  785. * Disable flow-control if enabled (and unnecessary)
  786. */
  787. flcr = sio_in(up, TXX9_SIFLCR);
  788. if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
  789. sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
  790. uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
  791. /*
  792. * Finally, wait for transmitter to become empty
  793. * and restore the IER
  794. */
  795. wait_for_xmitr(up);
  796. sio_out(up, TXX9_SIFLCR, flcr);
  797. sio_out(up, TXX9_SIDICR, ier);
  798. }
  799. static int __init serial_txx9_console_setup(struct console *co, char *options)
  800. {
  801. struct uart_port *port;
  802. struct uart_txx9_port *up;
  803. int baud = 9600;
  804. int bits = 8;
  805. int parity = 'n';
  806. int flow = 'n';
  807. /*
  808. * Check whether an invalid uart number has been specified, and
  809. * if so, search for the first available port that does have
  810. * console support.
  811. */
  812. if (co->index >= UART_NR)
  813. co->index = 0;
  814. up = &serial_txx9_ports[co->index];
  815. port = &up->port;
  816. if (!port->ops)
  817. return -ENODEV;
  818. serial_txx9_initialize(&up->port);
  819. if (options)
  820. uart_parse_options(options, &baud, &parity, &bits, &flow);
  821. return uart_set_options(port, co, baud, parity, bits, flow);
  822. }
  823. static struct uart_driver serial_txx9_reg;
  824. static struct console serial_txx9_console = {
  825. .name = TXX9_TTY_NAME,
  826. .write = serial_txx9_console_write,
  827. .device = uart_console_device,
  828. .setup = serial_txx9_console_setup,
  829. .flags = CON_PRINTBUFFER,
  830. .index = -1,
  831. .data = &serial_txx9_reg,
  832. };
  833. static int __init serial_txx9_console_init(void)
  834. {
  835. register_console(&serial_txx9_console);
  836. return 0;
  837. }
  838. console_initcall(serial_txx9_console_init);
  839. #define SERIAL_TXX9_CONSOLE &serial_txx9_console
  840. #else
  841. #define SERIAL_TXX9_CONSOLE NULL
  842. #endif
  843. static struct uart_driver serial_txx9_reg = {
  844. .owner = THIS_MODULE,
  845. .driver_name = "serial_txx9",
  846. .dev_name = TXX9_TTY_NAME,
  847. .major = TXX9_TTY_MAJOR,
  848. .minor = TXX9_TTY_MINOR_START,
  849. .nr = UART_NR,
  850. .cons = SERIAL_TXX9_CONSOLE,
  851. };
  852. int __init early_serial_txx9_setup(struct uart_port *port)
  853. {
  854. if (port->line >= ARRAY_SIZE(serial_txx9_ports))
  855. return -ENODEV;
  856. serial_txx9_ports[port->line].port = *port;
  857. serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
  858. serial_txx9_ports[port->line].port.flags |=
  859. UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
  860. return 0;
  861. }
  862. static DEFINE_MUTEX(serial_txx9_mutex);
  863. /**
  864. * serial_txx9_register_port - register a serial port
  865. * @port: serial port template
  866. *
  867. * Configure the serial port specified by the request.
  868. *
  869. * The port is then probed and if necessary the IRQ is autodetected
  870. * If this fails an error is returned.
  871. *
  872. * On success the port is ready to use and the line number is returned.
  873. */
  874. static int serial_txx9_register_port(struct uart_port *port)
  875. {
  876. int i;
  877. struct uart_txx9_port *uart;
  878. int ret = -ENOSPC;
  879. mutex_lock(&serial_txx9_mutex);
  880. for (i = 0; i < UART_NR; i++) {
  881. uart = &serial_txx9_ports[i];
  882. if (uart_match_port(&uart->port, port)) {
  883. uart_remove_one_port(&serial_txx9_reg, &uart->port);
  884. break;
  885. }
  886. }
  887. if (i == UART_NR) {
  888. /* Find unused port */
  889. for (i = 0; i < UART_NR; i++) {
  890. uart = &serial_txx9_ports[i];
  891. if (!(uart->port.iobase || uart->port.mapbase))
  892. break;
  893. }
  894. }
  895. if (i < UART_NR) {
  896. uart->port.iobase = port->iobase;
  897. uart->port.membase = port->membase;
  898. uart->port.irq = port->irq;
  899. uart->port.uartclk = port->uartclk;
  900. uart->port.iotype = port->iotype;
  901. uart->port.flags = port->flags
  902. | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
  903. uart->port.mapbase = port->mapbase;
  904. if (port->dev)
  905. uart->port.dev = port->dev;
  906. ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
  907. if (ret == 0)
  908. ret = uart->port.line;
  909. }
  910. mutex_unlock(&serial_txx9_mutex);
  911. return ret;
  912. }
  913. /**
  914. * serial_txx9_unregister_port - remove a txx9 serial port at runtime
  915. * @line: serial line number
  916. *
  917. * Remove one serial port. This may not be called from interrupt
  918. * context. We hand the port back to the our control.
  919. */
  920. static void serial_txx9_unregister_port(int line)
  921. {
  922. struct uart_txx9_port *uart = &serial_txx9_ports[line];
  923. mutex_lock(&serial_txx9_mutex);
  924. uart_remove_one_port(&serial_txx9_reg, &uart->port);
  925. uart->port.flags = 0;
  926. uart->port.type = PORT_UNKNOWN;
  927. uart->port.iobase = 0;
  928. uart->port.mapbase = 0;
  929. uart->port.membase = NULL;
  930. uart->port.dev = NULL;
  931. mutex_unlock(&serial_txx9_mutex);
  932. }
  933. /*
  934. * Register a set of serial devices attached to a platform device.
  935. */
  936. static int serial_txx9_probe(struct platform_device *dev)
  937. {
  938. struct uart_port *p = dev_get_platdata(&dev->dev);
  939. struct uart_port port;
  940. int ret, i;
  941. memset(&port, 0, sizeof(struct uart_port));
  942. for (i = 0; p && p->uartclk != 0; p++, i++) {
  943. port.iobase = p->iobase;
  944. port.membase = p->membase;
  945. port.irq = p->irq;
  946. port.uartclk = p->uartclk;
  947. port.iotype = p->iotype;
  948. port.flags = p->flags;
  949. port.mapbase = p->mapbase;
  950. port.dev = &dev->dev;
  951. ret = serial_txx9_register_port(&port);
  952. if (ret < 0) {
  953. dev_err(&dev->dev, "unable to register port at index %d "
  954. "(IO%lx MEM%llx IRQ%d): %d\n", i,
  955. p->iobase, (unsigned long long)p->mapbase,
  956. p->irq, ret);
  957. }
  958. }
  959. return 0;
  960. }
  961. /*
  962. * Remove serial ports registered against a platform device.
  963. */
  964. static int serial_txx9_remove(struct platform_device *dev)
  965. {
  966. int i;
  967. for (i = 0; i < UART_NR; i++) {
  968. struct uart_txx9_port *up = &serial_txx9_ports[i];
  969. if (up->port.dev == &dev->dev)
  970. serial_txx9_unregister_port(i);
  971. }
  972. return 0;
  973. }
  974. #ifdef CONFIG_PM
  975. static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
  976. {
  977. int i;
  978. for (i = 0; i < UART_NR; i++) {
  979. struct uart_txx9_port *up = &serial_txx9_ports[i];
  980. if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
  981. uart_suspend_port(&serial_txx9_reg, &up->port);
  982. }
  983. return 0;
  984. }
  985. static int serial_txx9_resume(struct platform_device *dev)
  986. {
  987. int i;
  988. for (i = 0; i < UART_NR; i++) {
  989. struct uart_txx9_port *up = &serial_txx9_ports[i];
  990. if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
  991. uart_resume_port(&serial_txx9_reg, &up->port);
  992. }
  993. return 0;
  994. }
  995. #endif
  996. static struct platform_driver serial_txx9_plat_driver = {
  997. .probe = serial_txx9_probe,
  998. .remove = serial_txx9_remove,
  999. #ifdef CONFIG_PM
  1000. .suspend = serial_txx9_suspend,
  1001. .resume = serial_txx9_resume,
  1002. #endif
  1003. .driver = {
  1004. .name = "serial_txx9",
  1005. },
  1006. };
  1007. #ifdef ENABLE_SERIAL_TXX9_PCI
  1008. /*
  1009. * Probe one serial board. Unfortunately, there is no rhyme nor reason
  1010. * to the arrangement of serial ports on a PCI card.
  1011. */
  1012. static int
  1013. pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
  1014. {
  1015. struct uart_port port;
  1016. int line;
  1017. int rc;
  1018. rc = pci_enable_device(dev);
  1019. if (rc)
  1020. return rc;
  1021. memset(&port, 0, sizeof(port));
  1022. port.ops = &serial_txx9_pops;
  1023. port.flags |= UPF_TXX9_HAVE_CTS_LINE;
  1024. port.uartclk = 66670000;
  1025. port.irq = dev->irq;
  1026. port.iotype = UPIO_PORT;
  1027. port.iobase = pci_resource_start(dev, 1);
  1028. port.dev = &dev->dev;
  1029. line = serial_txx9_register_port(&port);
  1030. if (line < 0) {
  1031. printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
  1032. pci_disable_device(dev);
  1033. return line;
  1034. }
  1035. pci_set_drvdata(dev, &serial_txx9_ports[line]);
  1036. return 0;
  1037. }
  1038. static void pciserial_txx9_remove_one(struct pci_dev *dev)
  1039. {
  1040. struct uart_txx9_port *up = pci_get_drvdata(dev);
  1041. if (up) {
  1042. serial_txx9_unregister_port(up->port.line);
  1043. pci_disable_device(dev);
  1044. }
  1045. }
  1046. #ifdef CONFIG_PM
  1047. static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
  1048. {
  1049. struct uart_txx9_port *up = pci_get_drvdata(dev);
  1050. if (up)
  1051. uart_suspend_port(&serial_txx9_reg, &up->port);
  1052. pci_save_state(dev);
  1053. pci_set_power_state(dev, pci_choose_state(dev, state));
  1054. return 0;
  1055. }
  1056. static int pciserial_txx9_resume_one(struct pci_dev *dev)
  1057. {
  1058. struct uart_txx9_port *up = pci_get_drvdata(dev);
  1059. pci_set_power_state(dev, PCI_D0);
  1060. pci_restore_state(dev);
  1061. if (up)
  1062. uart_resume_port(&serial_txx9_reg, &up->port);
  1063. return 0;
  1064. }
  1065. #endif
  1066. static const struct pci_device_id serial_txx9_pci_tbl[] = {
  1067. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
  1068. { 0, }
  1069. };
  1070. static struct pci_driver serial_txx9_pci_driver = {
  1071. .name = "serial_txx9",
  1072. .probe = pciserial_txx9_init_one,
  1073. .remove = pciserial_txx9_remove_one,
  1074. #ifdef CONFIG_PM
  1075. .suspend = pciserial_txx9_suspend_one,
  1076. .resume = pciserial_txx9_resume_one,
  1077. #endif
  1078. .id_table = serial_txx9_pci_tbl,
  1079. };
  1080. MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
  1081. #endif /* ENABLE_SERIAL_TXX9_PCI */
  1082. static struct platform_device *serial_txx9_plat_devs;
  1083. static int __init serial_txx9_init(void)
  1084. {
  1085. int ret;
  1086. printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
  1087. ret = uart_register_driver(&serial_txx9_reg);
  1088. if (ret)
  1089. goto out;
  1090. serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
  1091. if (!serial_txx9_plat_devs) {
  1092. ret = -ENOMEM;
  1093. goto unreg_uart_drv;
  1094. }
  1095. ret = platform_device_add(serial_txx9_plat_devs);
  1096. if (ret)
  1097. goto put_dev;
  1098. serial_txx9_register_ports(&serial_txx9_reg,
  1099. &serial_txx9_plat_devs->dev);
  1100. ret = platform_driver_register(&serial_txx9_plat_driver);
  1101. if (ret)
  1102. goto del_dev;
  1103. #ifdef ENABLE_SERIAL_TXX9_PCI
  1104. ret = pci_register_driver(&serial_txx9_pci_driver);
  1105. if (ret) {
  1106. platform_driver_unregister(&serial_txx9_plat_driver);
  1107. }
  1108. #endif
  1109. if (ret == 0)
  1110. goto out;
  1111. del_dev:
  1112. platform_device_del(serial_txx9_plat_devs);
  1113. put_dev:
  1114. platform_device_put(serial_txx9_plat_devs);
  1115. unreg_uart_drv:
  1116. uart_unregister_driver(&serial_txx9_reg);
  1117. out:
  1118. return ret;
  1119. }
  1120. static void __exit serial_txx9_exit(void)
  1121. {
  1122. int i;
  1123. #ifdef ENABLE_SERIAL_TXX9_PCI
  1124. pci_unregister_driver(&serial_txx9_pci_driver);
  1125. #endif
  1126. platform_driver_unregister(&serial_txx9_plat_driver);
  1127. platform_device_unregister(serial_txx9_plat_devs);
  1128. for (i = 0; i < UART_NR; i++) {
  1129. struct uart_txx9_port *up = &serial_txx9_ports[i];
  1130. if (up->port.iobase || up->port.mapbase)
  1131. uart_remove_one_port(&serial_txx9_reg, &up->port);
  1132. }
  1133. uart_unregister_driver(&serial_txx9_reg);
  1134. }
  1135. module_init(serial_txx9_init);
  1136. module_exit(serial_txx9_exit);
  1137. MODULE_LICENSE("GPL");
  1138. MODULE_DESCRIPTION("TX39/49 serial driver");
  1139. MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);