ar933x_uart.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Atheros AR933X SoC built-in UART driver
  4. *
  5. * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  6. *
  7. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  8. */
  9. #include <linux/module.h>
  10. #include <linux/ioport.h>
  11. #include <linux/init.h>
  12. #include <linux/console.h>
  13. #include <linux/sysrq.h>
  14. #include <linux/delay.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/of.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/tty.h>
  19. #include <linux/tty_flip.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/serial.h>
  22. #include <linux/slab.h>
  23. #include <linux/io.h>
  24. #include <linux/irq.h>
  25. #include <linux/clk.h>
  26. #include <asm/div64.h>
  27. #include <asm/mach-ath79/ar933x_uart.h>
  28. #define DRIVER_NAME "ar933x-uart"
  29. #define AR933X_UART_MAX_SCALE 0xff
  30. #define AR933X_UART_MAX_STEP 0xffff
  31. #define AR933X_UART_MIN_BAUD 300
  32. #define AR933X_UART_MAX_BAUD 3000000
  33. #define AR933X_DUMMY_STATUS_RD 0x01
  34. static struct uart_driver ar933x_uart_driver;
  35. struct ar933x_uart_port {
  36. struct uart_port port;
  37. unsigned int ier; /* shadow Interrupt Enable Register */
  38. unsigned int min_baud;
  39. unsigned int max_baud;
  40. struct clk *clk;
  41. };
  42. static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
  43. int offset)
  44. {
  45. return readl(up->port.membase + offset);
  46. }
  47. static inline void ar933x_uart_write(struct ar933x_uart_port *up,
  48. int offset, unsigned int value)
  49. {
  50. writel(value, up->port.membase + offset);
  51. }
  52. static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
  53. unsigned int offset,
  54. unsigned int mask,
  55. unsigned int val)
  56. {
  57. unsigned int t;
  58. t = ar933x_uart_read(up, offset);
  59. t &= ~mask;
  60. t |= val;
  61. ar933x_uart_write(up, offset, t);
  62. }
  63. static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
  64. unsigned int offset,
  65. unsigned int val)
  66. {
  67. ar933x_uart_rmw(up, offset, 0, val);
  68. }
  69. static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
  70. unsigned int offset,
  71. unsigned int val)
  72. {
  73. ar933x_uart_rmw(up, offset, val, 0);
  74. }
  75. static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
  76. {
  77. up->ier |= AR933X_UART_INT_TX_EMPTY;
  78. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  79. }
  80. static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
  81. {
  82. up->ier &= ~AR933X_UART_INT_TX_EMPTY;
  83. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  84. }
  85. static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
  86. {
  87. unsigned int rdata;
  88. rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
  89. rdata |= AR933X_UART_DATA_TX_CSR;
  90. ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
  91. }
  92. static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
  93. {
  94. struct ar933x_uart_port *up =
  95. container_of(port, struct ar933x_uart_port, port);
  96. unsigned long flags;
  97. unsigned int rdata;
  98. spin_lock_irqsave(&up->port.lock, flags);
  99. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  100. spin_unlock_irqrestore(&up->port.lock, flags);
  101. return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
  102. }
  103. static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
  104. {
  105. return TIOCM_CAR;
  106. }
  107. static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  108. {
  109. }
  110. static void ar933x_uart_start_tx(struct uart_port *port)
  111. {
  112. struct ar933x_uart_port *up =
  113. container_of(port, struct ar933x_uart_port, port);
  114. ar933x_uart_start_tx_interrupt(up);
  115. }
  116. static void ar933x_uart_stop_tx(struct uart_port *port)
  117. {
  118. struct ar933x_uart_port *up =
  119. container_of(port, struct ar933x_uart_port, port);
  120. ar933x_uart_stop_tx_interrupt(up);
  121. }
  122. static void ar933x_uart_stop_rx(struct uart_port *port)
  123. {
  124. struct ar933x_uart_port *up =
  125. container_of(port, struct ar933x_uart_port, port);
  126. up->ier &= ~AR933X_UART_INT_RX_VALID;
  127. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  128. }
  129. static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
  130. {
  131. struct ar933x_uart_port *up =
  132. container_of(port, struct ar933x_uart_port, port);
  133. unsigned long flags;
  134. spin_lock_irqsave(&up->port.lock, flags);
  135. if (break_state == -1)
  136. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  137. AR933X_UART_CS_TX_BREAK);
  138. else
  139. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  140. AR933X_UART_CS_TX_BREAK);
  141. spin_unlock_irqrestore(&up->port.lock, flags);
  142. }
  143. /*
  144. * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
  145. */
  146. static unsigned long ar933x_uart_get_baud(unsigned int clk,
  147. unsigned int scale,
  148. unsigned int step)
  149. {
  150. u64 t;
  151. u32 div;
  152. div = (2 << 16) * (scale + 1);
  153. t = clk;
  154. t *= step;
  155. t += (div / 2);
  156. do_div(t, div);
  157. return t;
  158. }
  159. static void ar933x_uart_get_scale_step(unsigned int clk,
  160. unsigned int baud,
  161. unsigned int *scale,
  162. unsigned int *step)
  163. {
  164. unsigned int tscale;
  165. long min_diff;
  166. *scale = 0;
  167. *step = 0;
  168. min_diff = baud;
  169. for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
  170. u64 tstep;
  171. int diff;
  172. tstep = baud * (tscale + 1);
  173. tstep *= (2 << 16);
  174. do_div(tstep, clk);
  175. if (tstep > AR933X_UART_MAX_STEP)
  176. break;
  177. diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
  178. if (diff < min_diff) {
  179. min_diff = diff;
  180. *scale = tscale;
  181. *step = tstep;
  182. }
  183. }
  184. }
  185. static void ar933x_uart_set_termios(struct uart_port *port,
  186. struct ktermios *new,
  187. struct ktermios *old)
  188. {
  189. struct ar933x_uart_port *up =
  190. container_of(port, struct ar933x_uart_port, port);
  191. unsigned int cs;
  192. unsigned long flags;
  193. unsigned int baud, scale, step;
  194. /* Only CS8 is supported */
  195. new->c_cflag &= ~CSIZE;
  196. new->c_cflag |= CS8;
  197. /* Only one stop bit is supported */
  198. new->c_cflag &= ~CSTOPB;
  199. cs = 0;
  200. if (new->c_cflag & PARENB) {
  201. if (!(new->c_cflag & PARODD))
  202. cs |= AR933X_UART_CS_PARITY_EVEN;
  203. else
  204. cs |= AR933X_UART_CS_PARITY_ODD;
  205. } else {
  206. cs |= AR933X_UART_CS_PARITY_NONE;
  207. }
  208. /* Mark/space parity is not supported */
  209. new->c_cflag &= ~CMSPAR;
  210. baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
  211. ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
  212. /*
  213. * Ok, we're now changing the port state. Do it with
  214. * interrupts disabled.
  215. */
  216. spin_lock_irqsave(&up->port.lock, flags);
  217. /* disable the UART */
  218. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  219. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
  220. /* Update the per-port timeout. */
  221. uart_update_timeout(port, new->c_cflag, baud);
  222. up->port.ignore_status_mask = 0;
  223. /* ignore all characters if CREAD is not set */
  224. if ((new->c_cflag & CREAD) == 0)
  225. up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
  226. ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
  227. scale << AR933X_UART_CLOCK_SCALE_S | step);
  228. /* setup configuration register */
  229. ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
  230. /* enable host interrupt */
  231. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  232. AR933X_UART_CS_HOST_INT_EN);
  233. /* enable RX and TX ready overide */
  234. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  235. AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
  236. /* reenable the UART */
  237. ar933x_uart_rmw(up, AR933X_UART_CS_REG,
  238. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
  239. AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
  240. spin_unlock_irqrestore(&up->port.lock, flags);
  241. if (tty_termios_baud_rate(new))
  242. tty_termios_encode_baud_rate(new, baud, baud);
  243. }
  244. static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
  245. {
  246. struct tty_port *port = &up->port.state->port;
  247. int max_count = 256;
  248. do {
  249. unsigned int rdata;
  250. unsigned char ch;
  251. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  252. if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
  253. break;
  254. /* remove the character from the FIFO */
  255. ar933x_uart_write(up, AR933X_UART_DATA_REG,
  256. AR933X_UART_DATA_RX_CSR);
  257. up->port.icount.rx++;
  258. ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
  259. if (uart_handle_sysrq_char(&up->port, ch))
  260. continue;
  261. if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
  262. tty_insert_flip_char(port, ch, TTY_NORMAL);
  263. } while (max_count-- > 0);
  264. spin_unlock(&up->port.lock);
  265. tty_flip_buffer_push(port);
  266. spin_lock(&up->port.lock);
  267. }
  268. static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
  269. {
  270. struct circ_buf *xmit = &up->port.state->xmit;
  271. int count;
  272. if (uart_tx_stopped(&up->port))
  273. return;
  274. count = up->port.fifosize;
  275. do {
  276. unsigned int rdata;
  277. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  278. if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
  279. break;
  280. if (up->port.x_char) {
  281. ar933x_uart_putc(up, up->port.x_char);
  282. up->port.icount.tx++;
  283. up->port.x_char = 0;
  284. continue;
  285. }
  286. if (uart_circ_empty(xmit))
  287. break;
  288. ar933x_uart_putc(up, xmit->buf[xmit->tail]);
  289. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  290. up->port.icount.tx++;
  291. } while (--count > 0);
  292. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  293. uart_write_wakeup(&up->port);
  294. if (!uart_circ_empty(xmit))
  295. ar933x_uart_start_tx_interrupt(up);
  296. }
  297. static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
  298. {
  299. struct ar933x_uart_port *up = dev_id;
  300. unsigned int status;
  301. status = ar933x_uart_read(up, AR933X_UART_CS_REG);
  302. if ((status & AR933X_UART_CS_HOST_INT) == 0)
  303. return IRQ_NONE;
  304. spin_lock(&up->port.lock);
  305. status = ar933x_uart_read(up, AR933X_UART_INT_REG);
  306. status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  307. if (status & AR933X_UART_INT_RX_VALID) {
  308. ar933x_uart_write(up, AR933X_UART_INT_REG,
  309. AR933X_UART_INT_RX_VALID);
  310. ar933x_uart_rx_chars(up);
  311. }
  312. if (status & AR933X_UART_INT_TX_EMPTY) {
  313. ar933x_uart_write(up, AR933X_UART_INT_REG,
  314. AR933X_UART_INT_TX_EMPTY);
  315. ar933x_uart_stop_tx_interrupt(up);
  316. ar933x_uart_tx_chars(up);
  317. }
  318. spin_unlock(&up->port.lock);
  319. return IRQ_HANDLED;
  320. }
  321. static int ar933x_uart_startup(struct uart_port *port)
  322. {
  323. struct ar933x_uart_port *up =
  324. container_of(port, struct ar933x_uart_port, port);
  325. unsigned long flags;
  326. int ret;
  327. ret = request_irq(up->port.irq, ar933x_uart_interrupt,
  328. up->port.irqflags, dev_name(up->port.dev), up);
  329. if (ret)
  330. return ret;
  331. spin_lock_irqsave(&up->port.lock, flags);
  332. /* Enable HOST interrupts */
  333. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  334. AR933X_UART_CS_HOST_INT_EN);
  335. /* enable RX and TX ready overide */
  336. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  337. AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
  338. /* Enable RX interrupts */
  339. up->ier = AR933X_UART_INT_RX_VALID;
  340. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  341. spin_unlock_irqrestore(&up->port.lock, flags);
  342. return 0;
  343. }
  344. static void ar933x_uart_shutdown(struct uart_port *port)
  345. {
  346. struct ar933x_uart_port *up =
  347. container_of(port, struct ar933x_uart_port, port);
  348. /* Disable all interrupts */
  349. up->ier = 0;
  350. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  351. /* Disable break condition */
  352. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  353. AR933X_UART_CS_TX_BREAK);
  354. free_irq(up->port.irq, up);
  355. }
  356. static const char *ar933x_uart_type(struct uart_port *port)
  357. {
  358. return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
  359. }
  360. static void ar933x_uart_release_port(struct uart_port *port)
  361. {
  362. /* Nothing to release ... */
  363. }
  364. static int ar933x_uart_request_port(struct uart_port *port)
  365. {
  366. /* UARTs always present */
  367. return 0;
  368. }
  369. static void ar933x_uart_config_port(struct uart_port *port, int flags)
  370. {
  371. if (flags & UART_CONFIG_TYPE)
  372. port->type = PORT_AR933X;
  373. }
  374. static int ar933x_uart_verify_port(struct uart_port *port,
  375. struct serial_struct *ser)
  376. {
  377. struct ar933x_uart_port *up =
  378. container_of(port, struct ar933x_uart_port, port);
  379. if (ser->type != PORT_UNKNOWN &&
  380. ser->type != PORT_AR933X)
  381. return -EINVAL;
  382. if (ser->irq < 0 || ser->irq >= NR_IRQS)
  383. return -EINVAL;
  384. if (ser->baud_base < up->min_baud ||
  385. ser->baud_base > up->max_baud)
  386. return -EINVAL;
  387. return 0;
  388. }
  389. static const struct uart_ops ar933x_uart_ops = {
  390. .tx_empty = ar933x_uart_tx_empty,
  391. .set_mctrl = ar933x_uart_set_mctrl,
  392. .get_mctrl = ar933x_uart_get_mctrl,
  393. .stop_tx = ar933x_uart_stop_tx,
  394. .start_tx = ar933x_uart_start_tx,
  395. .stop_rx = ar933x_uart_stop_rx,
  396. .break_ctl = ar933x_uart_break_ctl,
  397. .startup = ar933x_uart_startup,
  398. .shutdown = ar933x_uart_shutdown,
  399. .set_termios = ar933x_uart_set_termios,
  400. .type = ar933x_uart_type,
  401. .release_port = ar933x_uart_release_port,
  402. .request_port = ar933x_uart_request_port,
  403. .config_port = ar933x_uart_config_port,
  404. .verify_port = ar933x_uart_verify_port,
  405. };
  406. #ifdef CONFIG_SERIAL_AR933X_CONSOLE
  407. static struct ar933x_uart_port *
  408. ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
  409. static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
  410. {
  411. unsigned int status;
  412. unsigned int timeout = 60000;
  413. /* Wait up to 60ms for the character(s) to be sent. */
  414. do {
  415. status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  416. if (--timeout == 0)
  417. break;
  418. udelay(1);
  419. } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
  420. }
  421. static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
  422. {
  423. struct ar933x_uart_port *up =
  424. container_of(port, struct ar933x_uart_port, port);
  425. ar933x_uart_wait_xmitr(up);
  426. ar933x_uart_putc(up, ch);
  427. }
  428. static void ar933x_uart_console_write(struct console *co, const char *s,
  429. unsigned int count)
  430. {
  431. struct ar933x_uart_port *up = ar933x_console_ports[co->index];
  432. unsigned long flags;
  433. unsigned int int_en;
  434. int locked = 1;
  435. local_irq_save(flags);
  436. if (up->port.sysrq)
  437. locked = 0;
  438. else if (oops_in_progress)
  439. locked = spin_trylock(&up->port.lock);
  440. else
  441. spin_lock(&up->port.lock);
  442. /*
  443. * First save the IER then disable the interrupts
  444. */
  445. int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  446. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
  447. uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
  448. /*
  449. * Finally, wait for transmitter to become empty
  450. * and restore the IER
  451. */
  452. ar933x_uart_wait_xmitr(up);
  453. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
  454. ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
  455. if (locked)
  456. spin_unlock(&up->port.lock);
  457. local_irq_restore(flags);
  458. }
  459. static int ar933x_uart_console_setup(struct console *co, char *options)
  460. {
  461. struct ar933x_uart_port *up;
  462. int baud = 115200;
  463. int bits = 8;
  464. int parity = 'n';
  465. int flow = 'n';
  466. if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
  467. return -EINVAL;
  468. up = ar933x_console_ports[co->index];
  469. if (!up)
  470. return -ENODEV;
  471. if (options)
  472. uart_parse_options(options, &baud, &parity, &bits, &flow);
  473. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  474. }
  475. static struct console ar933x_uart_console = {
  476. .name = "ttyATH",
  477. .write = ar933x_uart_console_write,
  478. .device = uart_console_device,
  479. .setup = ar933x_uart_console_setup,
  480. .flags = CON_PRINTBUFFER,
  481. .index = -1,
  482. .data = &ar933x_uart_driver,
  483. };
  484. #endif /* CONFIG_SERIAL_AR933X_CONSOLE */
  485. static struct uart_driver ar933x_uart_driver = {
  486. .owner = THIS_MODULE,
  487. .driver_name = DRIVER_NAME,
  488. .dev_name = "ttyATH",
  489. .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
  490. .cons = NULL, /* filled in runtime */
  491. };
  492. static int ar933x_uart_probe(struct platform_device *pdev)
  493. {
  494. struct ar933x_uart_port *up;
  495. struct uart_port *port;
  496. struct resource *mem_res;
  497. struct resource *irq_res;
  498. struct device_node *np;
  499. unsigned int baud;
  500. int id;
  501. int ret;
  502. np = pdev->dev.of_node;
  503. if (IS_ENABLED(CONFIG_OF) && np) {
  504. id = of_alias_get_id(np, "serial");
  505. if (id < 0) {
  506. dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
  507. id);
  508. return id;
  509. }
  510. } else {
  511. id = pdev->id;
  512. if (id == -1)
  513. id = 0;
  514. }
  515. if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
  516. return -EINVAL;
  517. irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  518. if (!irq_res) {
  519. dev_err(&pdev->dev, "no IRQ resource\n");
  520. return -EINVAL;
  521. }
  522. up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
  523. GFP_KERNEL);
  524. if (!up)
  525. return -ENOMEM;
  526. up->clk = devm_clk_get(&pdev->dev, "uart");
  527. if (IS_ERR(up->clk)) {
  528. dev_err(&pdev->dev, "unable to get UART clock\n");
  529. return PTR_ERR(up->clk);
  530. }
  531. port = &up->port;
  532. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  533. port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
  534. if (IS_ERR(port->membase))
  535. return PTR_ERR(port->membase);
  536. ret = clk_prepare_enable(up->clk);
  537. if (ret)
  538. return ret;
  539. port->uartclk = clk_get_rate(up->clk);
  540. if (!port->uartclk) {
  541. ret = -EINVAL;
  542. goto err_disable_clk;
  543. }
  544. port->mapbase = mem_res->start;
  545. port->line = id;
  546. port->irq = irq_res->start;
  547. port->dev = &pdev->dev;
  548. port->type = PORT_AR933X;
  549. port->iotype = UPIO_MEM32;
  550. port->regshift = 2;
  551. port->fifosize = AR933X_UART_FIFO_SIZE;
  552. port->ops = &ar933x_uart_ops;
  553. baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
  554. up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
  555. baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
  556. up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
  557. #ifdef CONFIG_SERIAL_AR933X_CONSOLE
  558. ar933x_console_ports[up->port.line] = up;
  559. #endif
  560. ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
  561. if (ret)
  562. goto err_disable_clk;
  563. platform_set_drvdata(pdev, up);
  564. return 0;
  565. err_disable_clk:
  566. clk_disable_unprepare(up->clk);
  567. return ret;
  568. }
  569. static int ar933x_uart_remove(struct platform_device *pdev)
  570. {
  571. struct ar933x_uart_port *up;
  572. up = platform_get_drvdata(pdev);
  573. if (up) {
  574. uart_remove_one_port(&ar933x_uart_driver, &up->port);
  575. clk_disable_unprepare(up->clk);
  576. }
  577. return 0;
  578. }
  579. #ifdef CONFIG_OF
  580. static const struct of_device_id ar933x_uart_of_ids[] = {
  581. { .compatible = "qca,ar9330-uart" },
  582. {},
  583. };
  584. MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
  585. #endif
  586. static struct platform_driver ar933x_uart_platform_driver = {
  587. .probe = ar933x_uart_probe,
  588. .remove = ar933x_uart_remove,
  589. .driver = {
  590. .name = DRIVER_NAME,
  591. .of_match_table = of_match_ptr(ar933x_uart_of_ids),
  592. },
  593. };
  594. static int __init ar933x_uart_init(void)
  595. {
  596. int ret;
  597. #ifdef CONFIG_SERIAL_AR933X_CONSOLE
  598. ar933x_uart_driver.cons = &ar933x_uart_console;
  599. #endif
  600. ret = uart_register_driver(&ar933x_uart_driver);
  601. if (ret)
  602. goto err_out;
  603. ret = platform_driver_register(&ar933x_uart_platform_driver);
  604. if (ret)
  605. goto err_unregister_uart_driver;
  606. return 0;
  607. err_unregister_uart_driver:
  608. uart_unregister_driver(&ar933x_uart_driver);
  609. err_out:
  610. return ret;
  611. }
  612. static void __exit ar933x_uart_exit(void)
  613. {
  614. platform_driver_unregister(&ar933x_uart_platform_driver);
  615. uart_unregister_driver(&ar933x_uart_driver);
  616. }
  617. module_init(ar933x_uart_init);
  618. module_exit(ar933x_uart_exit);
  619. MODULE_DESCRIPTION("Atheros AR933X UART driver");
  620. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
  621. MODULE_LICENSE("GPL v2");
  622. MODULE_ALIAS("platform:" DRIVER_NAME);