altera_uart.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * altera_uart.c -- Altera UART driver
  4. *
  5. * Based on mcf.c -- Freescale ColdFire UART driver
  6. *
  7. * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
  8. * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
  9. * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/timer.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/module.h>
  16. #include <linux/console.h>
  17. #include <linux/tty.h>
  18. #include <linux/tty_flip.h>
  19. #include <linux/serial.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/of.h>
  23. #include <linux/io.h>
  24. #include <linux/altera_uart.h>
  25. #define DRV_NAME "altera_uart"
  26. #define SERIAL_ALTERA_MAJOR 204
  27. #define SERIAL_ALTERA_MINOR 213
  28. /*
  29. * Altera UART register definitions according to the Nios UART datasheet:
  30. * http://www.altera.com/literature/ds/ds_nios_uart.pdf
  31. */
  32. #define ALTERA_UART_SIZE 32
  33. #define ALTERA_UART_RXDATA_REG 0
  34. #define ALTERA_UART_TXDATA_REG 4
  35. #define ALTERA_UART_STATUS_REG 8
  36. #define ALTERA_UART_CONTROL_REG 12
  37. #define ALTERA_UART_DIVISOR_REG 16
  38. #define ALTERA_UART_EOP_REG 20
  39. #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
  40. #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
  41. #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
  42. #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
  43. #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
  44. #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
  45. #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
  46. #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
  47. #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
  48. #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
  49. #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
  50. #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
  51. /* Enable interrupt on... */
  52. #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
  53. #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
  54. #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
  55. #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
  56. #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
  57. #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
  58. #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
  59. #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
  60. #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
  61. #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
  62. #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
  63. #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
  64. #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
  65. /*
  66. * Local per-uart structure.
  67. */
  68. struct altera_uart {
  69. struct uart_port port;
  70. struct timer_list tmr;
  71. unsigned int sigs; /* Local copy of line sigs */
  72. unsigned short imr; /* Local IMR mirror */
  73. };
  74. static u32 altera_uart_readl(struct uart_port *port, int reg)
  75. {
  76. return readl(port->membase + (reg << port->regshift));
  77. }
  78. static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
  79. {
  80. writel(dat, port->membase + (reg << port->regshift));
  81. }
  82. static unsigned int altera_uart_tx_empty(struct uart_port *port)
  83. {
  84. return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  85. ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
  86. }
  87. static unsigned int altera_uart_get_mctrl(struct uart_port *port)
  88. {
  89. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  90. unsigned int sigs;
  91. sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  92. ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
  93. sigs |= (pp->sigs & TIOCM_RTS);
  94. return sigs;
  95. }
  96. static void altera_uart_update_ctrl_reg(struct altera_uart *pp)
  97. {
  98. unsigned short imr = pp->imr;
  99. /*
  100. * If the device doesn't have an irq, ensure that the irq bits are
  101. * masked out to keep the irq line inactive.
  102. */
  103. if (!pp->port.irq)
  104. imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK;
  105. altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG);
  106. }
  107. static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
  108. {
  109. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  110. pp->sigs = sigs;
  111. if (sigs & TIOCM_RTS)
  112. pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
  113. else
  114. pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
  115. altera_uart_update_ctrl_reg(pp);
  116. }
  117. static void altera_uart_start_tx(struct uart_port *port)
  118. {
  119. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  120. pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
  121. altera_uart_update_ctrl_reg(pp);
  122. }
  123. static void altera_uart_stop_tx(struct uart_port *port)
  124. {
  125. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  126. pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
  127. altera_uart_update_ctrl_reg(pp);
  128. }
  129. static void altera_uart_stop_rx(struct uart_port *port)
  130. {
  131. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  132. pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
  133. altera_uart_update_ctrl_reg(pp);
  134. }
  135. static void altera_uart_break_ctl(struct uart_port *port, int break_state)
  136. {
  137. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  138. unsigned long flags;
  139. spin_lock_irqsave(&port->lock, flags);
  140. if (break_state == -1)
  141. pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
  142. else
  143. pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
  144. altera_uart_update_ctrl_reg(pp);
  145. spin_unlock_irqrestore(&port->lock, flags);
  146. }
  147. static void altera_uart_set_termios(struct uart_port *port,
  148. struct ktermios *termios,
  149. struct ktermios *old)
  150. {
  151. unsigned long flags;
  152. unsigned int baud, baudclk;
  153. baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
  154. baudclk = port->uartclk / baud;
  155. if (old)
  156. tty_termios_copy_hw(termios, old);
  157. tty_termios_encode_baud_rate(termios, baud, baud);
  158. spin_lock_irqsave(&port->lock, flags);
  159. uart_update_timeout(port, termios->c_cflag, baud);
  160. altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
  161. spin_unlock_irqrestore(&port->lock, flags);
  162. /*
  163. * FIXME: port->read_status_mask and port->ignore_status_mask
  164. * need to be initialized based on termios settings for
  165. * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
  166. */
  167. }
  168. static void altera_uart_rx_chars(struct altera_uart *pp)
  169. {
  170. struct uart_port *port = &pp->port;
  171. unsigned char ch, flag;
  172. unsigned short status;
  173. while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
  174. ALTERA_UART_STATUS_RRDY_MSK) {
  175. ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
  176. flag = TTY_NORMAL;
  177. port->icount.rx++;
  178. if (status & ALTERA_UART_STATUS_E_MSK) {
  179. altera_uart_writel(port, status,
  180. ALTERA_UART_STATUS_REG);
  181. if (status & ALTERA_UART_STATUS_BRK_MSK) {
  182. port->icount.brk++;
  183. if (uart_handle_break(port))
  184. continue;
  185. } else if (status & ALTERA_UART_STATUS_PE_MSK) {
  186. port->icount.parity++;
  187. } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
  188. port->icount.overrun++;
  189. } else if (status & ALTERA_UART_STATUS_FE_MSK) {
  190. port->icount.frame++;
  191. }
  192. status &= port->read_status_mask;
  193. if (status & ALTERA_UART_STATUS_BRK_MSK)
  194. flag = TTY_BREAK;
  195. else if (status & ALTERA_UART_STATUS_PE_MSK)
  196. flag = TTY_PARITY;
  197. else if (status & ALTERA_UART_STATUS_FE_MSK)
  198. flag = TTY_FRAME;
  199. }
  200. if (uart_handle_sysrq_char(port, ch))
  201. continue;
  202. uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
  203. flag);
  204. }
  205. spin_unlock(&port->lock);
  206. tty_flip_buffer_push(&port->state->port);
  207. spin_lock(&port->lock);
  208. }
  209. static void altera_uart_tx_chars(struct altera_uart *pp)
  210. {
  211. struct uart_port *port = &pp->port;
  212. struct circ_buf *xmit = &port->state->xmit;
  213. if (port->x_char) {
  214. /* Send special char - probably flow control */
  215. altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
  216. port->x_char = 0;
  217. port->icount.tx++;
  218. return;
  219. }
  220. while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  221. ALTERA_UART_STATUS_TRDY_MSK) {
  222. if (xmit->head == xmit->tail)
  223. break;
  224. altera_uart_writel(port, xmit->buf[xmit->tail],
  225. ALTERA_UART_TXDATA_REG);
  226. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  227. port->icount.tx++;
  228. }
  229. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  230. uart_write_wakeup(port);
  231. if (xmit->head == xmit->tail) {
  232. pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
  233. altera_uart_update_ctrl_reg(pp);
  234. }
  235. }
  236. static irqreturn_t altera_uart_interrupt(int irq, void *data)
  237. {
  238. struct uart_port *port = data;
  239. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  240. unsigned int isr;
  241. isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
  242. spin_lock(&port->lock);
  243. if (isr & ALTERA_UART_STATUS_RRDY_MSK)
  244. altera_uart_rx_chars(pp);
  245. if (isr & ALTERA_UART_STATUS_TRDY_MSK)
  246. altera_uart_tx_chars(pp);
  247. spin_unlock(&port->lock);
  248. return IRQ_RETVAL(isr);
  249. }
  250. static void altera_uart_timer(struct timer_list *t)
  251. {
  252. struct altera_uart *pp = from_timer(pp, t, tmr);
  253. struct uart_port *port = &pp->port;
  254. altera_uart_interrupt(0, port);
  255. mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
  256. }
  257. static void altera_uart_config_port(struct uart_port *port, int flags)
  258. {
  259. port->type = PORT_ALTERA_UART;
  260. /* Clear mask, so no surprise interrupts. */
  261. altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
  262. /* Clear status register */
  263. altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
  264. }
  265. static int altera_uart_startup(struct uart_port *port)
  266. {
  267. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  268. unsigned long flags;
  269. if (!port->irq) {
  270. timer_setup(&pp->tmr, altera_uart_timer, 0);
  271. mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
  272. } else {
  273. int ret;
  274. ret = request_irq(port->irq, altera_uart_interrupt, 0,
  275. DRV_NAME, port);
  276. if (ret) {
  277. pr_err(DRV_NAME ": unable to attach Altera UART %d "
  278. "interrupt vector=%d\n", port->line, port->irq);
  279. return ret;
  280. }
  281. }
  282. spin_lock_irqsave(&port->lock, flags);
  283. /* Enable RX interrupts now */
  284. pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
  285. altera_uart_update_ctrl_reg(pp);
  286. spin_unlock_irqrestore(&port->lock, flags);
  287. return 0;
  288. }
  289. static void altera_uart_shutdown(struct uart_port *port)
  290. {
  291. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  292. unsigned long flags;
  293. spin_lock_irqsave(&port->lock, flags);
  294. /* Disable all interrupts now */
  295. pp->imr = 0;
  296. altera_uart_update_ctrl_reg(pp);
  297. spin_unlock_irqrestore(&port->lock, flags);
  298. if (port->irq)
  299. free_irq(port->irq, port);
  300. else
  301. del_timer_sync(&pp->tmr);
  302. }
  303. static const char *altera_uart_type(struct uart_port *port)
  304. {
  305. return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
  306. }
  307. static int altera_uart_request_port(struct uart_port *port)
  308. {
  309. /* UARTs always present */
  310. return 0;
  311. }
  312. static void altera_uart_release_port(struct uart_port *port)
  313. {
  314. /* Nothing to release... */
  315. }
  316. static int altera_uart_verify_port(struct uart_port *port,
  317. struct serial_struct *ser)
  318. {
  319. if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
  320. return -EINVAL;
  321. return 0;
  322. }
  323. #ifdef CONFIG_CONSOLE_POLL
  324. static int altera_uart_poll_get_char(struct uart_port *port)
  325. {
  326. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  327. ALTERA_UART_STATUS_RRDY_MSK))
  328. cpu_relax();
  329. return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
  330. }
  331. static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
  332. {
  333. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  334. ALTERA_UART_STATUS_TRDY_MSK))
  335. cpu_relax();
  336. altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
  337. }
  338. #endif
  339. /*
  340. * Define the basic serial functions we support.
  341. */
  342. static const struct uart_ops altera_uart_ops = {
  343. .tx_empty = altera_uart_tx_empty,
  344. .get_mctrl = altera_uart_get_mctrl,
  345. .set_mctrl = altera_uart_set_mctrl,
  346. .start_tx = altera_uart_start_tx,
  347. .stop_tx = altera_uart_stop_tx,
  348. .stop_rx = altera_uart_stop_rx,
  349. .break_ctl = altera_uart_break_ctl,
  350. .startup = altera_uart_startup,
  351. .shutdown = altera_uart_shutdown,
  352. .set_termios = altera_uart_set_termios,
  353. .type = altera_uart_type,
  354. .request_port = altera_uart_request_port,
  355. .release_port = altera_uart_release_port,
  356. .config_port = altera_uart_config_port,
  357. .verify_port = altera_uart_verify_port,
  358. #ifdef CONFIG_CONSOLE_POLL
  359. .poll_get_char = altera_uart_poll_get_char,
  360. .poll_put_char = altera_uart_poll_put_char,
  361. #endif
  362. };
  363. static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
  364. #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
  365. static void altera_uart_console_putc(struct uart_port *port, int c)
  366. {
  367. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  368. ALTERA_UART_STATUS_TRDY_MSK))
  369. cpu_relax();
  370. altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
  371. }
  372. static void altera_uart_console_write(struct console *co, const char *s,
  373. unsigned int count)
  374. {
  375. struct uart_port *port = &(altera_uart_ports + co->index)->port;
  376. uart_console_write(port, s, count, altera_uart_console_putc);
  377. }
  378. static int __init altera_uart_console_setup(struct console *co, char *options)
  379. {
  380. struct uart_port *port;
  381. int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
  382. int bits = 8;
  383. int parity = 'n';
  384. int flow = 'n';
  385. if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
  386. return -EINVAL;
  387. port = &altera_uart_ports[co->index].port;
  388. if (!port->membase)
  389. return -ENODEV;
  390. if (options)
  391. uart_parse_options(options, &baud, &parity, &bits, &flow);
  392. return uart_set_options(port, co, baud, parity, bits, flow);
  393. }
  394. static struct uart_driver altera_uart_driver;
  395. static struct console altera_uart_console = {
  396. .name = "ttyAL",
  397. .write = altera_uart_console_write,
  398. .device = uart_console_device,
  399. .setup = altera_uart_console_setup,
  400. .flags = CON_PRINTBUFFER,
  401. .index = -1,
  402. .data = &altera_uart_driver,
  403. };
  404. static int __init altera_uart_console_init(void)
  405. {
  406. register_console(&altera_uart_console);
  407. return 0;
  408. }
  409. console_initcall(altera_uart_console_init);
  410. #define ALTERA_UART_CONSOLE (&altera_uart_console)
  411. static void altera_uart_earlycon_write(struct console *co, const char *s,
  412. unsigned int count)
  413. {
  414. struct earlycon_device *dev = co->data;
  415. uart_console_write(&dev->port, s, count, altera_uart_console_putc);
  416. }
  417. static int __init altera_uart_earlycon_setup(struct earlycon_device *dev,
  418. const char *options)
  419. {
  420. struct uart_port *port = &dev->port;
  421. if (!port->membase)
  422. return -ENODEV;
  423. /* Enable RX interrupts now */
  424. altera_uart_writel(port, ALTERA_UART_CONTROL_RRDY_MSK,
  425. ALTERA_UART_CONTROL_REG);
  426. if (dev->baud) {
  427. unsigned int baudclk = port->uartclk / dev->baud;
  428. altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
  429. }
  430. dev->con->write = altera_uart_earlycon_write;
  431. return 0;
  432. }
  433. OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup);
  434. #else
  435. #define ALTERA_UART_CONSOLE NULL
  436. #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
  437. /*
  438. * Define the altera_uart UART driver structure.
  439. */
  440. static struct uart_driver altera_uart_driver = {
  441. .owner = THIS_MODULE,
  442. .driver_name = DRV_NAME,
  443. .dev_name = "ttyAL",
  444. .major = SERIAL_ALTERA_MAJOR,
  445. .minor = SERIAL_ALTERA_MINOR,
  446. .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
  447. .cons = ALTERA_UART_CONSOLE,
  448. };
  449. static int altera_uart_probe(struct platform_device *pdev)
  450. {
  451. struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
  452. struct uart_port *port;
  453. struct resource *res_mem;
  454. struct resource *res_irq;
  455. int i = pdev->id;
  456. int ret;
  457. /* if id is -1 scan for a free id and use that one */
  458. if (i == -1) {
  459. for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
  460. if (altera_uart_ports[i].port.mapbase == 0)
  461. break;
  462. }
  463. if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
  464. return -EINVAL;
  465. port = &altera_uart_ports[i].port;
  466. res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  467. if (res_mem)
  468. port->mapbase = res_mem->start;
  469. else if (platp)
  470. port->mapbase = platp->mapbase;
  471. else
  472. return -EINVAL;
  473. res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  474. if (res_irq)
  475. port->irq = res_irq->start;
  476. else if (platp)
  477. port->irq = platp->irq;
  478. /* Check platform data first so we can override device node data */
  479. if (platp)
  480. port->uartclk = platp->uartclk;
  481. else {
  482. ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
  483. &port->uartclk);
  484. if (ret)
  485. return ret;
  486. }
  487. port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
  488. if (!port->membase)
  489. return -ENOMEM;
  490. if (platp)
  491. port->regshift = platp->bus_shift;
  492. else
  493. port->regshift = 0;
  494. port->line = i;
  495. port->type = PORT_ALTERA_UART;
  496. port->iotype = SERIAL_IO_MEM;
  497. port->ops = &altera_uart_ops;
  498. port->flags = UPF_BOOT_AUTOCONF;
  499. port->dev = &pdev->dev;
  500. platform_set_drvdata(pdev, port);
  501. uart_add_one_port(&altera_uart_driver, port);
  502. return 0;
  503. }
  504. static int altera_uart_remove(struct platform_device *pdev)
  505. {
  506. struct uart_port *port = platform_get_drvdata(pdev);
  507. if (port) {
  508. uart_remove_one_port(&altera_uart_driver, port);
  509. port->mapbase = 0;
  510. iounmap(port->membase);
  511. }
  512. return 0;
  513. }
  514. #ifdef CONFIG_OF
  515. static const struct of_device_id altera_uart_match[] = {
  516. { .compatible = "ALTR,uart-1.0", },
  517. { .compatible = "altr,uart-1.0", },
  518. {},
  519. };
  520. MODULE_DEVICE_TABLE(of, altera_uart_match);
  521. #endif /* CONFIG_OF */
  522. static struct platform_driver altera_uart_platform_driver = {
  523. .probe = altera_uart_probe,
  524. .remove = altera_uart_remove,
  525. .driver = {
  526. .name = DRV_NAME,
  527. .of_match_table = of_match_ptr(altera_uart_match),
  528. },
  529. };
  530. static int __init altera_uart_init(void)
  531. {
  532. int rc;
  533. rc = uart_register_driver(&altera_uart_driver);
  534. if (rc)
  535. return rc;
  536. rc = platform_driver_register(&altera_uart_platform_driver);
  537. if (rc)
  538. uart_unregister_driver(&altera_uart_driver);
  539. return rc;
  540. }
  541. static void __exit altera_uart_exit(void)
  542. {
  543. platform_driver_unregister(&altera_uart_platform_driver);
  544. uart_unregister_driver(&altera_uart_driver);
  545. }
  546. module_init(altera_uart_init);
  547. module_exit(altera_uart_exit);
  548. MODULE_DESCRIPTION("Altera UART driver");
  549. MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
  550. MODULE_LICENSE("GPL");
  551. MODULE_ALIAS("platform:" DRV_NAME);
  552. MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);