8250_mtk.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Mediatek 8250 driver.
  4. *
  5. * Copyright (c) 2014 MundoReader S.L.
  6. * Author: Matthias Brugger <matthias.bgg@gmail.com>
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/io.h>
  10. #include <linux/module.h>
  11. #include <linux/of_irq.h>
  12. #include <linux/of_platform.h>
  13. #include <linux/pinctrl/consumer.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/serial_8250.h>
  17. #include <linux/serial_reg.h>
  18. #include <linux/console.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/tty.h>
  21. #include <linux/tty_flip.h>
  22. #include "8250.h"
  23. #define MTK_UART_HIGHS 0x09 /* Highspeed register */
  24. #define MTK_UART_SAMPLE_COUNT 0x0a /* Sample count register */
  25. #define MTK_UART_SAMPLE_POINT 0x0b /* Sample point register */
  26. #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
  27. #define MTK_UART_ESCAPE_DAT 0x10 /* Escape Character register */
  28. #define MTK_UART_ESCAPE_EN 0x11 /* Escape Enable register */
  29. #define MTK_UART_DMA_EN 0x13 /* DMA Enable register */
  30. #define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */
  31. #define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */
  32. #define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */
  33. #define MTK_UART_IER_XOFFI 0x20 /* Enable XOFF character interrupt */
  34. #define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */
  35. #define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */
  36. #define MTK_UART_EFR_EN 0x10 /* Enable enhancement feature */
  37. #define MTK_UART_EFR_RTS 0x40 /* Enable hardware rx flow control */
  38. #define MTK_UART_EFR_CTS 0x80 /* Enable hardware tx flow control */
  39. #define MTK_UART_EFR_NO_SW_FC 0x0 /* no sw flow control */
  40. #define MTK_UART_EFR_XON1_XOFF1 0xa /* XON1/XOFF1 as sw flow control */
  41. #define MTK_UART_EFR_XON2_XOFF2 0x5 /* XON2/XOFF2 as sw flow control */
  42. #define MTK_UART_EFR_SW_FC_MASK 0xf /* Enable CTS Modem status interrupt */
  43. #define MTK_UART_EFR_HW_FC (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS)
  44. #define MTK_UART_DMA_EN_TX 0x2
  45. #define MTK_UART_DMA_EN_RX 0x5
  46. #define MTK_UART_ESCAPE_CHAR 0x77 /* Escape char added under sw fc */
  47. #define MTK_UART_RX_SIZE 0x8000
  48. #define MTK_UART_TX_TRIGGER 1
  49. #define MTK_UART_RX_TRIGGER MTK_UART_RX_SIZE
  50. #ifdef CONFIG_SERIAL_8250_DMA
  51. enum dma_rx_status {
  52. DMA_RX_START = 0,
  53. DMA_RX_RUNNING = 1,
  54. DMA_RX_SHUTDOWN = 2,
  55. };
  56. #endif
  57. struct mtk8250_data {
  58. int line;
  59. unsigned int rx_pos;
  60. unsigned int clk_count;
  61. struct clk *uart_clk;
  62. struct clk *bus_clk;
  63. struct uart_8250_dma *dma;
  64. #ifdef CONFIG_SERIAL_8250_DMA
  65. enum dma_rx_status rx_status;
  66. #endif
  67. int rx_wakeup_irq;
  68. };
  69. /* flow control mode */
  70. enum {
  71. MTK_UART_FC_NONE,
  72. MTK_UART_FC_SW,
  73. MTK_UART_FC_HW,
  74. };
  75. #ifdef CONFIG_SERIAL_8250_DMA
  76. static void mtk8250_rx_dma(struct uart_8250_port *up);
  77. static void mtk8250_dma_rx_complete(void *param)
  78. {
  79. struct uart_8250_port *up = param;
  80. struct uart_8250_dma *dma = up->dma;
  81. struct mtk8250_data *data = up->port.private_data;
  82. struct tty_port *tty_port = &up->port.state->port;
  83. struct dma_tx_state state;
  84. int copied, total, cnt;
  85. unsigned char *ptr;
  86. unsigned long flags;
  87. if (data->rx_status == DMA_RX_SHUTDOWN)
  88. return;
  89. spin_lock_irqsave(&up->port.lock, flags);
  90. dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
  91. total = dma->rx_size - state.residue;
  92. cnt = total;
  93. if ((data->rx_pos + cnt) > dma->rx_size)
  94. cnt = dma->rx_size - data->rx_pos;
  95. ptr = (unsigned char *)(data->rx_pos + dma->rx_buf);
  96. copied = tty_insert_flip_string(tty_port, ptr, cnt);
  97. data->rx_pos += cnt;
  98. if (total > cnt) {
  99. ptr = (unsigned char *)(dma->rx_buf);
  100. cnt = total - cnt;
  101. copied += tty_insert_flip_string(tty_port, ptr, cnt);
  102. data->rx_pos = cnt;
  103. }
  104. up->port.icount.rx += copied;
  105. tty_flip_buffer_push(tty_port);
  106. mtk8250_rx_dma(up);
  107. spin_unlock_irqrestore(&up->port.lock, flags);
  108. }
  109. static void mtk8250_rx_dma(struct uart_8250_port *up)
  110. {
  111. struct uart_8250_dma *dma = up->dma;
  112. struct dma_async_tx_descriptor *desc;
  113. desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
  114. dma->rx_size, DMA_DEV_TO_MEM,
  115. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  116. if (!desc) {
  117. pr_err("failed to prepare rx slave single\n");
  118. return;
  119. }
  120. desc->callback = mtk8250_dma_rx_complete;
  121. desc->callback_param = up;
  122. dma->rx_cookie = dmaengine_submit(desc);
  123. dma_async_issue_pending(dma->rxchan);
  124. }
  125. static void mtk8250_dma_enable(struct uart_8250_port *up)
  126. {
  127. struct uart_8250_dma *dma = up->dma;
  128. struct mtk8250_data *data = up->port.private_data;
  129. int lcr = serial_in(up, UART_LCR);
  130. if (data->rx_status != DMA_RX_START)
  131. return;
  132. dma->rxconf.src_port_window_size = dma->rx_size;
  133. dma->rxconf.src_addr = dma->rx_addr;
  134. dma->txconf.dst_port_window_size = UART_XMIT_SIZE;
  135. dma->txconf.dst_addr = dma->tx_addr;
  136. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
  137. UART_FCR_CLEAR_XMIT);
  138. serial_out(up, MTK_UART_DMA_EN,
  139. MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX);
  140. serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
  141. serial_out(up, UART_EFR, UART_EFR_ECB);
  142. serial_out(up, UART_LCR, lcr);
  143. if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0)
  144. pr_err("failed to configure rx dma channel\n");
  145. if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0)
  146. pr_err("failed to configure tx dma channel\n");
  147. data->rx_status = DMA_RX_RUNNING;
  148. data->rx_pos = 0;
  149. mtk8250_rx_dma(up);
  150. }
  151. #endif
  152. static int mtk8250_startup(struct uart_port *port)
  153. {
  154. #ifdef CONFIG_SERIAL_8250_DMA
  155. struct uart_8250_port *up = up_to_u8250p(port);
  156. struct mtk8250_data *data = port->private_data;
  157. /* disable DMA for console */
  158. if (uart_console(port))
  159. up->dma = NULL;
  160. if (up->dma) {
  161. data->rx_status = DMA_RX_START;
  162. uart_circ_clear(&port->state->xmit);
  163. }
  164. #endif
  165. memset(&port->icount, 0, sizeof(port->icount));
  166. return serial8250_do_startup(port);
  167. }
  168. static void mtk8250_shutdown(struct uart_port *port)
  169. {
  170. #ifdef CONFIG_SERIAL_8250_DMA
  171. struct uart_8250_port *up = up_to_u8250p(port);
  172. struct mtk8250_data *data = port->private_data;
  173. if (up->dma)
  174. data->rx_status = DMA_RX_SHUTDOWN;
  175. #endif
  176. return serial8250_do_shutdown(port);
  177. }
  178. static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask)
  179. {
  180. serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask));
  181. }
  182. static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask)
  183. {
  184. serial_out(up, UART_IER, serial_in(up, UART_IER) | mask);
  185. }
  186. static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)
  187. {
  188. struct uart_port *port = &up->port;
  189. int lcr = serial_in(up, UART_LCR);
  190. serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
  191. serial_out(up, UART_EFR, UART_EFR_ECB);
  192. serial_out(up, UART_LCR, lcr);
  193. lcr = serial_in(up, UART_LCR);
  194. switch (mode) {
  195. case MTK_UART_FC_NONE:
  196. serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
  197. serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
  198. serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
  199. serial_out(up, UART_EFR, serial_in(up, UART_EFR) &
  200. (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)));
  201. serial_out(up, UART_LCR, lcr);
  202. mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI |
  203. MTK_UART_IER_RTSI | MTK_UART_IER_CTSI);
  204. break;
  205. case MTK_UART_FC_HW:
  206. serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
  207. serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
  208. serial_out(up, UART_MCR, UART_MCR_RTS);
  209. serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
  210. /*enable hw flow control*/
  211. serial_out(up, UART_EFR, MTK_UART_EFR_HW_FC |
  212. (serial_in(up, UART_EFR) &
  213. (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
  214. serial_out(up, UART_LCR, lcr);
  215. mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI);
  216. mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI);
  217. break;
  218. case MTK_UART_FC_SW: /*MTK software flow control */
  219. serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
  220. serial_out(up, MTK_UART_ESCAPE_EN, 0x01);
  221. serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
  222. /*enable sw flow control */
  223. serial_out(up, UART_EFR, MTK_UART_EFR_XON1_XOFF1 |
  224. (serial_in(up, UART_EFR) &
  225. (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
  226. serial_out(up, UART_XON1, START_CHAR(port->state->port.tty));
  227. serial_out(up, UART_XOFF1, STOP_CHAR(port->state->port.tty));
  228. serial_out(up, UART_LCR, lcr);
  229. mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI);
  230. mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI);
  231. break;
  232. default:
  233. break;
  234. }
  235. }
  236. static void
  237. mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
  238. struct ktermios *old)
  239. {
  240. unsigned short fraction_L_mapping[] = {
  241. 0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF
  242. };
  243. unsigned short fraction_M_mapping[] = {
  244. 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3
  245. };
  246. struct uart_8250_port *up = up_to_u8250p(port);
  247. unsigned int baud, quot, fraction;
  248. unsigned long flags;
  249. int mode;
  250. #ifdef CONFIG_SERIAL_8250_DMA
  251. if (up->dma) {
  252. if (uart_console(port)) {
  253. devm_kfree(up->port.dev, up->dma);
  254. up->dma = NULL;
  255. } else {
  256. mtk8250_dma_enable(up);
  257. }
  258. }
  259. #endif
  260. /*
  261. * Store the requested baud rate before calling the generic 8250
  262. * set_termios method. Standard 8250 port expects bauds to be
  263. * no higher than (uartclk / 16) so the baud will be clamped if it
  264. * gets out of that bound. Mediatek 8250 port supports speed
  265. * higher than that, therefore we'll get original baud rate back
  266. * after calling the generic set_termios method and recalculate
  267. * the speed later in this method.
  268. */
  269. baud = tty_termios_baud_rate(termios);
  270. serial8250_do_set_termios(port, termios, NULL);
  271. tty_termios_encode_baud_rate(termios, baud, baud);
  272. /*
  273. * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS)
  274. *
  275. * We need to recalcualte the quot register, as the claculation depends
  276. * on the vaule in the highspeed register.
  277. *
  278. * Some baudrates are not supported by the chip, so we use the next
  279. * lower rate supported and update termios c_flag.
  280. *
  281. * If highspeed register is set to 3, we need to specify sample count
  282. * and sample point to increase accuracy. If not, we reset the
  283. * registers to their default values.
  284. */
  285. baud = uart_get_baud_rate(port, termios, old,
  286. port->uartclk / 16 / UART_DIV_MAX,
  287. port->uartclk);
  288. if (baud < 115200) {
  289. serial_port_out(port, MTK_UART_HIGHS, 0x0);
  290. quot = uart_get_divisor(port, baud);
  291. } else {
  292. serial_port_out(port, MTK_UART_HIGHS, 0x3);
  293. quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
  294. }
  295. /*
  296. * Ok, we're now changing the port state. Do it with
  297. * interrupts disabled.
  298. */
  299. spin_lock_irqsave(&port->lock, flags);
  300. /*
  301. * Update the per-port timeout.
  302. */
  303. uart_update_timeout(port, termios->c_cflag, baud);
  304. /* set DLAB we have cval saved in up->lcr from the call to the core */
  305. serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
  306. serial_dl_write(up, quot);
  307. /* reset DLAB */
  308. serial_port_out(port, UART_LCR, up->lcr);
  309. if (baud >= 115200) {
  310. unsigned int tmp;
  311. tmp = (port->uartclk / (baud * quot)) - 1;
  312. serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp);
  313. serial_port_out(port, MTK_UART_SAMPLE_POINT,
  314. (tmp >> 1) - 1);
  315. /*count fraction to set fractoin register */
  316. fraction = ((port->uartclk * 100) / baud / quot) % 100;
  317. fraction = DIV_ROUND_CLOSEST(fraction, 10);
  318. serial_port_out(port, MTK_UART_FRACDIV_L,
  319. fraction_L_mapping[fraction]);
  320. serial_port_out(port, MTK_UART_FRACDIV_M,
  321. fraction_M_mapping[fraction]);
  322. } else {
  323. serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00);
  324. serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff);
  325. serial_port_out(port, MTK_UART_FRACDIV_L, 0x00);
  326. serial_port_out(port, MTK_UART_FRACDIV_M, 0x00);
  327. }
  328. if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS)))
  329. mode = MTK_UART_FC_HW;
  330. else if (termios->c_iflag & CRTSCTS)
  331. mode = MTK_UART_FC_SW;
  332. else
  333. mode = MTK_UART_FC_NONE;
  334. mtk8250_set_flow_ctrl(up, mode);
  335. if (uart_console(port))
  336. up->port.cons->cflag = termios->c_cflag;
  337. spin_unlock_irqrestore(&port->lock, flags);
  338. /* Don't rewrite B0 */
  339. if (tty_termios_baud_rate(termios))
  340. tty_termios_encode_baud_rate(termios, baud, baud);
  341. }
  342. static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
  343. {
  344. struct mtk8250_data *data = dev_get_drvdata(dev);
  345. clk_disable_unprepare(data->uart_clk);
  346. clk_disable_unprepare(data->bus_clk);
  347. return 0;
  348. }
  349. static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
  350. {
  351. struct mtk8250_data *data = dev_get_drvdata(dev);
  352. int err;
  353. err = clk_prepare_enable(data->uart_clk);
  354. if (err) {
  355. dev_warn(dev, "Can't enable clock\n");
  356. return err;
  357. }
  358. err = clk_prepare_enable(data->bus_clk);
  359. if (err) {
  360. dev_warn(dev, "Can't enable bus clock\n");
  361. return err;
  362. }
  363. return 0;
  364. }
  365. static void
  366. mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
  367. {
  368. if (!state)
  369. pm_runtime_get_sync(port->dev);
  370. serial8250_do_pm(port, state, old);
  371. if (state)
  372. pm_runtime_put_sync_suspend(port->dev);
  373. }
  374. #ifdef CONFIG_SERIAL_8250_DMA
  375. static bool mtk8250_dma_filter(struct dma_chan *chan, void *param)
  376. {
  377. return false;
  378. }
  379. #endif
  380. static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
  381. struct mtk8250_data *data)
  382. {
  383. #ifdef CONFIG_SERIAL_8250_DMA
  384. int dmacnt;
  385. #endif
  386. data->uart_clk = devm_clk_get(&pdev->dev, "baud");
  387. if (IS_ERR(data->uart_clk)) {
  388. /*
  389. * For compatibility with older device trees try unnamed
  390. * clk when no baud clk can be found.
  391. */
  392. data->uart_clk = devm_clk_get(&pdev->dev, NULL);
  393. if (IS_ERR(data->uart_clk)) {
  394. dev_warn(&pdev->dev, "Can't get uart clock\n");
  395. return PTR_ERR(data->uart_clk);
  396. }
  397. return 0;
  398. }
  399. data->bus_clk = devm_clk_get(&pdev->dev, "bus");
  400. if (IS_ERR(data->bus_clk))
  401. return PTR_ERR(data->bus_clk);
  402. data->dma = NULL;
  403. #ifdef CONFIG_SERIAL_8250_DMA
  404. dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names");
  405. if (dmacnt == 2) {
  406. data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma),
  407. GFP_KERNEL);
  408. if (!data->dma)
  409. return -ENOMEM;
  410. data->dma->fn = mtk8250_dma_filter;
  411. data->dma->rx_size = MTK_UART_RX_SIZE;
  412. data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER;
  413. data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER;
  414. }
  415. #endif
  416. return 0;
  417. }
  418. static int mtk8250_probe(struct platform_device *pdev)
  419. {
  420. struct uart_8250_port uart = {};
  421. struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  422. struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  423. struct mtk8250_data *data;
  424. int err;
  425. if (!regs || !irq) {
  426. dev_err(&pdev->dev, "no registers/irq defined\n");
  427. return -EINVAL;
  428. }
  429. uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
  430. resource_size(regs));
  431. if (!uart.port.membase)
  432. return -ENOMEM;
  433. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  434. if (!data)
  435. return -ENOMEM;
  436. if (pdev->dev.of_node) {
  437. err = mtk8250_probe_of(pdev, &uart.port, data);
  438. if (err)
  439. return err;
  440. } else
  441. return -ENODEV;
  442. spin_lock_init(&uart.port.lock);
  443. uart.port.mapbase = regs->start;
  444. uart.port.irq = irq->start;
  445. uart.port.pm = mtk8250_do_pm;
  446. uart.port.type = PORT_16550;
  447. uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
  448. uart.port.dev = &pdev->dev;
  449. uart.port.iotype = UPIO_MEM32;
  450. uart.port.regshift = 2;
  451. uart.port.private_data = data;
  452. uart.port.shutdown = mtk8250_shutdown;
  453. uart.port.startup = mtk8250_startup;
  454. uart.port.set_termios = mtk8250_set_termios;
  455. uart.port.uartclk = clk_get_rate(data->uart_clk);
  456. #ifdef CONFIG_SERIAL_8250_DMA
  457. if (data->dma)
  458. uart.dma = data->dma;
  459. #endif
  460. /* Disable Rate Fix function */
  461. writel(0x0, uart.port.membase +
  462. (MTK_UART_RATE_FIX << uart.port.regshift));
  463. platform_set_drvdata(pdev, data);
  464. err = mtk8250_runtime_resume(&pdev->dev);
  465. if (err)
  466. return err;
  467. data->line = serial8250_register_8250_port(&uart);
  468. if (data->line < 0)
  469. return data->line;
  470. pm_runtime_set_active(&pdev->dev);
  471. pm_runtime_enable(&pdev->dev);
  472. data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1);
  473. return 0;
  474. }
  475. static int mtk8250_remove(struct platform_device *pdev)
  476. {
  477. struct mtk8250_data *data = platform_get_drvdata(pdev);
  478. pm_runtime_get_sync(&pdev->dev);
  479. serial8250_unregister_port(data->line);
  480. mtk8250_runtime_suspend(&pdev->dev);
  481. pm_runtime_disable(&pdev->dev);
  482. pm_runtime_put_noidle(&pdev->dev);
  483. return 0;
  484. }
  485. static int __maybe_unused mtk8250_suspend(struct device *dev)
  486. {
  487. struct mtk8250_data *data = dev_get_drvdata(dev);
  488. int irq = data->rx_wakeup_irq;
  489. int err;
  490. serial8250_suspend_port(data->line);
  491. pinctrl_pm_select_sleep_state(dev);
  492. if (irq >= 0) {
  493. err = enable_irq_wake(irq);
  494. if (err) {
  495. dev_err(dev,
  496. "failed to enable irq wake on IRQ %d: %d\n",
  497. irq, err);
  498. pinctrl_pm_select_default_state(dev);
  499. serial8250_resume_port(data->line);
  500. return err;
  501. }
  502. }
  503. return 0;
  504. }
  505. static int __maybe_unused mtk8250_resume(struct device *dev)
  506. {
  507. struct mtk8250_data *data = dev_get_drvdata(dev);
  508. int irq = data->rx_wakeup_irq;
  509. if (irq >= 0)
  510. disable_irq_wake(irq);
  511. pinctrl_pm_select_default_state(dev);
  512. serial8250_resume_port(data->line);
  513. return 0;
  514. }
  515. static const struct dev_pm_ops mtk8250_pm_ops = {
  516. SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
  517. SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
  518. NULL)
  519. };
  520. static const struct of_device_id mtk8250_of_match[] = {
  521. { .compatible = "mediatek,mt6577-uart" },
  522. { /* Sentinel */ }
  523. };
  524. MODULE_DEVICE_TABLE(of, mtk8250_of_match);
  525. static struct platform_driver mtk8250_platform_driver = {
  526. .driver = {
  527. .name = "mt6577-uart",
  528. .pm = &mtk8250_pm_ops,
  529. .of_match_table = mtk8250_of_match,
  530. },
  531. .probe = mtk8250_probe,
  532. .remove = mtk8250_remove,
  533. };
  534. module_platform_driver(mtk8250_platform_driver);
  535. #ifdef CONFIG_SERIAL_8250_CONSOLE
  536. static int __init early_mtk8250_setup(struct earlycon_device *device,
  537. const char *options)
  538. {
  539. if (!device->port.membase)
  540. return -ENODEV;
  541. device->port.iotype = UPIO_MEM32;
  542. return early_serial8250_setup(device, NULL);
  543. }
  544. OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
  545. #endif
  546. MODULE_AUTHOR("Matthias Brugger");
  547. MODULE_LICENSE("GPL");
  548. MODULE_DESCRIPTION("Mediatek 8250 serial port driver");