8250.h 8.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Driver for 8250/16550-type serial ports
  4. *
  5. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  6. *
  7. * Copyright (C) 2001 Russell King.
  8. */
  9. #include <linux/serial_8250.h>
  10. #include <linux/serial_reg.h>
  11. #include <linux/dmaengine.h>
  12. #include "../serial_mctrl_gpio.h"
  13. struct uart_8250_dma {
  14. int (*tx_dma)(struct uart_8250_port *p);
  15. int (*rx_dma)(struct uart_8250_port *p);
  16. /* Filter function */
  17. dma_filter_fn fn;
  18. /* Parameter to the filter function */
  19. void *rx_param;
  20. void *tx_param;
  21. struct dma_slave_config rxconf;
  22. struct dma_slave_config txconf;
  23. struct dma_chan *rxchan;
  24. struct dma_chan *txchan;
  25. /* Device address base for DMA operations */
  26. phys_addr_t rx_dma_addr;
  27. phys_addr_t tx_dma_addr;
  28. /* DMA address of the buffer in memory */
  29. dma_addr_t rx_addr;
  30. dma_addr_t tx_addr;
  31. dma_cookie_t rx_cookie;
  32. dma_cookie_t tx_cookie;
  33. void *rx_buf;
  34. size_t rx_size;
  35. size_t tx_size;
  36. unsigned char tx_running;
  37. unsigned char tx_err;
  38. unsigned char rx_running;
  39. };
  40. struct old_serial_port {
  41. unsigned int uart;
  42. unsigned int baud_base;
  43. unsigned int port;
  44. unsigned int irq;
  45. upf_t flags;
  46. unsigned char io_type;
  47. unsigned char __iomem *iomem_base;
  48. unsigned short iomem_reg_shift;
  49. };
  50. struct serial8250_config {
  51. const char *name;
  52. unsigned short fifo_size;
  53. unsigned short tx_loadsz;
  54. unsigned char fcr;
  55. unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
  56. unsigned int flags;
  57. };
  58. #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
  59. #define UART_CAP_EFR (1 << 9) /* UART has EFR */
  60. #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
  61. #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
  62. #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
  63. #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
  64. #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
  65. #define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
  66. #define UART_CAP_IRDA (1 << 16) /* UART supports IrDA line discipline */
  67. #define UART_CAP_MINI (1 << 17) /* Mini UART on BCM283X family lacks:
  68. * STOP PARITY EPAR SPAR WLEN5 WLEN6
  69. */
  70. #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
  71. #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
  72. #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
  73. #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
  74. #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
  75. #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
  76. #define SERIAL8250_SHARE_IRQS 1
  77. #else
  78. #define SERIAL8250_SHARE_IRQS 0
  79. #endif
  80. #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
  81. { \
  82. .iobase = _base, \
  83. .irq = _irq, \
  84. .uartclk = 1843200, \
  85. .iotype = UPIO_PORT, \
  86. .flags = UPF_BOOT_AUTOCONF | (_flags), \
  87. }
  88. #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
  89. static inline int serial_in(struct uart_8250_port *up, int offset)
  90. {
  91. return up->port.serial_in(&up->port, offset);
  92. }
  93. static inline void serial_out(struct uart_8250_port *up, int offset, int value)
  94. {
  95. up->port.serial_out(&up->port, offset, value);
  96. }
  97. void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
  98. static inline int serial_dl_read(struct uart_8250_port *up)
  99. {
  100. return up->dl_read(up);
  101. }
  102. static inline void serial_dl_write(struct uart_8250_port *up, int value)
  103. {
  104. up->dl_write(up, value);
  105. }
  106. static inline bool serial8250_set_THRI(struct uart_8250_port *up)
  107. {
  108. if (up->ier & UART_IER_THRI)
  109. return false;
  110. up->ier |= UART_IER_THRI;
  111. serial_out(up, UART_IER, up->ier);
  112. return true;
  113. }
  114. static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
  115. {
  116. if (!(up->ier & UART_IER_THRI))
  117. return false;
  118. up->ier &= ~UART_IER_THRI;
  119. serial_out(up, UART_IER, up->ier);
  120. return true;
  121. }
  122. struct uart_8250_port *serial8250_get_port(int line);
  123. void serial8250_rpm_get(struct uart_8250_port *p);
  124. void serial8250_rpm_put(struct uart_8250_port *p);
  125. void serial8250_rpm_get_tx(struct uart_8250_port *p);
  126. void serial8250_rpm_put_tx(struct uart_8250_port *p);
  127. int serial8250_em485_init(struct uart_8250_port *p);
  128. void serial8250_em485_destroy(struct uart_8250_port *p);
  129. /* MCR <-> TIOCM conversion */
  130. static inline int serial8250_TIOCM_to_MCR(int tiocm)
  131. {
  132. int mcr = 0;
  133. if (tiocm & TIOCM_RTS)
  134. mcr |= UART_MCR_RTS;
  135. if (tiocm & TIOCM_DTR)
  136. mcr |= UART_MCR_DTR;
  137. if (tiocm & TIOCM_OUT1)
  138. mcr |= UART_MCR_OUT1;
  139. if (tiocm & TIOCM_OUT2)
  140. mcr |= UART_MCR_OUT2;
  141. if (tiocm & TIOCM_LOOP)
  142. mcr |= UART_MCR_LOOP;
  143. return mcr;
  144. }
  145. static inline int serial8250_MCR_to_TIOCM(int mcr)
  146. {
  147. int tiocm = 0;
  148. if (mcr & UART_MCR_RTS)
  149. tiocm |= TIOCM_RTS;
  150. if (mcr & UART_MCR_DTR)
  151. tiocm |= TIOCM_DTR;
  152. if (mcr & UART_MCR_OUT1)
  153. tiocm |= TIOCM_OUT1;
  154. if (mcr & UART_MCR_OUT2)
  155. tiocm |= TIOCM_OUT2;
  156. if (mcr & UART_MCR_LOOP)
  157. tiocm |= TIOCM_LOOP;
  158. return tiocm;
  159. }
  160. /* MSR <-> TIOCM conversion */
  161. static inline int serial8250_MSR_to_TIOCM(int msr)
  162. {
  163. int tiocm = 0;
  164. if (msr & UART_MSR_DCD)
  165. tiocm |= TIOCM_CAR;
  166. if (msr & UART_MSR_RI)
  167. tiocm |= TIOCM_RNG;
  168. if (msr & UART_MSR_DSR)
  169. tiocm |= TIOCM_DSR;
  170. if (msr & UART_MSR_CTS)
  171. tiocm |= TIOCM_CTS;
  172. return tiocm;
  173. }
  174. static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
  175. {
  176. serial_out(up, UART_MCR, value);
  177. if (up->gpios)
  178. mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
  179. }
  180. static inline int serial8250_in_MCR(struct uart_8250_port *up)
  181. {
  182. int mctrl;
  183. mctrl = serial_in(up, UART_MCR);
  184. if (up->gpios) {
  185. unsigned int mctrl_gpio = 0;
  186. mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
  187. mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
  188. }
  189. return mctrl;
  190. }
  191. #if defined(__alpha__) && !defined(CONFIG_PCI)
  192. /*
  193. * Digital did something really horribly wrong with the OUT1 and OUT2
  194. * lines on at least some ALPHA's. The failure mode is that if either
  195. * is cleared, the machine locks up with endless interrupts.
  196. */
  197. #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
  198. #else
  199. #define ALPHA_KLUDGE_MCR 0
  200. #endif
  201. #ifdef CONFIG_SERIAL_8250_PNP
  202. int serial8250_pnp_init(void);
  203. void serial8250_pnp_exit(void);
  204. #else
  205. static inline int serial8250_pnp_init(void) { return 0; }
  206. static inline void serial8250_pnp_exit(void) { }
  207. #endif
  208. #ifdef CONFIG_SERIAL_8250_FINTEK
  209. int fintek_8250_probe(struct uart_8250_port *uart);
  210. #else
  211. static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
  212. #endif
  213. #ifdef CONFIG_ARCH_OMAP1
  214. static inline int is_omap1_8250(struct uart_8250_port *pt)
  215. {
  216. int res;
  217. switch (pt->port.mapbase) {
  218. case OMAP1_UART1_BASE:
  219. case OMAP1_UART2_BASE:
  220. case OMAP1_UART3_BASE:
  221. res = 1;
  222. break;
  223. default:
  224. res = 0;
  225. break;
  226. }
  227. return res;
  228. }
  229. static inline int is_omap1510_8250(struct uart_8250_port *pt)
  230. {
  231. if (!cpu_is_omap1510())
  232. return 0;
  233. return is_omap1_8250(pt);
  234. }
  235. #else
  236. static inline int is_omap1_8250(struct uart_8250_port *pt)
  237. {
  238. return 0;
  239. }
  240. static inline int is_omap1510_8250(struct uart_8250_port *pt)
  241. {
  242. return 0;
  243. }
  244. #endif
  245. #ifdef CONFIG_SERIAL_8250_DMA
  246. extern int serial8250_tx_dma(struct uart_8250_port *);
  247. extern int serial8250_rx_dma(struct uart_8250_port *);
  248. extern void serial8250_rx_dma_flush(struct uart_8250_port *);
  249. extern int serial8250_request_dma(struct uart_8250_port *);
  250. extern void serial8250_release_dma(struct uart_8250_port *);
  251. #else
  252. static inline int serial8250_tx_dma(struct uart_8250_port *p)
  253. {
  254. return -1;
  255. }
  256. static inline int serial8250_rx_dma(struct uart_8250_port *p)
  257. {
  258. return -1;
  259. }
  260. static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
  261. static inline int serial8250_request_dma(struct uart_8250_port *p)
  262. {
  263. return -1;
  264. }
  265. static inline void serial8250_release_dma(struct uart_8250_port *p) { }
  266. #endif
  267. static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
  268. {
  269. unsigned char status;
  270. status = serial_in(up, 0x04); /* EXCR2 */
  271. #define PRESL(x) ((x) & 0x30)
  272. if (PRESL(status) == 0x10) {
  273. /* already in high speed mode */
  274. return 0;
  275. } else {
  276. status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
  277. status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
  278. serial_out(up, 0x04, status);
  279. }
  280. return 1;
  281. }
  282. static inline int serial_index(struct uart_port *port)
  283. {
  284. return port->minor - 64;
  285. }