stm32_rproc.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
  4. * Authors: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
  5. * Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
  6. */
  7. #include <linux/arm-smccc.h>
  8. #include <linux/dma-mapping.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/io.h>
  11. #include <linux/mailbox_client.h>
  12. #include <linux/mfd/syscon.h>
  13. #include <linux/module.h>
  14. #include <linux/of_address.h>
  15. #include <linux/of_device.h>
  16. #include <linux/of_reserved_mem.h>
  17. #include <linux/regmap.h>
  18. #include <linux/remoteproc.h>
  19. #include <linux/reset.h>
  20. #include "remoteproc_internal.h"
  21. #define HOLD_BOOT 0
  22. #define RELEASE_BOOT 1
  23. #define MBOX_NB_VQ 2
  24. #define MBOX_NB_MBX 3
  25. #define STM32_SMC_RCC 0x82001000
  26. #define STM32_SMC_REG_WRITE 0x1
  27. #define STM32_MBX_VQ0 "vq0"
  28. #define STM32_MBX_VQ1 "vq1"
  29. #define STM32_MBX_SHUTDOWN "shutdown"
  30. struct stm32_syscon {
  31. struct regmap *map;
  32. u32 reg;
  33. u32 mask;
  34. };
  35. struct stm32_rproc_mem {
  36. char name[20];
  37. void __iomem *cpu_addr;
  38. phys_addr_t bus_addr;
  39. u32 dev_addr;
  40. size_t size;
  41. };
  42. struct stm32_rproc_mem_ranges {
  43. u32 dev_addr;
  44. u32 bus_addr;
  45. u32 size;
  46. };
  47. struct stm32_mbox {
  48. const unsigned char name[10];
  49. struct mbox_chan *chan;
  50. struct mbox_client client;
  51. int vq_id;
  52. };
  53. struct stm32_rproc {
  54. struct reset_control *rst;
  55. struct stm32_syscon hold_boot;
  56. struct stm32_syscon pdds;
  57. u32 nb_rmems;
  58. struct stm32_rproc_mem *rmems;
  59. struct stm32_mbox mb[MBOX_NB_MBX];
  60. bool secured_soc;
  61. };
  62. static int stm32_rproc_pa_to_da(struct rproc *rproc, phys_addr_t pa, u64 *da)
  63. {
  64. unsigned int i;
  65. struct stm32_rproc *ddata = rproc->priv;
  66. struct stm32_rproc_mem *p_mem;
  67. for (i = 0; i < ddata->nb_rmems; i++) {
  68. p_mem = &ddata->rmems[i];
  69. if (pa < p_mem->bus_addr ||
  70. pa >= p_mem->bus_addr + p_mem->size)
  71. continue;
  72. *da = pa - p_mem->bus_addr + p_mem->dev_addr;
  73. dev_dbg(rproc->dev.parent, "pa %pa to da %llx\n", &pa, *da);
  74. return 0;
  75. }
  76. return -EINVAL;
  77. }
  78. static int stm32_rproc_mem_alloc(struct rproc *rproc,
  79. struct rproc_mem_entry *mem)
  80. {
  81. struct device *dev = rproc->dev.parent;
  82. void *va;
  83. dev_dbg(dev, "map memory: %pa+%x\n", &mem->dma, mem->len);
  84. va = ioremap_wc(mem->dma, mem->len);
  85. if (IS_ERR_OR_NULL(va)) {
  86. dev_err(dev, "Unable to map memory region: %pa+%x\n",
  87. &mem->dma, mem->len);
  88. return -ENOMEM;
  89. }
  90. /* Update memory entry va */
  91. mem->va = va;
  92. return 0;
  93. }
  94. static int stm32_rproc_mem_release(struct rproc *rproc,
  95. struct rproc_mem_entry *mem)
  96. {
  97. dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma);
  98. iounmap(mem->va);
  99. return 0;
  100. }
  101. static int stm32_rproc_of_memory_translations(struct rproc *rproc)
  102. {
  103. struct device *parent, *dev = rproc->dev.parent;
  104. struct stm32_rproc *ddata = rproc->priv;
  105. struct device_node *np;
  106. struct stm32_rproc_mem *p_mems;
  107. struct stm32_rproc_mem_ranges *mem_range;
  108. int cnt, array_size, i, ret = 0;
  109. parent = dev->parent;
  110. np = parent->of_node;
  111. cnt = of_property_count_elems_of_size(np, "dma-ranges",
  112. sizeof(*mem_range));
  113. if (cnt <= 0) {
  114. dev_err(dev, "%s: dma-ranges property not defined\n", __func__);
  115. return -EINVAL;
  116. }
  117. p_mems = devm_kcalloc(dev, cnt, sizeof(*p_mems), GFP_KERNEL);
  118. if (!p_mems)
  119. return -ENOMEM;
  120. mem_range = kcalloc(cnt, sizeof(*mem_range), GFP_KERNEL);
  121. if (!mem_range)
  122. return -ENOMEM;
  123. array_size = cnt * sizeof(struct stm32_rproc_mem_ranges) / sizeof(u32);
  124. ret = of_property_read_u32_array(np, "dma-ranges",
  125. (u32 *)mem_range, array_size);
  126. if (ret) {
  127. dev_err(dev, "error while get dma-ranges property: %x\n", ret);
  128. goto free_mem;
  129. }
  130. for (i = 0; i < cnt; i++) {
  131. p_mems[i].bus_addr = mem_range[i].bus_addr;
  132. p_mems[i].dev_addr = mem_range[i].dev_addr;
  133. p_mems[i].size = mem_range[i].size;
  134. dev_dbg(dev, "memory range[%i]: da %#x, pa %pa, size %#zx:\n",
  135. i, p_mems[i].dev_addr, &p_mems[i].bus_addr,
  136. p_mems[i].size);
  137. }
  138. ddata->rmems = p_mems;
  139. ddata->nb_rmems = cnt;
  140. free_mem:
  141. kfree(mem_range);
  142. return ret;
  143. }
  144. static int stm32_rproc_mbox_idx(struct rproc *rproc, const unsigned char *name)
  145. {
  146. struct stm32_rproc *ddata = rproc->priv;
  147. int i;
  148. for (i = 0; i < ARRAY_SIZE(ddata->mb); i++) {
  149. if (!strncmp(ddata->mb[i].name, name, strlen(name)))
  150. return i;
  151. }
  152. dev_err(&rproc->dev, "mailbox %s not found\n", name);
  153. return -EINVAL;
  154. }
  155. static int stm32_rproc_elf_load_rsc_table(struct rproc *rproc,
  156. const struct firmware *fw)
  157. {
  158. if (rproc_elf_load_rsc_table(rproc, fw))
  159. dev_warn(&rproc->dev, "no resource table found for this firmware\n");
  160. return 0;
  161. }
  162. static int stm32_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
  163. {
  164. struct device *dev = rproc->dev.parent;
  165. struct device_node *np = dev->of_node;
  166. struct of_phandle_iterator it;
  167. struct rproc_mem_entry *mem;
  168. struct reserved_mem *rmem;
  169. u64 da;
  170. int index = 0;
  171. /* Register associated reserved memory regions */
  172. of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
  173. while (of_phandle_iterator_next(&it) == 0) {
  174. rmem = of_reserved_mem_lookup(it.node);
  175. if (!rmem) {
  176. dev_err(dev, "unable to acquire memory-region\n");
  177. return -EINVAL;
  178. }
  179. if (stm32_rproc_pa_to_da(rproc, rmem->base, &da) < 0) {
  180. dev_err(dev, "memory region not valid %pa\n",
  181. &rmem->base);
  182. return -EINVAL;
  183. }
  184. /* No need to map vdev buffer */
  185. if (strcmp(it.node->name, "vdev0buffer")) {
  186. /* Register memory region */
  187. mem = rproc_mem_entry_init(dev, NULL,
  188. (dma_addr_t)rmem->base,
  189. rmem->size, da,
  190. stm32_rproc_mem_alloc,
  191. stm32_rproc_mem_release,
  192. it.node->name);
  193. if (mem)
  194. rproc_coredump_add_segment(rproc, da,
  195. rmem->size);
  196. } else {
  197. /* Register reserved memory for vdev buffer alloc */
  198. mem = rproc_of_resm_mem_entry_init(dev, index,
  199. rmem->size,
  200. rmem->base,
  201. it.node->name);
  202. }
  203. if (!mem)
  204. return -ENOMEM;
  205. rproc_add_carveout(rproc, mem);
  206. index++;
  207. }
  208. return stm32_rproc_elf_load_rsc_table(rproc, fw);
  209. }
  210. static irqreturn_t stm32_rproc_wdg(int irq, void *data)
  211. {
  212. struct rproc *rproc = data;
  213. rproc_report_crash(rproc, RPROC_WATCHDOG);
  214. return IRQ_HANDLED;
  215. }
  216. static void stm32_rproc_mb_callback(struct mbox_client *cl, void *data)
  217. {
  218. struct rproc *rproc = dev_get_drvdata(cl->dev);
  219. struct stm32_mbox *mb = container_of(cl, struct stm32_mbox, client);
  220. if (rproc_vq_interrupt(rproc, mb->vq_id) == IRQ_NONE)
  221. dev_dbg(&rproc->dev, "no message found in vq%d\n", mb->vq_id);
  222. }
  223. static void stm32_rproc_free_mbox(struct rproc *rproc)
  224. {
  225. struct stm32_rproc *ddata = rproc->priv;
  226. unsigned int i;
  227. for (i = 0; i < ARRAY_SIZE(ddata->mb); i++) {
  228. if (ddata->mb[i].chan)
  229. mbox_free_channel(ddata->mb[i].chan);
  230. ddata->mb[i].chan = NULL;
  231. }
  232. }
  233. static const struct stm32_mbox stm32_rproc_mbox[MBOX_NB_MBX] = {
  234. {
  235. .name = STM32_MBX_VQ0,
  236. .vq_id = 0,
  237. .client = {
  238. .rx_callback = stm32_rproc_mb_callback,
  239. .tx_block = false,
  240. },
  241. },
  242. {
  243. .name = STM32_MBX_VQ1,
  244. .vq_id = 1,
  245. .client = {
  246. .rx_callback = stm32_rproc_mb_callback,
  247. .tx_block = false,
  248. },
  249. },
  250. {
  251. .name = STM32_MBX_SHUTDOWN,
  252. .vq_id = -1,
  253. .client = {
  254. .tx_block = true,
  255. .tx_done = NULL,
  256. .tx_tout = 500, /* 500 ms time out */
  257. },
  258. }
  259. };
  260. static void stm32_rproc_request_mbox(struct rproc *rproc)
  261. {
  262. struct stm32_rproc *ddata = rproc->priv;
  263. struct device *dev = &rproc->dev;
  264. unsigned int i;
  265. const unsigned char *name;
  266. struct mbox_client *cl;
  267. /* Initialise mailbox structure table */
  268. memcpy(ddata->mb, stm32_rproc_mbox, sizeof(stm32_rproc_mbox));
  269. for (i = 0; i < MBOX_NB_MBX; i++) {
  270. name = ddata->mb[i].name;
  271. cl = &ddata->mb[i].client;
  272. cl->dev = dev->parent;
  273. ddata->mb[i].chan = mbox_request_channel_byname(cl, name);
  274. if (IS_ERR(ddata->mb[i].chan)) {
  275. dev_warn(dev, "cannot get %s mbox\n", name);
  276. ddata->mb[i].chan = NULL;
  277. }
  278. }
  279. }
  280. static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold)
  281. {
  282. struct stm32_rproc *ddata = rproc->priv;
  283. struct stm32_syscon hold_boot = ddata->hold_boot;
  284. struct arm_smccc_res smc_res;
  285. int val, err;
  286. val = hold ? HOLD_BOOT : RELEASE_BOOT;
  287. if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->secured_soc) {
  288. arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE,
  289. hold_boot.reg, val, 0, 0, 0, 0, &smc_res);
  290. err = smc_res.a0;
  291. } else {
  292. err = regmap_update_bits(hold_boot.map, hold_boot.reg,
  293. hold_boot.mask, val);
  294. }
  295. if (err)
  296. dev_err(&rproc->dev, "failed to set hold boot\n");
  297. return err;
  298. }
  299. static void stm32_rproc_add_coredump_trace(struct rproc *rproc)
  300. {
  301. struct rproc_debug_trace *trace;
  302. struct rproc_dump_segment *segment;
  303. bool already_added;
  304. list_for_each_entry(trace, &rproc->traces, node) {
  305. already_added = false;
  306. list_for_each_entry(segment, &rproc->dump_segments, node) {
  307. if (segment->da == trace->trace_mem.da) {
  308. already_added = true;
  309. break;
  310. }
  311. }
  312. if (!already_added)
  313. rproc_coredump_add_segment(rproc, trace->trace_mem.da,
  314. trace->trace_mem.len);
  315. }
  316. }
  317. static int stm32_rproc_start(struct rproc *rproc)
  318. {
  319. struct stm32_rproc *ddata = rproc->priv;
  320. int err;
  321. stm32_rproc_add_coredump_trace(rproc);
  322. /* clear remote proc Deep Sleep */
  323. if (ddata->pdds.map) {
  324. err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
  325. ddata->pdds.mask, 0);
  326. if (err) {
  327. dev_err(&rproc->dev, "failed to clear pdds\n");
  328. return err;
  329. }
  330. }
  331. err = stm32_rproc_set_hold_boot(rproc, false);
  332. if (err)
  333. return err;
  334. return stm32_rproc_set_hold_boot(rproc, true);
  335. }
  336. static int stm32_rproc_stop(struct rproc *rproc)
  337. {
  338. struct stm32_rproc *ddata = rproc->priv;
  339. int err, dummy_data, idx;
  340. /* request shutdown of the remote processor */
  341. if (rproc->state != RPROC_OFFLINE) {
  342. idx = stm32_rproc_mbox_idx(rproc, STM32_MBX_SHUTDOWN);
  343. if (idx >= 0 && ddata->mb[idx].chan) {
  344. /* a dummy data is sent to allow to block on transmit */
  345. err = mbox_send_message(ddata->mb[idx].chan,
  346. &dummy_data);
  347. if (err < 0)
  348. dev_warn(&rproc->dev, "warning: remote FW shutdown without ack\n");
  349. }
  350. }
  351. err = stm32_rproc_set_hold_boot(rproc, true);
  352. if (err)
  353. return err;
  354. err = reset_control_assert(ddata->rst);
  355. if (err) {
  356. dev_err(&rproc->dev, "failed to assert the reset\n");
  357. return err;
  358. }
  359. /* to allow platform Standby power mode, set remote proc Deep Sleep */
  360. if (ddata->pdds.map) {
  361. err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
  362. ddata->pdds.mask, 1);
  363. if (err) {
  364. dev_err(&rproc->dev, "failed to set pdds\n");
  365. return err;
  366. }
  367. }
  368. return 0;
  369. }
  370. static void stm32_rproc_kick(struct rproc *rproc, int vqid)
  371. {
  372. struct stm32_rproc *ddata = rproc->priv;
  373. unsigned int i;
  374. int err;
  375. if (WARN_ON(vqid >= MBOX_NB_VQ))
  376. return;
  377. for (i = 0; i < MBOX_NB_MBX; i++) {
  378. if (vqid != ddata->mb[i].vq_id)
  379. continue;
  380. if (!ddata->mb[i].chan)
  381. return;
  382. err = mbox_send_message(ddata->mb[i].chan, (void *)(long)vqid);
  383. if (err < 0)
  384. dev_err(&rproc->dev, "%s: failed (%s, err:%d)\n",
  385. __func__, ddata->mb[i].name, err);
  386. return;
  387. }
  388. }
  389. static struct rproc_ops st_rproc_ops = {
  390. .start = stm32_rproc_start,
  391. .stop = stm32_rproc_stop,
  392. .kick = stm32_rproc_kick,
  393. .load = rproc_elf_load_segments,
  394. .parse_fw = stm32_rproc_parse_fw,
  395. .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
  396. .sanity_check = rproc_elf_sanity_check,
  397. .get_boot_addr = rproc_elf_get_boot_addr,
  398. };
  399. static const struct of_device_id stm32_rproc_match[] = {
  400. { .compatible = "st,stm32mp1-m4" },
  401. {},
  402. };
  403. MODULE_DEVICE_TABLE(of, stm32_rproc_match);
  404. static int stm32_rproc_get_syscon(struct device_node *np, const char *prop,
  405. struct stm32_syscon *syscon)
  406. {
  407. int err = 0;
  408. syscon->map = syscon_regmap_lookup_by_phandle(np, prop);
  409. if (IS_ERR(syscon->map)) {
  410. err = PTR_ERR(syscon->map);
  411. syscon->map = NULL;
  412. goto out;
  413. }
  414. err = of_property_read_u32_index(np, prop, 1, &syscon->reg);
  415. if (err)
  416. goto out;
  417. err = of_property_read_u32_index(np, prop, 2, &syscon->mask);
  418. out:
  419. return err;
  420. }
  421. static int stm32_rproc_parse_dt(struct platform_device *pdev)
  422. {
  423. struct device *dev = &pdev->dev;
  424. struct device_node *np = dev->of_node;
  425. struct rproc *rproc = platform_get_drvdata(pdev);
  426. struct stm32_rproc *ddata = rproc->priv;
  427. struct stm32_syscon tz;
  428. unsigned int tzen;
  429. int err, irq;
  430. irq = platform_get_irq(pdev, 0);
  431. if (irq == -EPROBE_DEFER)
  432. return -EPROBE_DEFER;
  433. if (irq > 0) {
  434. err = devm_request_irq(dev, irq, stm32_rproc_wdg, 0,
  435. dev_name(dev), rproc);
  436. if (err) {
  437. dev_err(dev, "failed to request wdg irq\n");
  438. return err;
  439. }
  440. dev_info(dev, "wdg irq registered\n");
  441. }
  442. ddata->rst = devm_reset_control_get_by_index(dev, 0);
  443. if (IS_ERR(ddata->rst)) {
  444. dev_err(dev, "failed to get mcu reset\n");
  445. return PTR_ERR(ddata->rst);
  446. }
  447. /*
  448. * if platform is secured the hold boot bit must be written by
  449. * smc call and read normally.
  450. * if not secure the hold boot bit could be read/write normally
  451. */
  452. err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz);
  453. if (err) {
  454. dev_err(dev, "failed to get tz syscfg\n");
  455. return err;
  456. }
  457. err = regmap_read(tz.map, tz.reg, &tzen);
  458. if (err) {
  459. dev_err(&rproc->dev, "failed to read tzen\n");
  460. return err;
  461. }
  462. ddata->secured_soc = tzen & tz.mask;
  463. err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot",
  464. &ddata->hold_boot);
  465. if (err) {
  466. dev_err(dev, "failed to get hold boot\n");
  467. return err;
  468. }
  469. err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds);
  470. if (err)
  471. dev_warn(dev, "failed to get pdds\n");
  472. rproc->auto_boot = of_property_read_bool(np, "st,auto-boot");
  473. return stm32_rproc_of_memory_translations(rproc);
  474. }
  475. static int stm32_rproc_probe(struct platform_device *pdev)
  476. {
  477. struct device *dev = &pdev->dev;
  478. struct stm32_rproc *ddata;
  479. struct device_node *np = dev->of_node;
  480. struct rproc *rproc;
  481. int ret;
  482. ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
  483. if (ret)
  484. return ret;
  485. rproc = rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
  486. if (!rproc)
  487. return -ENOMEM;
  488. rproc->has_iommu = false;
  489. ddata = rproc->priv;
  490. platform_set_drvdata(pdev, rproc);
  491. ret = stm32_rproc_parse_dt(pdev);
  492. if (ret)
  493. goto free_rproc;
  494. stm32_rproc_request_mbox(rproc);
  495. ret = rproc_add(rproc);
  496. if (ret)
  497. goto free_mb;
  498. return 0;
  499. free_mb:
  500. stm32_rproc_free_mbox(rproc);
  501. free_rproc:
  502. rproc_free(rproc);
  503. return ret;
  504. }
  505. static int stm32_rproc_remove(struct platform_device *pdev)
  506. {
  507. struct rproc *rproc = platform_get_drvdata(pdev);
  508. if (atomic_read(&rproc->power) > 0)
  509. rproc_shutdown(rproc);
  510. rproc_del(rproc);
  511. stm32_rproc_free_mbox(rproc);
  512. rproc_free(rproc);
  513. return 0;
  514. }
  515. static struct platform_driver stm32_rproc_driver = {
  516. .probe = stm32_rproc_probe,
  517. .remove = stm32_rproc_remove,
  518. .driver = {
  519. .name = "stm32-rproc",
  520. .of_match_table = of_match_ptr(stm32_rproc_match),
  521. },
  522. };
  523. module_platform_driver(stm32_rproc_driver);
  524. MODULE_DESCRIPTION("STM32 Remote Processor Control Driver");
  525. MODULE_AUTHOR("Ludovic Barre <ludovic.barre@st.com>");
  526. MODULE_AUTHOR("Fabien Dessenne <fabien.dessenne@st.com>");
  527. MODULE_LICENSE("GPL v2");