tps65910-regulator.c 33 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * tps65910.c -- TI tps65910
  4. *
  5. * Copyright 2010 Texas Instruments Inc.
  6. *
  7. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  8. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/err.h>
  14. #include <linux/of.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/regulator/driver.h>
  17. #include <linux/regulator/machine.h>
  18. #include <linux/slab.h>
  19. #include <linux/gpio.h>
  20. #include <linux/mfd/tps65910.h>
  21. #include <linux/regulator/of_regulator.h>
  22. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  23. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  24. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  25. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  26. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  27. /* supported VIO voltages in microvolts */
  28. static const unsigned int VIO_VSEL_table[] = {
  29. 1500000, 1800000, 2500000, 3300000,
  30. };
  31. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  32. /* supported VRTC voltages in microvolts */
  33. static const unsigned int VRTC_VSEL_table[] = {
  34. 1800000,
  35. };
  36. /* supported VDD3 voltages in microvolts */
  37. static const unsigned int VDD3_VSEL_table[] = {
  38. 5000000,
  39. };
  40. /* supported VDIG1 voltages in microvolts */
  41. static const unsigned int VDIG1_VSEL_table[] = {
  42. 1200000, 1500000, 1800000, 2700000,
  43. };
  44. /* supported VDIG2 voltages in microvolts */
  45. static const unsigned int VDIG2_VSEL_table[] = {
  46. 1000000, 1100000, 1200000, 1800000,
  47. };
  48. /* supported VPLL voltages in microvolts */
  49. static const unsigned int VPLL_VSEL_table[] = {
  50. 1000000, 1100000, 1800000, 2500000,
  51. };
  52. /* supported VDAC voltages in microvolts */
  53. static const unsigned int VDAC_VSEL_table[] = {
  54. 1800000, 2600000, 2800000, 2850000,
  55. };
  56. /* supported VAUX1 voltages in microvolts */
  57. static const unsigned int VAUX1_VSEL_table[] = {
  58. 1800000, 2500000, 2800000, 2850000,
  59. };
  60. /* supported VAUX2 voltages in microvolts */
  61. static const unsigned int VAUX2_VSEL_table[] = {
  62. 1800000, 2800000, 2900000, 3300000,
  63. };
  64. /* supported VAUX33 voltages in microvolts */
  65. static const unsigned int VAUX33_VSEL_table[] = {
  66. 1800000, 2000000, 2800000, 3300000,
  67. };
  68. /* supported VMMC voltages in microvolts */
  69. static const unsigned int VMMC_VSEL_table[] = {
  70. 1800000, 2800000, 3000000, 3300000,
  71. };
  72. /* supported BBCH voltages in microvolts */
  73. static const unsigned int VBB_VSEL_table[] = {
  74. 3000000, 2520000, 3150000, 5000000,
  75. };
  76. struct tps_info {
  77. const char *name;
  78. const char *vin_name;
  79. u8 n_voltages;
  80. const unsigned int *voltage_table;
  81. int enable_time_us;
  82. };
  83. static struct tps_info tps65910_regs[] = {
  84. {
  85. .name = "vrtc",
  86. .vin_name = "vcc7",
  87. .n_voltages = ARRAY_SIZE(VRTC_VSEL_table),
  88. .voltage_table = VRTC_VSEL_table,
  89. .enable_time_us = 2200,
  90. },
  91. {
  92. .name = "vio",
  93. .vin_name = "vccio",
  94. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  95. .voltage_table = VIO_VSEL_table,
  96. .enable_time_us = 350,
  97. },
  98. {
  99. .name = "vdd1",
  100. .vin_name = "vcc1",
  101. .enable_time_us = 350,
  102. },
  103. {
  104. .name = "vdd2",
  105. .vin_name = "vcc2",
  106. .enable_time_us = 350,
  107. },
  108. {
  109. .name = "vdd3",
  110. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  111. .voltage_table = VDD3_VSEL_table,
  112. .enable_time_us = 200,
  113. },
  114. {
  115. .name = "vdig1",
  116. .vin_name = "vcc6",
  117. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  118. .voltage_table = VDIG1_VSEL_table,
  119. .enable_time_us = 100,
  120. },
  121. {
  122. .name = "vdig2",
  123. .vin_name = "vcc6",
  124. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  125. .voltage_table = VDIG2_VSEL_table,
  126. .enable_time_us = 100,
  127. },
  128. {
  129. .name = "vpll",
  130. .vin_name = "vcc5",
  131. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  132. .voltage_table = VPLL_VSEL_table,
  133. .enable_time_us = 100,
  134. },
  135. {
  136. .name = "vdac",
  137. .vin_name = "vcc5",
  138. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  139. .voltage_table = VDAC_VSEL_table,
  140. .enable_time_us = 100,
  141. },
  142. {
  143. .name = "vaux1",
  144. .vin_name = "vcc4",
  145. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  146. .voltage_table = VAUX1_VSEL_table,
  147. .enable_time_us = 100,
  148. },
  149. {
  150. .name = "vaux2",
  151. .vin_name = "vcc4",
  152. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  153. .voltage_table = VAUX2_VSEL_table,
  154. .enable_time_us = 100,
  155. },
  156. {
  157. .name = "vaux33",
  158. .vin_name = "vcc3",
  159. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  160. .voltage_table = VAUX33_VSEL_table,
  161. .enable_time_us = 100,
  162. },
  163. {
  164. .name = "vmmc",
  165. .vin_name = "vcc3",
  166. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  167. .voltage_table = VMMC_VSEL_table,
  168. .enable_time_us = 100,
  169. },
  170. {
  171. .name = "vbb",
  172. .vin_name = "vcc7",
  173. .n_voltages = ARRAY_SIZE(VBB_VSEL_table),
  174. .voltage_table = VBB_VSEL_table,
  175. },
  176. };
  177. static struct tps_info tps65911_regs[] = {
  178. {
  179. .name = "vrtc",
  180. .vin_name = "vcc7",
  181. .enable_time_us = 2200,
  182. },
  183. {
  184. .name = "vio",
  185. .vin_name = "vccio",
  186. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  187. .voltage_table = VIO_VSEL_table,
  188. .enable_time_us = 350,
  189. },
  190. {
  191. .name = "vdd1",
  192. .vin_name = "vcc1",
  193. .n_voltages = 0x4C,
  194. .enable_time_us = 350,
  195. },
  196. {
  197. .name = "vdd2",
  198. .vin_name = "vcc2",
  199. .n_voltages = 0x4C,
  200. .enable_time_us = 350,
  201. },
  202. {
  203. .name = "vddctrl",
  204. .n_voltages = 0x44,
  205. .enable_time_us = 900,
  206. },
  207. {
  208. .name = "ldo1",
  209. .vin_name = "vcc6",
  210. .n_voltages = 0x33,
  211. .enable_time_us = 420,
  212. },
  213. {
  214. .name = "ldo2",
  215. .vin_name = "vcc6",
  216. .n_voltages = 0x33,
  217. .enable_time_us = 420,
  218. },
  219. {
  220. .name = "ldo3",
  221. .vin_name = "vcc5",
  222. .n_voltages = 0x1A,
  223. .enable_time_us = 230,
  224. },
  225. {
  226. .name = "ldo4",
  227. .vin_name = "vcc5",
  228. .n_voltages = 0x33,
  229. .enable_time_us = 230,
  230. },
  231. {
  232. .name = "ldo5",
  233. .vin_name = "vcc4",
  234. .n_voltages = 0x1A,
  235. .enable_time_us = 230,
  236. },
  237. {
  238. .name = "ldo6",
  239. .vin_name = "vcc3",
  240. .n_voltages = 0x1A,
  241. .enable_time_us = 230,
  242. },
  243. {
  244. .name = "ldo7",
  245. .vin_name = "vcc3",
  246. .n_voltages = 0x1A,
  247. .enable_time_us = 230,
  248. },
  249. {
  250. .name = "ldo8",
  251. .vin_name = "vcc3",
  252. .n_voltages = 0x1A,
  253. .enable_time_us = 230,
  254. },
  255. };
  256. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  257. static unsigned int tps65910_ext_sleep_control[] = {
  258. 0,
  259. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  260. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  261. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  262. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  263. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  264. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  265. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  266. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  267. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  268. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  269. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  270. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  271. };
  272. static unsigned int tps65911_ext_sleep_control[] = {
  273. 0,
  274. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  275. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  276. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  277. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  278. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  279. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  280. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  281. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  282. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  283. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  284. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  285. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  286. };
  287. struct tps65910_reg {
  288. struct regulator_desc *desc;
  289. struct tps65910 *mfd;
  290. struct regulator_dev **rdev;
  291. struct tps_info **info;
  292. int num_regulators;
  293. int mode;
  294. int (*get_ctrl_reg)(int);
  295. unsigned int *ext_sleep_control;
  296. unsigned int board_ext_control[TPS65910_NUM_REGS];
  297. };
  298. static int tps65910_get_ctrl_register(int id)
  299. {
  300. switch (id) {
  301. case TPS65910_REG_VRTC:
  302. return TPS65910_VRTC;
  303. case TPS65910_REG_VIO:
  304. return TPS65910_VIO;
  305. case TPS65910_REG_VDD1:
  306. return TPS65910_VDD1;
  307. case TPS65910_REG_VDD2:
  308. return TPS65910_VDD2;
  309. case TPS65910_REG_VDD3:
  310. return TPS65910_VDD3;
  311. case TPS65910_REG_VDIG1:
  312. return TPS65910_VDIG1;
  313. case TPS65910_REG_VDIG2:
  314. return TPS65910_VDIG2;
  315. case TPS65910_REG_VPLL:
  316. return TPS65910_VPLL;
  317. case TPS65910_REG_VDAC:
  318. return TPS65910_VDAC;
  319. case TPS65910_REG_VAUX1:
  320. return TPS65910_VAUX1;
  321. case TPS65910_REG_VAUX2:
  322. return TPS65910_VAUX2;
  323. case TPS65910_REG_VAUX33:
  324. return TPS65910_VAUX33;
  325. case TPS65910_REG_VMMC:
  326. return TPS65910_VMMC;
  327. case TPS65910_REG_VBB:
  328. return TPS65910_BBCH;
  329. default:
  330. return -EINVAL;
  331. }
  332. }
  333. static int tps65911_get_ctrl_register(int id)
  334. {
  335. switch (id) {
  336. case TPS65910_REG_VRTC:
  337. return TPS65910_VRTC;
  338. case TPS65910_REG_VIO:
  339. return TPS65910_VIO;
  340. case TPS65910_REG_VDD1:
  341. return TPS65910_VDD1;
  342. case TPS65910_REG_VDD2:
  343. return TPS65910_VDD2;
  344. case TPS65911_REG_VDDCTRL:
  345. return TPS65911_VDDCTRL;
  346. case TPS65911_REG_LDO1:
  347. return TPS65911_LDO1;
  348. case TPS65911_REG_LDO2:
  349. return TPS65911_LDO2;
  350. case TPS65911_REG_LDO3:
  351. return TPS65911_LDO3;
  352. case TPS65911_REG_LDO4:
  353. return TPS65911_LDO4;
  354. case TPS65911_REG_LDO5:
  355. return TPS65911_LDO5;
  356. case TPS65911_REG_LDO6:
  357. return TPS65911_LDO6;
  358. case TPS65911_REG_LDO7:
  359. return TPS65911_LDO7;
  360. case TPS65911_REG_LDO8:
  361. return TPS65911_LDO8;
  362. default:
  363. return -EINVAL;
  364. }
  365. }
  366. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  367. {
  368. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  369. struct tps65910 *mfd = pmic->mfd;
  370. int reg, value, id = rdev_get_id(dev);
  371. reg = pmic->get_ctrl_reg(id);
  372. if (reg < 0)
  373. return reg;
  374. switch (mode) {
  375. case REGULATOR_MODE_NORMAL:
  376. return tps65910_reg_update_bits(pmic->mfd, reg,
  377. LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
  378. LDO_ST_ON_BIT);
  379. case REGULATOR_MODE_IDLE:
  380. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  381. return tps65910_reg_set_bits(mfd, reg, value);
  382. case REGULATOR_MODE_STANDBY:
  383. return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  384. }
  385. return -EINVAL;
  386. }
  387. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  388. {
  389. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  390. int ret, reg, value, id = rdev_get_id(dev);
  391. reg = pmic->get_ctrl_reg(id);
  392. if (reg < 0)
  393. return reg;
  394. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  395. if (ret < 0)
  396. return ret;
  397. if (!(value & LDO_ST_ON_BIT))
  398. return REGULATOR_MODE_STANDBY;
  399. else if (value & LDO_ST_MODE_BIT)
  400. return REGULATOR_MODE_IDLE;
  401. else
  402. return REGULATOR_MODE_NORMAL;
  403. }
  404. static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
  405. {
  406. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  407. int ret, id = rdev_get_id(dev);
  408. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  409. switch (id) {
  410. case TPS65910_REG_VDD1:
  411. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel);
  412. if (ret < 0)
  413. return ret;
  414. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult);
  415. if (ret < 0)
  416. return ret;
  417. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  418. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel);
  419. if (ret < 0)
  420. return ret;
  421. sr = opvsel & VDD1_OP_CMD_MASK;
  422. opvsel &= VDD1_OP_SEL_MASK;
  423. srvsel &= VDD1_SR_SEL_MASK;
  424. vselmax = 75;
  425. break;
  426. case TPS65910_REG_VDD2:
  427. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel);
  428. if (ret < 0)
  429. return ret;
  430. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult);
  431. if (ret < 0)
  432. return ret;
  433. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  434. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel);
  435. if (ret < 0)
  436. return ret;
  437. sr = opvsel & VDD2_OP_CMD_MASK;
  438. opvsel &= VDD2_OP_SEL_MASK;
  439. srvsel &= VDD2_SR_SEL_MASK;
  440. vselmax = 75;
  441. break;
  442. case TPS65911_REG_VDDCTRL:
  443. ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP,
  444. &opvsel);
  445. if (ret < 0)
  446. return ret;
  447. ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR,
  448. &srvsel);
  449. if (ret < 0)
  450. return ret;
  451. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  452. opvsel &= VDDCTRL_OP_SEL_MASK;
  453. srvsel &= VDDCTRL_SR_SEL_MASK;
  454. vselmax = 64;
  455. break;
  456. }
  457. /* multiplier 0 == 1 but 2,3 normal */
  458. if (!mult)
  459. mult = 1;
  460. if (sr) {
  461. /* normalise to valid range */
  462. if (srvsel < 3)
  463. srvsel = 3;
  464. if (srvsel > vselmax)
  465. srvsel = vselmax;
  466. return srvsel - 3;
  467. } else {
  468. /* normalise to valid range*/
  469. if (opvsel < 3)
  470. opvsel = 3;
  471. if (opvsel > vselmax)
  472. opvsel = vselmax;
  473. return opvsel - 3;
  474. }
  475. return -EINVAL;
  476. }
  477. static int tps65910_get_voltage_sel(struct regulator_dev *dev)
  478. {
  479. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  480. int ret, reg, value, id = rdev_get_id(dev);
  481. reg = pmic->get_ctrl_reg(id);
  482. if (reg < 0)
  483. return reg;
  484. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  485. if (ret < 0)
  486. return ret;
  487. switch (id) {
  488. case TPS65910_REG_VIO:
  489. case TPS65910_REG_VDIG1:
  490. case TPS65910_REG_VDIG2:
  491. case TPS65910_REG_VPLL:
  492. case TPS65910_REG_VDAC:
  493. case TPS65910_REG_VAUX1:
  494. case TPS65910_REG_VAUX2:
  495. case TPS65910_REG_VAUX33:
  496. case TPS65910_REG_VMMC:
  497. value &= LDO_SEL_MASK;
  498. value >>= LDO_SEL_SHIFT;
  499. break;
  500. case TPS65910_REG_VBB:
  501. value &= BBCH_BBSEL_MASK;
  502. value >>= BBCH_BBSEL_SHIFT;
  503. break;
  504. default:
  505. return -EINVAL;
  506. }
  507. return value;
  508. }
  509. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  510. {
  511. return dev->desc->volt_table[0];
  512. }
  513. static int tps65911_get_voltage_sel(struct regulator_dev *dev)
  514. {
  515. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  516. int ret, id = rdev_get_id(dev);
  517. unsigned int value, reg;
  518. reg = pmic->get_ctrl_reg(id);
  519. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  520. if (ret < 0)
  521. return ret;
  522. switch (id) {
  523. case TPS65911_REG_LDO1:
  524. case TPS65911_REG_LDO2:
  525. case TPS65911_REG_LDO4:
  526. value &= LDO1_SEL_MASK;
  527. value >>= LDO_SEL_SHIFT;
  528. break;
  529. case TPS65911_REG_LDO3:
  530. case TPS65911_REG_LDO5:
  531. case TPS65911_REG_LDO6:
  532. case TPS65911_REG_LDO7:
  533. case TPS65911_REG_LDO8:
  534. value &= LDO3_SEL_MASK;
  535. value >>= LDO_SEL_SHIFT;
  536. break;
  537. case TPS65910_REG_VIO:
  538. value &= LDO_SEL_MASK;
  539. value >>= LDO_SEL_SHIFT;
  540. break;
  541. default:
  542. return -EINVAL;
  543. }
  544. return value;
  545. }
  546. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  547. unsigned selector)
  548. {
  549. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  550. int id = rdev_get_id(dev), vsel;
  551. int dcdc_mult = 0;
  552. switch (id) {
  553. case TPS65910_REG_VDD1:
  554. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  555. if (dcdc_mult == 1)
  556. dcdc_mult--;
  557. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  558. tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1,
  559. VDD1_VGAIN_SEL_MASK,
  560. dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
  561. tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel);
  562. break;
  563. case TPS65910_REG_VDD2:
  564. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  565. if (dcdc_mult == 1)
  566. dcdc_mult--;
  567. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  568. tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2,
  569. VDD1_VGAIN_SEL_MASK,
  570. dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
  571. tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel);
  572. break;
  573. case TPS65911_REG_VDDCTRL:
  574. vsel = selector + 3;
  575. tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel);
  576. }
  577. return 0;
  578. }
  579. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  580. unsigned selector)
  581. {
  582. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  583. int reg, id = rdev_get_id(dev);
  584. reg = pmic->get_ctrl_reg(id);
  585. if (reg < 0)
  586. return reg;
  587. switch (id) {
  588. case TPS65910_REG_VIO:
  589. case TPS65910_REG_VDIG1:
  590. case TPS65910_REG_VDIG2:
  591. case TPS65910_REG_VPLL:
  592. case TPS65910_REG_VDAC:
  593. case TPS65910_REG_VAUX1:
  594. case TPS65910_REG_VAUX2:
  595. case TPS65910_REG_VAUX33:
  596. case TPS65910_REG_VMMC:
  597. return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
  598. selector << LDO_SEL_SHIFT);
  599. case TPS65910_REG_VBB:
  600. return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
  601. selector << BBCH_BBSEL_SHIFT);
  602. }
  603. return -EINVAL;
  604. }
  605. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  606. unsigned selector)
  607. {
  608. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  609. int reg, id = rdev_get_id(dev);
  610. reg = pmic->get_ctrl_reg(id);
  611. if (reg < 0)
  612. return reg;
  613. switch (id) {
  614. case TPS65911_REG_LDO1:
  615. case TPS65911_REG_LDO2:
  616. case TPS65911_REG_LDO4:
  617. return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK,
  618. selector << LDO_SEL_SHIFT);
  619. case TPS65911_REG_LDO3:
  620. case TPS65911_REG_LDO5:
  621. case TPS65911_REG_LDO6:
  622. case TPS65911_REG_LDO7:
  623. case TPS65911_REG_LDO8:
  624. return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK,
  625. selector << LDO_SEL_SHIFT);
  626. case TPS65910_REG_VIO:
  627. return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
  628. selector << LDO_SEL_SHIFT);
  629. case TPS65910_REG_VBB:
  630. return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
  631. selector << BBCH_BBSEL_SHIFT);
  632. }
  633. return -EINVAL;
  634. }
  635. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  636. unsigned selector)
  637. {
  638. int volt, mult = 1, id = rdev_get_id(dev);
  639. switch (id) {
  640. case TPS65910_REG_VDD1:
  641. case TPS65910_REG_VDD2:
  642. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  643. volt = VDD1_2_MIN_VOLT +
  644. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  645. break;
  646. case TPS65911_REG_VDDCTRL:
  647. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  648. break;
  649. default:
  650. BUG();
  651. return -EINVAL;
  652. }
  653. return volt * 100 * mult;
  654. }
  655. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  656. {
  657. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  658. int step_mv = 0, id = rdev_get_id(dev);
  659. switch (id) {
  660. case TPS65911_REG_LDO1:
  661. case TPS65911_REG_LDO2:
  662. case TPS65911_REG_LDO4:
  663. /* The first 5 values of the selector correspond to 1V */
  664. if (selector < 5)
  665. selector = 0;
  666. else
  667. selector -= 4;
  668. step_mv = 50;
  669. break;
  670. case TPS65911_REG_LDO3:
  671. case TPS65911_REG_LDO5:
  672. case TPS65911_REG_LDO6:
  673. case TPS65911_REG_LDO7:
  674. case TPS65911_REG_LDO8:
  675. /* The first 3 values of the selector correspond to 1V */
  676. if (selector < 3)
  677. selector = 0;
  678. else
  679. selector -= 2;
  680. step_mv = 100;
  681. break;
  682. case TPS65910_REG_VIO:
  683. return pmic->info[id]->voltage_table[selector];
  684. default:
  685. return -EINVAL;
  686. }
  687. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  688. }
  689. /* Regulator ops (except VRTC) */
  690. static struct regulator_ops tps65910_ops_dcdc = {
  691. .is_enabled = regulator_is_enabled_regmap,
  692. .enable = regulator_enable_regmap,
  693. .disable = regulator_disable_regmap,
  694. .set_mode = tps65910_set_mode,
  695. .get_mode = tps65910_get_mode,
  696. .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
  697. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  698. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  699. .list_voltage = tps65910_list_voltage_dcdc,
  700. .map_voltage = regulator_map_voltage_ascend,
  701. };
  702. static struct regulator_ops tps65910_ops_vdd3 = {
  703. .is_enabled = regulator_is_enabled_regmap,
  704. .enable = regulator_enable_regmap,
  705. .disable = regulator_disable_regmap,
  706. .set_mode = tps65910_set_mode,
  707. .get_mode = tps65910_get_mode,
  708. .get_voltage = tps65910_get_voltage_vdd3,
  709. .list_voltage = regulator_list_voltage_table,
  710. .map_voltage = regulator_map_voltage_ascend,
  711. };
  712. static struct regulator_ops tps65910_ops_vbb = {
  713. .is_enabled = regulator_is_enabled_regmap,
  714. .enable = regulator_enable_regmap,
  715. .disable = regulator_disable_regmap,
  716. .set_mode = tps65910_set_mode,
  717. .get_mode = tps65910_get_mode,
  718. .get_voltage_sel = tps65910_get_voltage_sel,
  719. .set_voltage_sel = tps65910_set_voltage_sel,
  720. .list_voltage = regulator_list_voltage_table,
  721. .map_voltage = regulator_map_voltage_iterate,
  722. };
  723. static struct regulator_ops tps65910_ops = {
  724. .is_enabled = regulator_is_enabled_regmap,
  725. .enable = regulator_enable_regmap,
  726. .disable = regulator_disable_regmap,
  727. .set_mode = tps65910_set_mode,
  728. .get_mode = tps65910_get_mode,
  729. .get_voltage_sel = tps65910_get_voltage_sel,
  730. .set_voltage_sel = tps65910_set_voltage_sel,
  731. .list_voltage = regulator_list_voltage_table,
  732. .map_voltage = regulator_map_voltage_ascend,
  733. };
  734. static struct regulator_ops tps65911_ops = {
  735. .is_enabled = regulator_is_enabled_regmap,
  736. .enable = regulator_enable_regmap,
  737. .disable = regulator_disable_regmap,
  738. .set_mode = tps65910_set_mode,
  739. .get_mode = tps65910_get_mode,
  740. .get_voltage_sel = tps65911_get_voltage_sel,
  741. .set_voltage_sel = tps65911_set_voltage_sel,
  742. .list_voltage = tps65911_list_voltage,
  743. .map_voltage = regulator_map_voltage_ascend,
  744. };
  745. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  746. int id, int ext_sleep_config)
  747. {
  748. struct tps65910 *mfd = pmic->mfd;
  749. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  750. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  751. int ret;
  752. /*
  753. * Regulator can not be control from multiple external input EN1, EN2
  754. * and EN3 together.
  755. */
  756. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  757. int en_count;
  758. en_count = ((ext_sleep_config &
  759. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  760. en_count += ((ext_sleep_config &
  761. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  762. en_count += ((ext_sleep_config &
  763. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  764. en_count += ((ext_sleep_config &
  765. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  766. if (en_count > 1) {
  767. dev_err(mfd->dev,
  768. "External sleep control flag is not proper\n");
  769. return -EINVAL;
  770. }
  771. }
  772. pmic->board_ext_control[id] = ext_sleep_config;
  773. /* External EN1 control */
  774. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  775. ret = tps65910_reg_set_bits(mfd,
  776. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  777. else
  778. ret = tps65910_reg_clear_bits(mfd,
  779. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  780. if (ret < 0) {
  781. dev_err(mfd->dev,
  782. "Error in configuring external control EN1\n");
  783. return ret;
  784. }
  785. /* External EN2 control */
  786. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  787. ret = tps65910_reg_set_bits(mfd,
  788. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  789. else
  790. ret = tps65910_reg_clear_bits(mfd,
  791. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  792. if (ret < 0) {
  793. dev_err(mfd->dev,
  794. "Error in configuring external control EN2\n");
  795. return ret;
  796. }
  797. /* External EN3 control for TPS65910 LDO only */
  798. if ((tps65910_chip_id(mfd) == TPS65910) &&
  799. (id >= TPS65910_REG_VDIG1)) {
  800. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  801. ret = tps65910_reg_set_bits(mfd,
  802. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  803. else
  804. ret = tps65910_reg_clear_bits(mfd,
  805. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  806. if (ret < 0) {
  807. dev_err(mfd->dev,
  808. "Error in configuring external control EN3\n");
  809. return ret;
  810. }
  811. }
  812. /* Return if no external control is selected */
  813. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  814. /* Clear all sleep controls */
  815. ret = tps65910_reg_clear_bits(mfd,
  816. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  817. if (!ret)
  818. ret = tps65910_reg_clear_bits(mfd,
  819. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  820. if (ret < 0)
  821. dev_err(mfd->dev,
  822. "Error in configuring SLEEP register\n");
  823. return ret;
  824. }
  825. /*
  826. * For regulator that has separate operational and sleep register make
  827. * sure that operational is used and clear sleep register to turn
  828. * regulator off when external control is inactive
  829. */
  830. if ((id == TPS65910_REG_VDD1) ||
  831. (id == TPS65910_REG_VDD2) ||
  832. ((id == TPS65911_REG_VDDCTRL) &&
  833. (tps65910_chip_id(mfd) == TPS65911))) {
  834. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  835. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  836. int opvsel, srvsel;
  837. ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel);
  838. if (ret < 0)
  839. return ret;
  840. ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel);
  841. if (ret < 0)
  842. return ret;
  843. if (opvsel & VDD1_OP_CMD_MASK) {
  844. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  845. ret = tps65910_reg_write(pmic->mfd, op_reg_add,
  846. reg_val);
  847. if (ret < 0) {
  848. dev_err(mfd->dev,
  849. "Error in configuring op register\n");
  850. return ret;
  851. }
  852. }
  853. ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0);
  854. if (ret < 0) {
  855. dev_err(mfd->dev, "Error in setting sr register\n");
  856. return ret;
  857. }
  858. }
  859. ret = tps65910_reg_clear_bits(mfd,
  860. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  861. if (!ret) {
  862. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  863. ret = tps65910_reg_set_bits(mfd,
  864. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  865. else
  866. ret = tps65910_reg_clear_bits(mfd,
  867. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  868. }
  869. if (ret < 0)
  870. dev_err(mfd->dev,
  871. "Error in configuring SLEEP register\n");
  872. return ret;
  873. }
  874. #ifdef CONFIG_OF
  875. static struct of_regulator_match tps65910_matches[] = {
  876. { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
  877. { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
  878. { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
  879. { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
  880. { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
  881. { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
  882. { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
  883. { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
  884. { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
  885. { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
  886. { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
  887. { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
  888. { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
  889. { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] },
  890. };
  891. static struct of_regulator_match tps65911_matches[] = {
  892. { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
  893. { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
  894. { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
  895. { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
  896. { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
  897. { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
  898. { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
  899. { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
  900. { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
  901. { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
  902. { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
  903. { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
  904. { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
  905. };
  906. static struct tps65910_board *tps65910_parse_dt_reg_data(
  907. struct platform_device *pdev,
  908. struct of_regulator_match **tps65910_reg_matches)
  909. {
  910. struct tps65910_board *pmic_plat_data;
  911. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  912. struct device_node *np, *regulators;
  913. struct of_regulator_match *matches;
  914. unsigned int prop;
  915. int idx = 0, ret, count;
  916. pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
  917. GFP_KERNEL);
  918. if (!pmic_plat_data)
  919. return NULL;
  920. np = pdev->dev.parent->of_node;
  921. regulators = of_get_child_by_name(np, "regulators");
  922. if (!regulators) {
  923. dev_err(&pdev->dev, "regulator node not found\n");
  924. return NULL;
  925. }
  926. switch (tps65910_chip_id(tps65910)) {
  927. case TPS65910:
  928. count = ARRAY_SIZE(tps65910_matches);
  929. matches = tps65910_matches;
  930. break;
  931. case TPS65911:
  932. count = ARRAY_SIZE(tps65911_matches);
  933. matches = tps65911_matches;
  934. break;
  935. default:
  936. of_node_put(regulators);
  937. dev_err(&pdev->dev, "Invalid tps chip version\n");
  938. return NULL;
  939. }
  940. ret = of_regulator_match(&pdev->dev, regulators, matches, count);
  941. of_node_put(regulators);
  942. if (ret < 0) {
  943. dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
  944. ret);
  945. return NULL;
  946. }
  947. *tps65910_reg_matches = matches;
  948. for (idx = 0; idx < count; idx++) {
  949. if (!matches[idx].of_node)
  950. continue;
  951. pmic_plat_data->tps65910_pmic_init_data[idx] =
  952. matches[idx].init_data;
  953. ret = of_property_read_u32(matches[idx].of_node,
  954. "ti,regulator-ext-sleep-control", &prop);
  955. if (!ret)
  956. pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
  957. }
  958. return pmic_plat_data;
  959. }
  960. #else
  961. static inline struct tps65910_board *tps65910_parse_dt_reg_data(
  962. struct platform_device *pdev,
  963. struct of_regulator_match **tps65910_reg_matches)
  964. {
  965. *tps65910_reg_matches = NULL;
  966. return NULL;
  967. }
  968. #endif
  969. static int tps65910_probe(struct platform_device *pdev)
  970. {
  971. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  972. struct regulator_config config = { };
  973. struct tps_info *info;
  974. struct regulator_dev *rdev;
  975. struct tps65910_reg *pmic;
  976. struct tps65910_board *pmic_plat_data;
  977. struct of_regulator_match *tps65910_reg_matches = NULL;
  978. int i, err;
  979. pmic_plat_data = dev_get_platdata(tps65910->dev);
  980. if (!pmic_plat_data && tps65910->dev->of_node)
  981. pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
  982. &tps65910_reg_matches);
  983. if (!pmic_plat_data) {
  984. dev_err(&pdev->dev, "Platform data not found\n");
  985. return -EINVAL;
  986. }
  987. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  988. if (!pmic)
  989. return -ENOMEM;
  990. pmic->mfd = tps65910;
  991. platform_set_drvdata(pdev, pmic);
  992. /* Give control of all register to control port */
  993. err = tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  994. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  995. if (err < 0)
  996. return err;
  997. switch (tps65910_chip_id(tps65910)) {
  998. case TPS65910:
  999. BUILD_BUG_ON(TPS65910_NUM_REGS < ARRAY_SIZE(tps65910_regs));
  1000. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  1001. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  1002. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  1003. info = tps65910_regs;
  1004. /* Work around silicon erratum SWCZ010: output programmed
  1005. * voltage level can go higher than expected or crash
  1006. * Workaround: use no synchronization of DCDC clocks
  1007. */
  1008. tps65910_reg_clear_bits(pmic->mfd, TPS65910_DCDCCTRL,
  1009. DCDCCTRL_DCDCCKSYNC_MASK);
  1010. break;
  1011. case TPS65911:
  1012. BUILD_BUG_ON(TPS65910_NUM_REGS < ARRAY_SIZE(tps65911_regs));
  1013. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  1014. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  1015. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  1016. info = tps65911_regs;
  1017. break;
  1018. default:
  1019. dev_err(&pdev->dev, "Invalid tps chip version\n");
  1020. return -ENODEV;
  1021. }
  1022. pmic->desc = devm_kcalloc(&pdev->dev,
  1023. pmic->num_regulators,
  1024. sizeof(struct regulator_desc),
  1025. GFP_KERNEL);
  1026. if (!pmic->desc)
  1027. return -ENOMEM;
  1028. pmic->info = devm_kcalloc(&pdev->dev,
  1029. pmic->num_regulators,
  1030. sizeof(struct tps_info *),
  1031. GFP_KERNEL);
  1032. if (!pmic->info)
  1033. return -ENOMEM;
  1034. pmic->rdev = devm_kcalloc(&pdev->dev,
  1035. pmic->num_regulators,
  1036. sizeof(struct regulator_dev *),
  1037. GFP_KERNEL);
  1038. if (!pmic->rdev)
  1039. return -ENOMEM;
  1040. for (i = 0; i < pmic->num_regulators; i++, info++) {
  1041. /* Register the regulators */
  1042. pmic->info[i] = info;
  1043. pmic->desc[i].name = info->name;
  1044. pmic->desc[i].supply_name = info->vin_name;
  1045. pmic->desc[i].id = i;
  1046. pmic->desc[i].n_voltages = info->n_voltages;
  1047. pmic->desc[i].enable_time = info->enable_time_us;
  1048. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  1049. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1050. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  1051. VDD1_2_NUM_VOLT_COARSE;
  1052. pmic->desc[i].ramp_delay = 12500;
  1053. } else if (i == TPS65910_REG_VDD3) {
  1054. if (tps65910_chip_id(tps65910) == TPS65910) {
  1055. pmic->desc[i].ops = &tps65910_ops_vdd3;
  1056. pmic->desc[i].volt_table = info->voltage_table;
  1057. } else {
  1058. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1059. pmic->desc[i].ramp_delay = 5000;
  1060. }
  1061. } else if (i == TPS65910_REG_VBB &&
  1062. tps65910_chip_id(tps65910) == TPS65910) {
  1063. pmic->desc[i].ops = &tps65910_ops_vbb;
  1064. pmic->desc[i].volt_table = info->voltage_table;
  1065. } else {
  1066. if (tps65910_chip_id(tps65910) == TPS65910) {
  1067. pmic->desc[i].ops = &tps65910_ops;
  1068. pmic->desc[i].volt_table = info->voltage_table;
  1069. } else {
  1070. pmic->desc[i].ops = &tps65911_ops;
  1071. }
  1072. }
  1073. err = tps65910_set_ext_sleep_config(pmic, i,
  1074. pmic_plat_data->regulator_ext_sleep_control[i]);
  1075. /*
  1076. * Failing on regulator for configuring externally control
  1077. * is not a serious issue, just throw warning.
  1078. */
  1079. if (err < 0)
  1080. dev_warn(tps65910->dev,
  1081. "Failed to initialise ext control config\n");
  1082. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1083. pmic->desc[i].owner = THIS_MODULE;
  1084. pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
  1085. pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
  1086. config.dev = tps65910->dev;
  1087. config.init_data = pmic_plat_data->tps65910_pmic_init_data[i];
  1088. config.driver_data = pmic;
  1089. config.regmap = tps65910->regmap;
  1090. if (tps65910_reg_matches)
  1091. config.of_node = tps65910_reg_matches[i].of_node;
  1092. rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],
  1093. &config);
  1094. if (IS_ERR(rdev)) {
  1095. dev_err(tps65910->dev,
  1096. "failed to register %s regulator\n",
  1097. pdev->name);
  1098. return PTR_ERR(rdev);
  1099. }
  1100. /* Save regulator for cleanup */
  1101. pmic->rdev[i] = rdev;
  1102. }
  1103. return 0;
  1104. }
  1105. static void tps65910_shutdown(struct platform_device *pdev)
  1106. {
  1107. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1108. int i;
  1109. /*
  1110. * Before bootloader jumps to kernel, it makes sure that required
  1111. * external control signals are in desired state so that given rails
  1112. * can be configure accordingly.
  1113. * If rails are configured to be controlled from external control
  1114. * then before shutting down/rebooting the system, the external
  1115. * control configuration need to be remove from the rails so that
  1116. * its output will be available as per register programming even
  1117. * if external controls are removed. This is require when the POR
  1118. * value of the control signals are not in active state and before
  1119. * bootloader initializes it, the system requires the rail output
  1120. * to be active for booting.
  1121. */
  1122. for (i = 0; i < pmic->num_regulators; i++) {
  1123. int err;
  1124. if (!pmic->rdev[i])
  1125. continue;
  1126. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1127. if (err < 0)
  1128. dev_err(&pdev->dev,
  1129. "Error in clearing external control\n");
  1130. }
  1131. }
  1132. static struct platform_driver tps65910_driver = {
  1133. .driver = {
  1134. .name = "tps65910-pmic",
  1135. },
  1136. .probe = tps65910_probe,
  1137. .shutdown = tps65910_shutdown,
  1138. };
  1139. static int __init tps65910_init(void)
  1140. {
  1141. return platform_driver_register(&tps65910_driver);
  1142. }
  1143. subsys_initcall(tps65910_init);
  1144. static void __exit tps65910_cleanup(void)
  1145. {
  1146. platform_driver_unregister(&tps65910_driver);
  1147. }
  1148. module_exit(tps65910_cleanup);
  1149. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1150. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1151. MODULE_LICENSE("GPL v2");
  1152. MODULE_ALIAS("platform:tps65910-pmic");