qcom_smd-regulator.c 29 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015, Sony Mobile Communications AB.
  4. * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/of.h>
  8. #include <linux/of_device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/regulator/driver.h>
  11. #include <linux/soc/qcom/smd-rpm.h>
  12. struct qcom_rpm_reg {
  13. struct device *dev;
  14. struct qcom_smd_rpm *rpm;
  15. u32 type;
  16. u32 id;
  17. struct regulator_desc desc;
  18. int is_enabled;
  19. int uV;
  20. u32 load;
  21. unsigned int enabled_updated:1;
  22. unsigned int uv_updated:1;
  23. unsigned int load_updated:1;
  24. };
  25. struct rpm_regulator_req {
  26. __le32 key;
  27. __le32 nbytes;
  28. __le32 value;
  29. };
  30. #define RPM_KEY_SWEN 0x6e657773 /* "swen" */
  31. #define RPM_KEY_UV 0x00007675 /* "uv" */
  32. #define RPM_KEY_MA 0x0000616d /* "ma" */
  33. static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
  34. {
  35. struct rpm_regulator_req req[3];
  36. int reqlen = 0;
  37. int ret;
  38. if (vreg->enabled_updated) {
  39. req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
  40. req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  41. req[reqlen].value = cpu_to_le32(vreg->is_enabled);
  42. reqlen++;
  43. }
  44. if (vreg->uv_updated && vreg->is_enabled) {
  45. req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
  46. req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  47. req[reqlen].value = cpu_to_le32(vreg->uV);
  48. reqlen++;
  49. }
  50. if (vreg->load_updated && vreg->is_enabled) {
  51. req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
  52. req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  53. req[reqlen].value = cpu_to_le32(vreg->load / 1000);
  54. reqlen++;
  55. }
  56. if (!reqlen)
  57. return 0;
  58. ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
  59. vreg->type, vreg->id,
  60. req, sizeof(req[0]) * reqlen);
  61. if (!ret) {
  62. vreg->enabled_updated = 0;
  63. vreg->uv_updated = 0;
  64. vreg->load_updated = 0;
  65. }
  66. return ret;
  67. }
  68. static int rpm_reg_enable(struct regulator_dev *rdev)
  69. {
  70. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  71. int ret;
  72. vreg->is_enabled = 1;
  73. vreg->enabled_updated = 1;
  74. ret = rpm_reg_write_active(vreg);
  75. if (ret)
  76. vreg->is_enabled = 0;
  77. return ret;
  78. }
  79. static int rpm_reg_is_enabled(struct regulator_dev *rdev)
  80. {
  81. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  82. return vreg->is_enabled;
  83. }
  84. static int rpm_reg_disable(struct regulator_dev *rdev)
  85. {
  86. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  87. int ret;
  88. vreg->is_enabled = 0;
  89. vreg->enabled_updated = 1;
  90. ret = rpm_reg_write_active(vreg);
  91. if (ret)
  92. vreg->is_enabled = 1;
  93. return ret;
  94. }
  95. static int rpm_reg_get_voltage(struct regulator_dev *rdev)
  96. {
  97. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  98. return vreg->uV;
  99. }
  100. static int rpm_reg_set_voltage(struct regulator_dev *rdev,
  101. int min_uV,
  102. int max_uV,
  103. unsigned *selector)
  104. {
  105. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  106. int ret;
  107. int old_uV = vreg->uV;
  108. vreg->uV = min_uV;
  109. vreg->uv_updated = 1;
  110. ret = rpm_reg_write_active(vreg);
  111. if (ret)
  112. vreg->uV = old_uV;
  113. return ret;
  114. }
  115. static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
  116. {
  117. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  118. u32 old_load = vreg->load;
  119. int ret;
  120. vreg->load = load_uA;
  121. vreg->load_updated = 1;
  122. ret = rpm_reg_write_active(vreg);
  123. if (ret)
  124. vreg->load = old_load;
  125. return ret;
  126. }
  127. static const struct regulator_ops rpm_smps_ldo_ops = {
  128. .enable = rpm_reg_enable,
  129. .disable = rpm_reg_disable,
  130. .is_enabled = rpm_reg_is_enabled,
  131. .list_voltage = regulator_list_voltage_linear_range,
  132. .get_voltage = rpm_reg_get_voltage,
  133. .set_voltage = rpm_reg_set_voltage,
  134. .set_load = rpm_reg_set_load,
  135. };
  136. static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
  137. .enable = rpm_reg_enable,
  138. .disable = rpm_reg_disable,
  139. .is_enabled = rpm_reg_is_enabled,
  140. .get_voltage = rpm_reg_get_voltage,
  141. .set_voltage = rpm_reg_set_voltage,
  142. .set_load = rpm_reg_set_load,
  143. };
  144. static const struct regulator_ops rpm_switch_ops = {
  145. .enable = rpm_reg_enable,
  146. .disable = rpm_reg_disable,
  147. .is_enabled = rpm_reg_is_enabled,
  148. };
  149. static const struct regulator_ops rpm_bob_ops = {
  150. .enable = rpm_reg_enable,
  151. .disable = rpm_reg_disable,
  152. .is_enabled = rpm_reg_is_enabled,
  153. .get_voltage = rpm_reg_get_voltage,
  154. .set_voltage = rpm_reg_set_voltage,
  155. };
  156. static const struct regulator_desc pma8084_hfsmps = {
  157. .linear_ranges = (struct regulator_linear_range[]) {
  158. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  159. REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
  160. },
  161. .n_linear_ranges = 2,
  162. .n_voltages = 159,
  163. .ops = &rpm_smps_ldo_ops,
  164. };
  165. static const struct regulator_desc pma8084_ftsmps = {
  166. .linear_ranges = (struct regulator_linear_range[]) {
  167. REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
  168. REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
  169. },
  170. .n_linear_ranges = 2,
  171. .n_voltages = 262,
  172. .ops = &rpm_smps_ldo_ops,
  173. };
  174. static const struct regulator_desc pma8084_pldo = {
  175. .linear_ranges = (struct regulator_linear_range[]) {
  176. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  177. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  178. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  179. },
  180. .n_linear_ranges = 3,
  181. .n_voltages = 164,
  182. .ops = &rpm_smps_ldo_ops,
  183. };
  184. static const struct regulator_desc pma8084_nldo = {
  185. .linear_ranges = (struct regulator_linear_range[]) {
  186. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  187. },
  188. .n_linear_ranges = 1,
  189. .n_voltages = 64,
  190. .ops = &rpm_smps_ldo_ops,
  191. };
  192. static const struct regulator_desc pma8084_switch = {
  193. .ops = &rpm_switch_ops,
  194. };
  195. static const struct regulator_desc pm8x41_hfsmps = {
  196. .linear_ranges = (struct regulator_linear_range[]) {
  197. REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
  198. REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
  199. },
  200. .n_linear_ranges = 2,
  201. .n_voltages = 159,
  202. .ops = &rpm_smps_ldo_ops,
  203. };
  204. static const struct regulator_desc pm8841_ftsmps = {
  205. .linear_ranges = (struct regulator_linear_range[]) {
  206. REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
  207. REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
  208. },
  209. .n_linear_ranges = 2,
  210. .n_voltages = 262,
  211. .ops = &rpm_smps_ldo_ops,
  212. };
  213. static const struct regulator_desc pm8941_boost = {
  214. .linear_ranges = (struct regulator_linear_range[]) {
  215. REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
  216. },
  217. .n_linear_ranges = 1,
  218. .n_voltages = 31,
  219. .ops = &rpm_smps_ldo_ops,
  220. };
  221. static const struct regulator_desc pm8941_pldo = {
  222. .linear_ranges = (struct regulator_linear_range[]) {
  223. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  224. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  225. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  226. },
  227. .n_linear_ranges = 3,
  228. .n_voltages = 164,
  229. .ops = &rpm_smps_ldo_ops,
  230. };
  231. static const struct regulator_desc pm8941_nldo = {
  232. .linear_ranges = (struct regulator_linear_range[]) {
  233. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  234. },
  235. .n_linear_ranges = 1,
  236. .n_voltages = 64,
  237. .ops = &rpm_smps_ldo_ops,
  238. };
  239. static const struct regulator_desc pm8941_lnldo = {
  240. .fixed_uV = 1740000,
  241. .n_voltages = 1,
  242. .ops = &rpm_smps_ldo_ops_fixed,
  243. };
  244. static const struct regulator_desc pm8941_switch = {
  245. .ops = &rpm_switch_ops,
  246. };
  247. static const struct regulator_desc pm8916_pldo = {
  248. .linear_ranges = (struct regulator_linear_range[]) {
  249. REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
  250. },
  251. .n_linear_ranges = 1,
  252. .n_voltages = 209,
  253. .ops = &rpm_smps_ldo_ops,
  254. };
  255. static const struct regulator_desc pm8916_nldo = {
  256. .linear_ranges = (struct regulator_linear_range[]) {
  257. REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
  258. },
  259. .n_linear_ranges = 1,
  260. .n_voltages = 94,
  261. .ops = &rpm_smps_ldo_ops,
  262. };
  263. static const struct regulator_desc pm8916_buck_lvo_smps = {
  264. .linear_ranges = (struct regulator_linear_range[]) {
  265. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  266. REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
  267. },
  268. .n_linear_ranges = 2,
  269. .n_voltages = 128,
  270. .ops = &rpm_smps_ldo_ops,
  271. };
  272. static const struct regulator_desc pm8916_buck_hvo_smps = {
  273. .linear_ranges = (struct regulator_linear_range[]) {
  274. REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
  275. },
  276. .n_linear_ranges = 1,
  277. .n_voltages = 32,
  278. .ops = &rpm_smps_ldo_ops,
  279. };
  280. static const struct regulator_desc pm8994_hfsmps = {
  281. .linear_ranges = (struct regulator_linear_range[]) {
  282. REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
  283. REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
  284. },
  285. .n_linear_ranges = 2,
  286. .n_voltages = 159,
  287. .ops = &rpm_smps_ldo_ops,
  288. };
  289. static const struct regulator_desc pm8994_ftsmps = {
  290. .linear_ranges = (struct regulator_linear_range[]) {
  291. REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
  292. REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
  293. },
  294. .n_linear_ranges = 2,
  295. .n_voltages = 350,
  296. .ops = &rpm_smps_ldo_ops,
  297. };
  298. static const struct regulator_desc pm8994_nldo = {
  299. .linear_ranges = (struct regulator_linear_range[]) {
  300. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  301. },
  302. .n_linear_ranges = 1,
  303. .n_voltages = 64,
  304. .ops = &rpm_smps_ldo_ops,
  305. };
  306. static const struct regulator_desc pm8994_pldo = {
  307. .linear_ranges = (struct regulator_linear_range[]) {
  308. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  309. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  310. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  311. },
  312. .n_linear_ranges = 3,
  313. .n_voltages = 164,
  314. .ops = &rpm_smps_ldo_ops,
  315. };
  316. static const struct regulator_desc pm8994_switch = {
  317. .ops = &rpm_switch_ops,
  318. };
  319. static const struct regulator_desc pm8994_lnldo = {
  320. .fixed_uV = 1740000,
  321. .n_voltages = 1,
  322. .ops = &rpm_smps_ldo_ops_fixed,
  323. };
  324. static const struct regulator_desc pm8998_ftsmps = {
  325. .linear_ranges = (struct regulator_linear_range[]) {
  326. REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
  327. },
  328. .n_linear_ranges = 1,
  329. .n_voltages = 259,
  330. .ops = &rpm_smps_ldo_ops,
  331. };
  332. static const struct regulator_desc pm8998_hfsmps = {
  333. .linear_ranges = (struct regulator_linear_range[]) {
  334. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  335. },
  336. .n_linear_ranges = 1,
  337. .n_voltages = 216,
  338. .ops = &rpm_smps_ldo_ops,
  339. };
  340. static const struct regulator_desc pm8998_nldo = {
  341. .linear_ranges = (struct regulator_linear_range[]) {
  342. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  343. },
  344. .n_linear_ranges = 1,
  345. .n_voltages = 128,
  346. .ops = &rpm_smps_ldo_ops,
  347. };
  348. static const struct regulator_desc pm8998_pldo = {
  349. .linear_ranges = (struct regulator_linear_range[]) {
  350. REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
  351. },
  352. .n_linear_ranges = 1,
  353. .n_voltages = 256,
  354. .ops = &rpm_smps_ldo_ops,
  355. };
  356. static const struct regulator_desc pm8998_pldo_lv = {
  357. .linear_ranges = (struct regulator_linear_range[]) {
  358. REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
  359. },
  360. .n_linear_ranges = 1,
  361. .n_voltages = 128,
  362. .ops = &rpm_smps_ldo_ops,
  363. };
  364. static const struct regulator_desc pm8998_switch = {
  365. .ops = &rpm_switch_ops,
  366. };
  367. static const struct regulator_desc pmi8998_bob = {
  368. .linear_ranges = (struct regulator_linear_range[]) {
  369. REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
  370. },
  371. .n_linear_ranges = 1,
  372. .n_voltages = 84,
  373. .ops = &rpm_bob_ops,
  374. };
  375. static const struct regulator_desc pms405_hfsmps3 = {
  376. .linear_ranges = (struct regulator_linear_range[]) {
  377. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  378. },
  379. .n_linear_ranges = 1,
  380. .n_voltages = 216,
  381. .ops = &rpm_smps_ldo_ops,
  382. };
  383. static const struct regulator_desc pms405_nldo300 = {
  384. .linear_ranges = (struct regulator_linear_range[]) {
  385. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  386. },
  387. .n_linear_ranges = 1,
  388. .n_voltages = 128,
  389. .ops = &rpm_smps_ldo_ops,
  390. };
  391. static const struct regulator_desc pms405_nldo1200 = {
  392. .linear_ranges = (struct regulator_linear_range[]) {
  393. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  394. },
  395. .n_linear_ranges = 1,
  396. .n_voltages = 128,
  397. .ops = &rpm_smps_ldo_ops,
  398. };
  399. static const struct regulator_desc pms405_pldo50 = {
  400. .linear_ranges = (struct regulator_linear_range[]) {
  401. REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
  402. },
  403. .n_linear_ranges = 1,
  404. .n_voltages = 129,
  405. .ops = &rpm_smps_ldo_ops,
  406. };
  407. static const struct regulator_desc pms405_pldo150 = {
  408. .linear_ranges = (struct regulator_linear_range[]) {
  409. REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
  410. },
  411. .n_linear_ranges = 1,
  412. .n_voltages = 129,
  413. .ops = &rpm_smps_ldo_ops,
  414. };
  415. static const struct regulator_desc pms405_pldo600 = {
  416. .linear_ranges = (struct regulator_linear_range[]) {
  417. REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
  418. },
  419. .n_linear_ranges = 1,
  420. .n_voltages = 99,
  421. .ops = &rpm_smps_ldo_ops,
  422. };
  423. struct rpm_regulator_data {
  424. const char *name;
  425. u32 type;
  426. u32 id;
  427. const struct regulator_desc *desc;
  428. const char *supply;
  429. };
  430. static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
  431. { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
  432. { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
  433. { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
  434. { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
  435. { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
  436. { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
  437. { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
  438. { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
  439. {}
  440. };
  441. static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
  442. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
  443. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
  444. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
  445. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
  446. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
  447. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
  448. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
  449. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
  450. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
  451. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
  452. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
  453. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
  454. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
  455. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  456. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  457. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  458. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  459. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  460. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  461. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  462. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  463. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  464. {}
  465. };
  466. static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
  467. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
  468. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
  469. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
  470. { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
  471. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
  472. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
  473. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
  474. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
  475. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
  476. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  477. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
  478. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  479. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  480. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  481. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
  482. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  483. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  484. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  485. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  486. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  487. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  488. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  489. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  490. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  491. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
  492. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  493. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  494. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  495. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  496. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  497. { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  498. { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
  499. { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
  500. {}
  501. };
  502. static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
  503. { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
  504. { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
  505. { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
  506. { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
  507. { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
  508. { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
  509. { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
  510. { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
  511. { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
  512. { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
  513. { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
  514. { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
  515. { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
  516. { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  517. { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  518. { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  519. { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
  520. { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  521. { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
  522. { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
  523. { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  524. { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  525. { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
  526. { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  527. { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  528. { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  529. { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  530. { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
  531. { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
  532. { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
  533. { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
  534. { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  535. { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
  536. { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
  537. { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  538. { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  539. { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
  540. { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  541. { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  542. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
  543. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
  544. { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
  545. { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
  546. { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
  547. {}
  548. };
  549. static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
  550. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
  551. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
  552. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
  553. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
  554. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
  555. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
  556. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
  557. { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
  558. { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
  559. { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
  560. { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
  561. { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
  562. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
  563. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
  564. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
  565. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
  566. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
  567. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
  568. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
  569. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
  570. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  571. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  572. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
  573. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
  574. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  575. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
  576. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
  577. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
  578. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
  579. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  580. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  581. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
  582. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
  583. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  584. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  585. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  586. { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
  587. { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
  588. { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
  589. { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
  590. { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
  591. { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
  592. { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
  593. { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
  594. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
  595. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
  596. {}
  597. };
  598. static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
  599. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
  600. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
  601. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
  602. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
  603. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
  604. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
  605. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
  606. { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
  607. { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
  608. { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
  609. { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
  610. { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
  611. { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
  612. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
  613. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
  614. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
  615. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
  616. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
  617. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
  618. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  619. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
  620. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
  621. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
  622. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
  623. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  624. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
  625. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  626. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  627. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
  628. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
  629. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
  630. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
  631. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
  632. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
  633. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
  634. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
  635. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
  636. { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
  637. { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
  638. { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
  639. { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
  640. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
  641. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
  642. {}
  643. };
  644. static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
  645. { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
  646. {}
  647. };
  648. static const struct rpm_regulator_data rpm_pms405_regulators[] = {
  649. { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
  650. { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
  651. { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
  652. { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
  653. { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
  654. { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
  655. { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
  656. { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
  657. { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
  658. { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
  659. { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
  660. { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
  661. { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
  662. { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
  663. { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
  664. { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  665. { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  666. { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  667. {}
  668. };
  669. static const struct of_device_id rpm_of_match[] = {
  670. { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
  671. { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
  672. { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
  673. { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
  674. { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
  675. { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
  676. { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
  677. { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
  678. {}
  679. };
  680. MODULE_DEVICE_TABLE(of, rpm_of_match);
  681. static int rpm_reg_probe(struct platform_device *pdev)
  682. {
  683. const struct rpm_regulator_data *reg;
  684. const struct of_device_id *match;
  685. struct regulator_config config = { };
  686. struct regulator_dev *rdev;
  687. struct qcom_rpm_reg *vreg;
  688. struct qcom_smd_rpm *rpm;
  689. rpm = dev_get_drvdata(pdev->dev.parent);
  690. if (!rpm) {
  691. dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
  692. return -ENODEV;
  693. }
  694. match = of_match_device(rpm_of_match, &pdev->dev);
  695. if (!match) {
  696. dev_err(&pdev->dev, "failed to match device\n");
  697. return -ENODEV;
  698. }
  699. for (reg = match->data; reg->name; reg++) {
  700. vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
  701. if (!vreg)
  702. return -ENOMEM;
  703. vreg->dev = &pdev->dev;
  704. vreg->type = reg->type;
  705. vreg->id = reg->id;
  706. vreg->rpm = rpm;
  707. memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
  708. vreg->desc.id = -1;
  709. vreg->desc.owner = THIS_MODULE;
  710. vreg->desc.type = REGULATOR_VOLTAGE;
  711. vreg->desc.name = reg->name;
  712. vreg->desc.supply_name = reg->supply;
  713. vreg->desc.of_match = reg->name;
  714. config.dev = &pdev->dev;
  715. config.driver_data = vreg;
  716. rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
  717. if (IS_ERR(rdev)) {
  718. dev_err(&pdev->dev, "failed to register %s\n", reg->name);
  719. return PTR_ERR(rdev);
  720. }
  721. }
  722. return 0;
  723. }
  724. static struct platform_driver rpm_reg_driver = {
  725. .probe = rpm_reg_probe,
  726. .driver = {
  727. .name = "qcom_rpm_smd_regulator",
  728. .of_match_table = rpm_of_match,
  729. },
  730. };
  731. static int __init rpm_reg_init(void)
  732. {
  733. return platform_driver_register(&rpm_reg_driver);
  734. }
  735. subsys_initcall(rpm_reg_init);
  736. static void __exit rpm_reg_exit(void)
  737. {
  738. platform_driver_unregister(&rpm_reg_driver);
  739. }
  740. module_exit(rpm_reg_exit)
  741. MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
  742. MODULE_LICENSE("GPL v2");