address.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #define pr_fmt(fmt) "OF: " fmt
  3. #include <linux/device.h>
  4. #include <linux/fwnode.h>
  5. #include <linux/io.h>
  6. #include <linux/ioport.h>
  7. #include <linux/logic_pio.h>
  8. #include <linux/module.h>
  9. #include <linux/of_address.h>
  10. #include <linux/pci.h>
  11. #include <linux/pci_regs.h>
  12. #include <linux/sizes.h>
  13. #include <linux/slab.h>
  14. #include <linux/string.h>
  15. /* Max address size we deal with */
  16. #define OF_MAX_ADDR_CELLS 4
  17. #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
  18. #define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
  19. static struct of_bus *of_match_bus(struct device_node *np);
  20. static int __of_address_to_resource(struct device_node *dev,
  21. const __be32 *addrp, u64 size, unsigned int flags,
  22. const char *name, struct resource *r);
  23. /* Debug utility */
  24. #ifdef DEBUG
  25. static void of_dump_addr(const char *s, const __be32 *addr, int na)
  26. {
  27. pr_debug("%s", s);
  28. while (na--)
  29. pr_cont(" %08x", be32_to_cpu(*(addr++)));
  30. pr_cont("\n");
  31. }
  32. #else
  33. static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
  34. #endif
  35. /* Callbacks for bus specific translators */
  36. struct of_bus {
  37. const char *name;
  38. const char *addresses;
  39. int (*match)(struct device_node *parent);
  40. void (*count_cells)(struct device_node *child,
  41. int *addrc, int *sizec);
  42. u64 (*map)(__be32 *addr, const __be32 *range,
  43. int na, int ns, int pna);
  44. int (*translate)(__be32 *addr, u64 offset, int na);
  45. unsigned int (*get_flags)(const __be32 *addr);
  46. };
  47. /*
  48. * Default translator (generic bus)
  49. */
  50. static void of_bus_default_count_cells(struct device_node *dev,
  51. int *addrc, int *sizec)
  52. {
  53. if (addrc)
  54. *addrc = of_n_addr_cells(dev);
  55. if (sizec)
  56. *sizec = of_n_size_cells(dev);
  57. }
  58. static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
  59. int na, int ns, int pna)
  60. {
  61. u64 cp, s, da;
  62. cp = of_read_number(range, na);
  63. s = of_read_number(range + na + pna, ns);
  64. da = of_read_number(addr, na);
  65. pr_debug("default map, cp=%llx, s=%llx, da=%llx\n",
  66. (unsigned long long)cp, (unsigned long long)s,
  67. (unsigned long long)da);
  68. if (da < cp || da >= (cp + s))
  69. return OF_BAD_ADDR;
  70. return da - cp;
  71. }
  72. static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
  73. {
  74. u64 a = of_read_number(addr, na);
  75. memset(addr, 0, na * 4);
  76. a += offset;
  77. if (na > 1)
  78. addr[na - 2] = cpu_to_be32(a >> 32);
  79. addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
  80. return 0;
  81. }
  82. static unsigned int of_bus_default_get_flags(const __be32 *addr)
  83. {
  84. return IORESOURCE_MEM;
  85. }
  86. #ifdef CONFIG_PCI
  87. /*
  88. * PCI bus specific translator
  89. */
  90. static int of_bus_pci_match(struct device_node *np)
  91. {
  92. /*
  93. * "pciex" is PCI Express
  94. * "vci" is for the /chaos bridge on 1st-gen PCI powermacs
  95. * "ht" is hypertransport
  96. */
  97. return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") ||
  98. of_node_is_type(np, "vci") || of_node_is_type(np, "ht");
  99. }
  100. static void of_bus_pci_count_cells(struct device_node *np,
  101. int *addrc, int *sizec)
  102. {
  103. if (addrc)
  104. *addrc = 3;
  105. if (sizec)
  106. *sizec = 2;
  107. }
  108. static unsigned int of_bus_pci_get_flags(const __be32 *addr)
  109. {
  110. unsigned int flags = 0;
  111. u32 w = be32_to_cpup(addr);
  112. switch((w >> 24) & 0x03) {
  113. case 0x01:
  114. flags |= IORESOURCE_IO;
  115. break;
  116. case 0x02: /* 32 bits */
  117. case 0x03: /* 64 bits */
  118. flags |= IORESOURCE_MEM;
  119. break;
  120. }
  121. if (w & 0x40000000)
  122. flags |= IORESOURCE_PREFETCH;
  123. return flags;
  124. }
  125. static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
  126. int pna)
  127. {
  128. u64 cp, s, da;
  129. unsigned int af, rf;
  130. af = of_bus_pci_get_flags(addr);
  131. rf = of_bus_pci_get_flags(range);
  132. /* Check address type match */
  133. if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
  134. return OF_BAD_ADDR;
  135. /* Read address values, skipping high cell */
  136. cp = of_read_number(range + 1, na - 1);
  137. s = of_read_number(range + na + pna, ns);
  138. da = of_read_number(addr + 1, na - 1);
  139. pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n",
  140. (unsigned long long)cp, (unsigned long long)s,
  141. (unsigned long long)da);
  142. if (da < cp || da >= (cp + s))
  143. return OF_BAD_ADDR;
  144. return da - cp;
  145. }
  146. static int of_bus_pci_translate(__be32 *addr, u64 offset, int na)
  147. {
  148. return of_bus_default_translate(addr + 1, offset, na - 1);
  149. }
  150. const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
  151. unsigned int *flags)
  152. {
  153. const __be32 *prop;
  154. unsigned int psize;
  155. struct device_node *parent;
  156. struct of_bus *bus;
  157. int onesize, i, na, ns;
  158. /* Get parent & match bus type */
  159. parent = of_get_parent(dev);
  160. if (parent == NULL)
  161. return NULL;
  162. bus = of_match_bus(parent);
  163. if (strcmp(bus->name, "pci")) {
  164. of_node_put(parent);
  165. return NULL;
  166. }
  167. bus->count_cells(dev, &na, &ns);
  168. of_node_put(parent);
  169. if (!OF_CHECK_ADDR_COUNT(na))
  170. return NULL;
  171. /* Get "reg" or "assigned-addresses" property */
  172. prop = of_get_property(dev, bus->addresses, &psize);
  173. if (prop == NULL)
  174. return NULL;
  175. psize /= 4;
  176. onesize = na + ns;
  177. for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
  178. u32 val = be32_to_cpu(prop[0]);
  179. if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
  180. if (size)
  181. *size = of_read_number(prop + na, ns);
  182. if (flags)
  183. *flags = bus->get_flags(prop);
  184. return prop;
  185. }
  186. }
  187. return NULL;
  188. }
  189. EXPORT_SYMBOL(of_get_pci_address);
  190. int of_pci_address_to_resource(struct device_node *dev, int bar,
  191. struct resource *r)
  192. {
  193. const __be32 *addrp;
  194. u64 size;
  195. unsigned int flags;
  196. addrp = of_get_pci_address(dev, bar, &size, &flags);
  197. if (addrp == NULL)
  198. return -EINVAL;
  199. return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
  200. }
  201. EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
  202. static int parser_init(struct of_pci_range_parser *parser,
  203. struct device_node *node, const char *name)
  204. {
  205. const int na = 3, ns = 2;
  206. int rlen;
  207. parser->node = node;
  208. parser->pna = of_n_addr_cells(node);
  209. parser->np = parser->pna + na + ns;
  210. parser->range = of_get_property(node, name, &rlen);
  211. if (parser->range == NULL)
  212. return -ENOENT;
  213. parser->end = parser->range + rlen / sizeof(__be32);
  214. return 0;
  215. }
  216. int of_pci_range_parser_init(struct of_pci_range_parser *parser,
  217. struct device_node *node)
  218. {
  219. return parser_init(parser, node, "ranges");
  220. }
  221. EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
  222. int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser,
  223. struct device_node *node)
  224. {
  225. return parser_init(parser, node, "dma-ranges");
  226. }
  227. EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init);
  228. struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
  229. struct of_pci_range *range)
  230. {
  231. const int na = 3, ns = 2;
  232. if (!range)
  233. return NULL;
  234. if (!parser->range || parser->range + parser->np > parser->end)
  235. return NULL;
  236. range->pci_space = be32_to_cpup(parser->range);
  237. range->flags = of_bus_pci_get_flags(parser->range);
  238. range->pci_addr = of_read_number(parser->range + 1, ns);
  239. range->cpu_addr = of_translate_address(parser->node,
  240. parser->range + na);
  241. range->size = of_read_number(parser->range + parser->pna + na, ns);
  242. parser->range += parser->np;
  243. /* Now consume following elements while they are contiguous */
  244. while (parser->range + parser->np <= parser->end) {
  245. u32 flags;
  246. u64 pci_addr, cpu_addr, size;
  247. flags = of_bus_pci_get_flags(parser->range);
  248. pci_addr = of_read_number(parser->range + 1, ns);
  249. cpu_addr = of_translate_address(parser->node,
  250. parser->range + na);
  251. size = of_read_number(parser->range + parser->pna + na, ns);
  252. if (flags != range->flags)
  253. break;
  254. if (pci_addr != range->pci_addr + range->size ||
  255. cpu_addr != range->cpu_addr + range->size)
  256. break;
  257. range->size += size;
  258. parser->range += parser->np;
  259. }
  260. return range;
  261. }
  262. EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
  263. /*
  264. * of_pci_range_to_resource - Create a resource from an of_pci_range
  265. * @range: the PCI range that describes the resource
  266. * @np: device node where the range belongs to
  267. * @res: pointer to a valid resource that will be updated to
  268. * reflect the values contained in the range.
  269. *
  270. * Returns EINVAL if the range cannot be converted to resource.
  271. *
  272. * Note that if the range is an IO range, the resource will be converted
  273. * using pci_address_to_pio() which can fail if it is called too early or
  274. * if the range cannot be matched to any host bridge IO space (our case here).
  275. * To guard against that we try to register the IO range first.
  276. * If that fails we know that pci_address_to_pio() will do too.
  277. */
  278. int of_pci_range_to_resource(struct of_pci_range *range,
  279. struct device_node *np, struct resource *res)
  280. {
  281. int err;
  282. res->flags = range->flags;
  283. res->parent = res->child = res->sibling = NULL;
  284. res->name = np->full_name;
  285. if (res->flags & IORESOURCE_IO) {
  286. unsigned long port;
  287. err = pci_register_io_range(&np->fwnode, range->cpu_addr,
  288. range->size);
  289. if (err)
  290. goto invalid_range;
  291. port = pci_address_to_pio(range->cpu_addr);
  292. if (port == (unsigned long)-1) {
  293. err = -EINVAL;
  294. goto invalid_range;
  295. }
  296. res->start = port;
  297. } else {
  298. if ((sizeof(resource_size_t) < 8) &&
  299. upper_32_bits(range->cpu_addr)) {
  300. err = -EINVAL;
  301. goto invalid_range;
  302. }
  303. res->start = range->cpu_addr;
  304. }
  305. res->end = res->start + range->size - 1;
  306. return 0;
  307. invalid_range:
  308. res->start = (resource_size_t)OF_BAD_ADDR;
  309. res->end = (resource_size_t)OF_BAD_ADDR;
  310. return err;
  311. }
  312. EXPORT_SYMBOL(of_pci_range_to_resource);
  313. #endif /* CONFIG_PCI */
  314. /*
  315. * ISA bus specific translator
  316. */
  317. static int of_bus_isa_match(struct device_node *np)
  318. {
  319. return of_node_name_eq(np, "isa");
  320. }
  321. static void of_bus_isa_count_cells(struct device_node *child,
  322. int *addrc, int *sizec)
  323. {
  324. if (addrc)
  325. *addrc = 2;
  326. if (sizec)
  327. *sizec = 1;
  328. }
  329. static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
  330. int pna)
  331. {
  332. u64 cp, s, da;
  333. /* Check address type match */
  334. if ((addr[0] ^ range[0]) & cpu_to_be32(1))
  335. return OF_BAD_ADDR;
  336. /* Read address values, skipping high cell */
  337. cp = of_read_number(range + 1, na - 1);
  338. s = of_read_number(range + na + pna, ns);
  339. da = of_read_number(addr + 1, na - 1);
  340. pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n",
  341. (unsigned long long)cp, (unsigned long long)s,
  342. (unsigned long long)da);
  343. if (da < cp || da >= (cp + s))
  344. return OF_BAD_ADDR;
  345. return da - cp;
  346. }
  347. static int of_bus_isa_translate(__be32 *addr, u64 offset, int na)
  348. {
  349. return of_bus_default_translate(addr + 1, offset, na - 1);
  350. }
  351. static unsigned int of_bus_isa_get_flags(const __be32 *addr)
  352. {
  353. unsigned int flags = 0;
  354. u32 w = be32_to_cpup(addr);
  355. if (w & 1)
  356. flags |= IORESOURCE_IO;
  357. else
  358. flags |= IORESOURCE_MEM;
  359. return flags;
  360. }
  361. /*
  362. * Array of bus specific translators
  363. */
  364. static struct of_bus of_busses[] = {
  365. #ifdef CONFIG_PCI
  366. /* PCI */
  367. {
  368. .name = "pci",
  369. .addresses = "assigned-addresses",
  370. .match = of_bus_pci_match,
  371. .count_cells = of_bus_pci_count_cells,
  372. .map = of_bus_pci_map,
  373. .translate = of_bus_pci_translate,
  374. .get_flags = of_bus_pci_get_flags,
  375. },
  376. #endif /* CONFIG_PCI */
  377. /* ISA */
  378. {
  379. .name = "isa",
  380. .addresses = "reg",
  381. .match = of_bus_isa_match,
  382. .count_cells = of_bus_isa_count_cells,
  383. .map = of_bus_isa_map,
  384. .translate = of_bus_isa_translate,
  385. .get_flags = of_bus_isa_get_flags,
  386. },
  387. /* Default */
  388. {
  389. .name = "default",
  390. .addresses = "reg",
  391. .match = NULL,
  392. .count_cells = of_bus_default_count_cells,
  393. .map = of_bus_default_map,
  394. .translate = of_bus_default_translate,
  395. .get_flags = of_bus_default_get_flags,
  396. },
  397. };
  398. static struct of_bus *of_match_bus(struct device_node *np)
  399. {
  400. int i;
  401. for (i = 0; i < ARRAY_SIZE(of_busses); i++)
  402. if (!of_busses[i].match || of_busses[i].match(np))
  403. return &of_busses[i];
  404. BUG();
  405. return NULL;
  406. }
  407. static int of_empty_ranges_quirk(struct device_node *np)
  408. {
  409. if (IS_ENABLED(CONFIG_PPC)) {
  410. /* To save cycles, we cache the result for global "Mac" setting */
  411. static int quirk_state = -1;
  412. /* PA-SEMI sdc DT bug */
  413. if (of_device_is_compatible(np, "1682m-sdc"))
  414. return true;
  415. /* Make quirk cached */
  416. if (quirk_state < 0)
  417. quirk_state =
  418. of_machine_is_compatible("Power Macintosh") ||
  419. of_machine_is_compatible("MacRISC");
  420. return quirk_state;
  421. }
  422. return false;
  423. }
  424. static int of_translate_one(struct device_node *parent, struct of_bus *bus,
  425. struct of_bus *pbus, __be32 *addr,
  426. int na, int ns, int pna, const char *rprop)
  427. {
  428. const __be32 *ranges;
  429. unsigned int rlen;
  430. int rone;
  431. u64 offset = OF_BAD_ADDR;
  432. /*
  433. * Normally, an absence of a "ranges" property means we are
  434. * crossing a non-translatable boundary, and thus the addresses
  435. * below the current cannot be converted to CPU physical ones.
  436. * Unfortunately, while this is very clear in the spec, it's not
  437. * what Apple understood, and they do have things like /uni-n or
  438. * /ht nodes with no "ranges" property and a lot of perfectly
  439. * useable mapped devices below them. Thus we treat the absence of
  440. * "ranges" as equivalent to an empty "ranges" property which means
  441. * a 1:1 translation at that level. It's up to the caller not to try
  442. * to translate addresses that aren't supposed to be translated in
  443. * the first place. --BenH.
  444. *
  445. * As far as we know, this damage only exists on Apple machines, so
  446. * This code is only enabled on powerpc. --gcl
  447. */
  448. ranges = of_get_property(parent, rprop, &rlen);
  449. if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
  450. pr_debug("no ranges; cannot translate\n");
  451. return 1;
  452. }
  453. if (ranges == NULL || rlen == 0) {
  454. offset = of_read_number(addr, na);
  455. memset(addr, 0, pna * 4);
  456. pr_debug("empty ranges; 1:1 translation\n");
  457. goto finish;
  458. }
  459. pr_debug("walking ranges...\n");
  460. /* Now walk through the ranges */
  461. rlen /= 4;
  462. rone = na + pna + ns;
  463. for (; rlen >= rone; rlen -= rone, ranges += rone) {
  464. offset = bus->map(addr, ranges, na, ns, pna);
  465. if (offset != OF_BAD_ADDR)
  466. break;
  467. }
  468. if (offset == OF_BAD_ADDR) {
  469. pr_debug("not found !\n");
  470. return 1;
  471. }
  472. memcpy(addr, ranges + na, 4 * pna);
  473. finish:
  474. of_dump_addr("parent translation for:", addr, pna);
  475. pr_debug("with offset: %llx\n", (unsigned long long)offset);
  476. /* Translate it into parent bus space */
  477. return pbus->translate(addr, offset, pna);
  478. }
  479. /*
  480. * Translate an address from the device-tree into a CPU physical address,
  481. * this walks up the tree and applies the various bus mappings on the
  482. * way.
  483. *
  484. * Note: We consider that crossing any level with #size-cells == 0 to mean
  485. * that translation is impossible (that is we are not dealing with a value
  486. * that can be mapped to a cpu physical address). This is not really specified
  487. * that way, but this is traditionally the way IBM at least do things
  488. *
  489. * Whenever the translation fails, the *host pointer will be set to the
  490. * device that had registered logical PIO mapping, and the return code is
  491. * relative to that node.
  492. */
  493. static u64 __of_translate_address(struct device_node *dev,
  494. struct device_node *(*get_parent)(const struct device_node *),
  495. const __be32 *in_addr, const char *rprop,
  496. struct device_node **host)
  497. {
  498. struct device_node *parent = NULL;
  499. struct of_bus *bus, *pbus;
  500. __be32 addr[OF_MAX_ADDR_CELLS];
  501. int na, ns, pna, pns;
  502. u64 result = OF_BAD_ADDR;
  503. pr_debug("** translation for device %pOF **\n", dev);
  504. /* Increase refcount at current level */
  505. of_node_get(dev);
  506. *host = NULL;
  507. /* Get parent & match bus type */
  508. parent = get_parent(dev);
  509. if (parent == NULL)
  510. goto bail;
  511. bus = of_match_bus(parent);
  512. /* Count address cells & copy address locally */
  513. bus->count_cells(dev, &na, &ns);
  514. if (!OF_CHECK_COUNTS(na, ns)) {
  515. pr_debug("Bad cell count for %pOF\n", dev);
  516. goto bail;
  517. }
  518. memcpy(addr, in_addr, na * 4);
  519. pr_debug("bus is %s (na=%d, ns=%d) on %pOF\n",
  520. bus->name, na, ns, parent);
  521. of_dump_addr("translating address:", addr, na);
  522. /* Translate */
  523. for (;;) {
  524. struct logic_pio_hwaddr *iorange;
  525. /* Switch to parent bus */
  526. of_node_put(dev);
  527. dev = parent;
  528. parent = get_parent(dev);
  529. /* If root, we have finished */
  530. if (parent == NULL) {
  531. pr_debug("reached root node\n");
  532. result = of_read_number(addr, na);
  533. break;
  534. }
  535. /*
  536. * For indirectIO device which has no ranges property, get
  537. * the address from reg directly.
  538. */
  539. iorange = find_io_range_by_fwnode(&dev->fwnode);
  540. if (iorange && (iorange->flags != LOGIC_PIO_CPU_MMIO)) {
  541. result = of_read_number(addr + 1, na - 1);
  542. pr_debug("indirectIO matched(%pOF) 0x%llx\n",
  543. dev, result);
  544. *host = of_node_get(dev);
  545. break;
  546. }
  547. /* Get new parent bus and counts */
  548. pbus = of_match_bus(parent);
  549. pbus->count_cells(dev, &pna, &pns);
  550. if (!OF_CHECK_COUNTS(pna, pns)) {
  551. pr_err("Bad cell count for %pOF\n", dev);
  552. break;
  553. }
  554. pr_debug("parent bus is %s (na=%d, ns=%d) on %pOF\n",
  555. pbus->name, pna, pns, parent);
  556. /* Apply bus translation */
  557. if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
  558. break;
  559. /* Complete the move up one level */
  560. na = pna;
  561. ns = pns;
  562. bus = pbus;
  563. of_dump_addr("one level translation:", addr, na);
  564. }
  565. bail:
  566. of_node_put(parent);
  567. of_node_put(dev);
  568. return result;
  569. }
  570. u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
  571. {
  572. struct device_node *host;
  573. u64 ret;
  574. ret = __of_translate_address(dev, of_get_parent,
  575. in_addr, "ranges", &host);
  576. if (host) {
  577. of_node_put(host);
  578. return OF_BAD_ADDR;
  579. }
  580. return ret;
  581. }
  582. EXPORT_SYMBOL(of_translate_address);
  583. static struct device_node *__of_get_dma_parent(const struct device_node *np)
  584. {
  585. struct of_phandle_args args;
  586. int ret, index;
  587. index = of_property_match_string(np, "interconnect-names", "dma-mem");
  588. if (index < 0)
  589. return of_get_parent(np);
  590. ret = of_parse_phandle_with_args(np, "interconnects",
  591. "#interconnect-cells",
  592. index, &args);
  593. if (ret < 0)
  594. return of_get_parent(np);
  595. return of_node_get(args.np);
  596. }
  597. u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
  598. {
  599. struct device_node *host;
  600. u64 ret;
  601. ret = __of_translate_address(dev, __of_get_dma_parent,
  602. in_addr, "dma-ranges", &host);
  603. if (host) {
  604. of_node_put(host);
  605. return OF_BAD_ADDR;
  606. }
  607. return ret;
  608. }
  609. EXPORT_SYMBOL(of_translate_dma_address);
  610. const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
  611. unsigned int *flags)
  612. {
  613. const __be32 *prop;
  614. unsigned int psize;
  615. struct device_node *parent;
  616. struct of_bus *bus;
  617. int onesize, i, na, ns;
  618. /* Get parent & match bus type */
  619. parent = of_get_parent(dev);
  620. if (parent == NULL)
  621. return NULL;
  622. bus = of_match_bus(parent);
  623. bus->count_cells(dev, &na, &ns);
  624. of_node_put(parent);
  625. if (!OF_CHECK_ADDR_COUNT(na))
  626. return NULL;
  627. /* Get "reg" or "assigned-addresses" property */
  628. prop = of_get_property(dev, bus->addresses, &psize);
  629. if (prop == NULL)
  630. return NULL;
  631. psize /= 4;
  632. onesize = na + ns;
  633. for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
  634. if (i == index) {
  635. if (size)
  636. *size = of_read_number(prop + na, ns);
  637. if (flags)
  638. *flags = bus->get_flags(prop);
  639. return prop;
  640. }
  641. return NULL;
  642. }
  643. EXPORT_SYMBOL(of_get_address);
  644. static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr,
  645. u64 size)
  646. {
  647. u64 taddr;
  648. unsigned long port;
  649. struct device_node *host;
  650. taddr = __of_translate_address(dev, of_get_parent,
  651. in_addr, "ranges", &host);
  652. if (host) {
  653. /* host-specific port access */
  654. port = logic_pio_trans_hwaddr(&host->fwnode, taddr, size);
  655. of_node_put(host);
  656. } else {
  657. /* memory-mapped I/O range */
  658. port = pci_address_to_pio(taddr);
  659. }
  660. if (port == (unsigned long)-1)
  661. return OF_BAD_ADDR;
  662. return port;
  663. }
  664. static int __of_address_to_resource(struct device_node *dev,
  665. const __be32 *addrp, u64 size, unsigned int flags,
  666. const char *name, struct resource *r)
  667. {
  668. u64 taddr;
  669. if (flags & IORESOURCE_MEM)
  670. taddr = of_translate_address(dev, addrp);
  671. else if (flags & IORESOURCE_IO)
  672. taddr = of_translate_ioport(dev, addrp, size);
  673. else
  674. return -EINVAL;
  675. if (taddr == OF_BAD_ADDR)
  676. return -EINVAL;
  677. memset(r, 0, sizeof(struct resource));
  678. r->start = taddr;
  679. r->end = taddr + size - 1;
  680. r->flags = flags;
  681. r->name = name ? name : dev->full_name;
  682. return 0;
  683. }
  684. /**
  685. * of_address_to_resource - Translate device tree address and return as resource
  686. *
  687. * Note that if your address is a PIO address, the conversion will fail if
  688. * the physical address can't be internally converted to an IO token with
  689. * pci_address_to_pio(), that is because it's either called too early or it
  690. * can't be matched to any host bridge IO space
  691. */
  692. int of_address_to_resource(struct device_node *dev, int index,
  693. struct resource *r)
  694. {
  695. const __be32 *addrp;
  696. u64 size;
  697. unsigned int flags;
  698. const char *name = NULL;
  699. addrp = of_get_address(dev, index, &size, &flags);
  700. if (addrp == NULL)
  701. return -EINVAL;
  702. /* Get optional "reg-names" property to add a name to a resource */
  703. of_property_read_string_index(dev, "reg-names", index, &name);
  704. return __of_address_to_resource(dev, addrp, size, flags, name, r);
  705. }
  706. EXPORT_SYMBOL_GPL(of_address_to_resource);
  707. struct device_node *of_find_matching_node_by_address(struct device_node *from,
  708. const struct of_device_id *matches,
  709. u64 base_address)
  710. {
  711. struct device_node *dn = of_find_matching_node(from, matches);
  712. struct resource res;
  713. while (dn) {
  714. if (!of_address_to_resource(dn, 0, &res) &&
  715. res.start == base_address)
  716. return dn;
  717. dn = of_find_matching_node(dn, matches);
  718. }
  719. return NULL;
  720. }
  721. /**
  722. * of_iomap - Maps the memory mapped IO for a given device_node
  723. * @device: the device whose io range will be mapped
  724. * @index: index of the io range
  725. *
  726. * Returns a pointer to the mapped memory
  727. */
  728. void __iomem *of_iomap(struct device_node *np, int index)
  729. {
  730. struct resource res;
  731. if (of_address_to_resource(np, index, &res))
  732. return NULL;
  733. return ioremap(res.start, resource_size(&res));
  734. }
  735. EXPORT_SYMBOL(of_iomap);
  736. /*
  737. * of_io_request_and_map - Requests a resource and maps the memory mapped IO
  738. * for a given device_node
  739. * @device: the device whose io range will be mapped
  740. * @index: index of the io range
  741. * @name: name "override" for the memory region request or NULL
  742. *
  743. * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
  744. * error code on failure. Usage example:
  745. *
  746. * base = of_io_request_and_map(node, 0, "foo");
  747. * if (IS_ERR(base))
  748. * return PTR_ERR(base);
  749. */
  750. void __iomem *of_io_request_and_map(struct device_node *np, int index,
  751. const char *name)
  752. {
  753. struct resource res;
  754. void __iomem *mem;
  755. if (of_address_to_resource(np, index, &res))
  756. return IOMEM_ERR_PTR(-EINVAL);
  757. if (!name)
  758. name = res.name;
  759. if (!request_mem_region(res.start, resource_size(&res), name))
  760. return IOMEM_ERR_PTR(-EBUSY);
  761. mem = ioremap(res.start, resource_size(&res));
  762. if (!mem) {
  763. release_mem_region(res.start, resource_size(&res));
  764. return IOMEM_ERR_PTR(-ENOMEM);
  765. }
  766. return mem;
  767. }
  768. EXPORT_SYMBOL(of_io_request_and_map);
  769. /**
  770. * of_dma_get_range - Get DMA range info
  771. * @np: device node to get DMA range info
  772. * @dma_addr: pointer to store initial DMA address of DMA range
  773. * @paddr: pointer to store initial CPU address of DMA range
  774. * @size: pointer to store size of DMA range
  775. *
  776. * Look in bottom up direction for the first "dma-ranges" property
  777. * and parse it.
  778. * dma-ranges format:
  779. * DMA addr (dma_addr) : naddr cells
  780. * CPU addr (phys_addr_t) : pna cells
  781. * size : nsize cells
  782. *
  783. * It returns -ENODEV if "dma-ranges" property was not found
  784. * for this device in DT.
  785. */
  786. int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size)
  787. {
  788. struct device_node *node = of_node_get(np);
  789. const __be32 *ranges = NULL;
  790. int len, naddr, nsize, pna;
  791. int ret = 0;
  792. u64 dmaaddr;
  793. if (!node)
  794. return -EINVAL;
  795. while (1) {
  796. struct device_node *parent;
  797. naddr = of_n_addr_cells(node);
  798. nsize = of_n_size_cells(node);
  799. parent = __of_get_dma_parent(node);
  800. of_node_put(node);
  801. node = parent;
  802. if (!node)
  803. break;
  804. ranges = of_get_property(node, "dma-ranges", &len);
  805. /* Ignore empty ranges, they imply no translation required */
  806. if (ranges && len > 0)
  807. break;
  808. /*
  809. * At least empty ranges has to be defined for parent node if
  810. * DMA is supported
  811. */
  812. if (!ranges)
  813. break;
  814. }
  815. if (!ranges) {
  816. pr_debug("no dma-ranges found for node(%pOF)\n", np);
  817. ret = -ENODEV;
  818. goto out;
  819. }
  820. len /= sizeof(u32);
  821. pna = of_n_addr_cells(node);
  822. /* dma-ranges format:
  823. * DMA addr : naddr cells
  824. * CPU addr : pna cells
  825. * size : nsize cells
  826. */
  827. dmaaddr = of_read_number(ranges, naddr);
  828. *paddr = of_translate_dma_address(np, ranges);
  829. if (*paddr == OF_BAD_ADDR) {
  830. pr_err("translation of DMA address(%pad) to CPU address failed node(%pOF)\n",
  831. dma_addr, np);
  832. ret = -EINVAL;
  833. goto out;
  834. }
  835. *dma_addr = dmaaddr;
  836. *size = of_read_number(ranges + naddr + pna, nsize);
  837. pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
  838. *dma_addr, *paddr, *size);
  839. out:
  840. of_node_put(node);
  841. return ret;
  842. }
  843. EXPORT_SYMBOL_GPL(of_dma_get_range);
  844. /**
  845. * of_dma_is_coherent - Check if device is coherent
  846. * @np: device node
  847. *
  848. * It returns true if "dma-coherent" property was found
  849. * for this device in the DT, or if DMA is coherent by
  850. * default for OF devices on the current platform.
  851. */
  852. bool of_dma_is_coherent(struct device_node *np)
  853. {
  854. struct device_node *node;
  855. if (IS_ENABLED(CONFIG_OF_DMA_DEFAULT_COHERENT))
  856. return true;
  857. node = of_node_get(np);
  858. while (node) {
  859. if (of_property_read_bool(node, "dma-coherent")) {
  860. of_node_put(node);
  861. return true;
  862. }
  863. node = of_get_next_parent(node);
  864. }
  865. of_node_put(node);
  866. return false;
  867. }
  868. EXPORT_SYMBOL_GPL(of_dma_is_coherent);