xilinx_gmii2rgmii.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /* Xilinx GMII2RGMII Converter driver
  3. *
  4. * Copyright (C) 2016 Xilinx, Inc.
  5. * Copyright (C) 2016 Andrew Lunn <andrew@lunn.ch>
  6. *
  7. * Author: Andrew Lunn <andrew@lunn.ch>
  8. * Author: Kedareswara rao Appana <appanad@xilinx.com>
  9. *
  10. * Description:
  11. * This driver is developed for Xilinx GMII2RGMII Converter
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/mii.h>
  16. #include <linux/mdio.h>
  17. #include <linux/phy.h>
  18. #include <linux/of_mdio.h>
  19. #define XILINX_GMII2RGMII_REG 0x10
  20. #define XILINX_GMII2RGMII_SPEED_MASK (BMCR_SPEED1000 | BMCR_SPEED100)
  21. struct gmii2rgmii {
  22. struct phy_device *phy_dev;
  23. struct phy_driver *phy_drv;
  24. struct phy_driver conv_phy_drv;
  25. struct mdio_device *mdio;
  26. };
  27. static int xgmiitorgmii_read_status(struct phy_device *phydev)
  28. {
  29. struct gmii2rgmii *priv = mdiodev_get_drvdata(&phydev->mdio);
  30. struct mii_bus *bus = priv->mdio->bus;
  31. int addr = priv->mdio->addr;
  32. u16 val = 0;
  33. int err;
  34. if (priv->phy_drv->read_status)
  35. err = priv->phy_drv->read_status(phydev);
  36. else
  37. err = genphy_read_status(phydev);
  38. if (err < 0)
  39. return err;
  40. val = mdiobus_read(bus, addr, XILINX_GMII2RGMII_REG);
  41. val &= ~XILINX_GMII2RGMII_SPEED_MASK;
  42. if (phydev->speed == SPEED_1000)
  43. val |= BMCR_SPEED1000;
  44. else if (phydev->speed == SPEED_100)
  45. val |= BMCR_SPEED100;
  46. else
  47. val |= BMCR_SPEED10;
  48. mdiobus_write(bus, addr, XILINX_GMII2RGMII_REG, val);
  49. return 0;
  50. }
  51. static int xgmiitorgmii_probe(struct mdio_device *mdiodev)
  52. {
  53. struct device *dev = &mdiodev->dev;
  54. struct device_node *np = dev->of_node, *phy_node;
  55. struct gmii2rgmii *priv;
  56. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  57. if (!priv)
  58. return -ENOMEM;
  59. phy_node = of_parse_phandle(np, "phy-handle", 0);
  60. if (!phy_node) {
  61. dev_err(dev, "Couldn't parse phy-handle\n");
  62. return -ENODEV;
  63. }
  64. priv->phy_dev = of_phy_find_device(phy_node);
  65. of_node_put(phy_node);
  66. if (!priv->phy_dev) {
  67. dev_info(dev, "Couldn't find phydev\n");
  68. return -EPROBE_DEFER;
  69. }
  70. if (!priv->phy_dev->drv) {
  71. dev_info(dev, "Attached phy not ready\n");
  72. return -EPROBE_DEFER;
  73. }
  74. priv->mdio = mdiodev;
  75. priv->phy_drv = priv->phy_dev->drv;
  76. memcpy(&priv->conv_phy_drv, priv->phy_dev->drv,
  77. sizeof(struct phy_driver));
  78. priv->conv_phy_drv.read_status = xgmiitorgmii_read_status;
  79. mdiodev_set_drvdata(&priv->phy_dev->mdio, priv);
  80. priv->phy_dev->drv = &priv->conv_phy_drv;
  81. return 0;
  82. }
  83. static const struct of_device_id xgmiitorgmii_of_match[] = {
  84. { .compatible = "xlnx,gmii-to-rgmii-1.0" },
  85. {},
  86. };
  87. MODULE_DEVICE_TABLE(of, xgmiitorgmii_of_match);
  88. static struct mdio_driver xgmiitorgmii_driver = {
  89. .probe = xgmiitorgmii_probe,
  90. .mdiodrv.driver = {
  91. .name = "xgmiitorgmii",
  92. .of_match_table = xgmiitorgmii_of_match,
  93. },
  94. };
  95. mdio_module_driver(xgmiitorgmii_driver);
  96. MODULE_DESCRIPTION("Xilinx GMII2RGMII converter driver");
  97. MODULE_LICENSE("GPL");