janz-ican3.c 50 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
  4. *
  5. * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/delay.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/netdevice.h>
  13. #include <linux/can.h>
  14. #include <linux/can/dev.h>
  15. #include <linux/can/skb.h>
  16. #include <linux/can/error.h>
  17. #include <linux/mfd/janz.h>
  18. #include <asm/io.h>
  19. /* the DPM has 64k of memory, organized into 256x 256 byte pages */
  20. #define DPM_NUM_PAGES 256
  21. #define DPM_PAGE_SIZE 256
  22. #define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
  23. /* JANZ ICAN3 "old-style" host interface queue page numbers */
  24. #define QUEUE_OLD_CONTROL 0
  25. #define QUEUE_OLD_RB0 1
  26. #define QUEUE_OLD_RB1 2
  27. #define QUEUE_OLD_WB0 3
  28. #define QUEUE_OLD_WB1 4
  29. /* Janz ICAN3 "old-style" host interface control registers */
  30. #define MSYNC_PEER 0x00 /* ICAN only */
  31. #define MSYNC_LOCL 0x01 /* host only */
  32. #define TARGET_RUNNING 0x02
  33. #define FIRMWARE_STAMP 0x60 /* big endian firmware stamp */
  34. #define MSYNC_RB0 0x01
  35. #define MSYNC_RB1 0x02
  36. #define MSYNC_RBLW 0x04
  37. #define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
  38. #define MSYNC_WB0 0x10
  39. #define MSYNC_WB1 0x20
  40. #define MSYNC_WBLW 0x40
  41. #define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
  42. /* Janz ICAN3 "new-style" host interface queue page numbers */
  43. #define QUEUE_TOHOST 5
  44. #define QUEUE_FROMHOST_MID 6
  45. #define QUEUE_FROMHOST_HIGH 7
  46. #define QUEUE_FROMHOST_LOW 8
  47. /* The first free page in the DPM is #9 */
  48. #define DPM_FREE_START 9
  49. /* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
  50. #define DESC_VALID 0x80
  51. #define DESC_WRAP 0x40
  52. #define DESC_INTERRUPT 0x20
  53. #define DESC_IVALID 0x10
  54. #define DESC_LEN(len) (len)
  55. /* Janz ICAN3 Firmware Messages */
  56. #define MSG_CONNECTI 0x02
  57. #define MSG_DISCONNECT 0x03
  58. #define MSG_IDVERS 0x04
  59. #define MSG_MSGLOST 0x05
  60. #define MSG_NEWHOSTIF 0x08
  61. #define MSG_INQUIRY 0x0a
  62. #define MSG_SETAFILMASK 0x10
  63. #define MSG_INITFDPMQUEUE 0x11
  64. #define MSG_HWCONF 0x12
  65. #define MSG_FMSGLOST 0x15
  66. #define MSG_CEVTIND 0x37
  67. #define MSG_CBTRREQ 0x41
  68. #define MSG_COFFREQ 0x42
  69. #define MSG_CONREQ 0x43
  70. #define MSG_CCONFREQ 0x47
  71. #define MSG_NMTS 0xb0
  72. #define MSG_LMTS 0xb4
  73. /*
  74. * Janz ICAN3 CAN Inquiry Message Types
  75. *
  76. * NOTE: there appears to be a firmware bug here. You must send
  77. * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
  78. * NOTE: response. The controller never responds to a message with
  79. * NOTE: the INQUIRY_EXTENDED subspec :(
  80. */
  81. #define INQUIRY_STATUS 0x00
  82. #define INQUIRY_TERMINATION 0x01
  83. #define INQUIRY_EXTENDED 0x04
  84. /* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
  85. #define SETAFILMASK_REJECT 0x00
  86. #define SETAFILMASK_FASTIF 0x02
  87. /* Janz ICAN3 CAN Hardware Configuration Message Types */
  88. #define HWCONF_TERMINATE_ON 0x01
  89. #define HWCONF_TERMINATE_OFF 0x00
  90. /* Janz ICAN3 CAN Event Indication Message Types */
  91. #define CEVTIND_EI 0x01
  92. #define CEVTIND_DOI 0x02
  93. #define CEVTIND_LOST 0x04
  94. #define CEVTIND_FULL 0x08
  95. #define CEVTIND_BEI 0x10
  96. #define CEVTIND_CHIP_SJA1000 0x02
  97. #define ICAN3_BUSERR_QUOTA_MAX 255
  98. /* Janz ICAN3 CAN Frame Conversion */
  99. #define ICAN3_SNGL 0x02
  100. #define ICAN3_ECHO 0x10
  101. #define ICAN3_EFF_RTR 0x40
  102. #define ICAN3_SFF_RTR 0x10
  103. #define ICAN3_EFF 0x80
  104. #define ICAN3_CAN_TYPE_MASK 0x0f
  105. #define ICAN3_CAN_TYPE_SFF 0x00
  106. #define ICAN3_CAN_TYPE_EFF 0x01
  107. #define ICAN3_CAN_DLC_MASK 0x0f
  108. /* Janz ICAN3 NMTS subtypes */
  109. #define NMTS_CREATE_NODE_REQ 0x0
  110. #define NMTS_SLAVE_STATE_IND 0x8
  111. #define NMTS_SLAVE_EVENT_IND 0x9
  112. /* Janz ICAN3 LMTS subtypes */
  113. #define LMTS_BUSON_REQ 0x0
  114. #define LMTS_BUSOFF_REQ 0x1
  115. #define LMTS_CAN_CONF_REQ 0x2
  116. /* Janz ICAN3 NMTS Event indications */
  117. #define NE_LOCAL_OCCURRED 0x3
  118. #define NE_LOCAL_RESOLVED 0x2
  119. #define NE_REMOTE_OCCURRED 0xc
  120. #define NE_REMOTE_RESOLVED 0x8
  121. /*
  122. * SJA1000 Status and Error Register Definitions
  123. *
  124. * Copied from drivers/net/can/sja1000/sja1000.h
  125. */
  126. /* status register content */
  127. #define SR_BS 0x80
  128. #define SR_ES 0x40
  129. #define SR_TS 0x20
  130. #define SR_RS 0x10
  131. #define SR_TCS 0x08
  132. #define SR_TBS 0x04
  133. #define SR_DOS 0x02
  134. #define SR_RBS 0x01
  135. #define SR_CRIT (SR_BS|SR_ES)
  136. /* ECC register */
  137. #define ECC_SEG 0x1F
  138. #define ECC_DIR 0x20
  139. #define ECC_ERR 6
  140. #define ECC_BIT 0x00
  141. #define ECC_FORM 0x40
  142. #define ECC_STUFF 0x80
  143. #define ECC_MASK 0xc0
  144. /* Number of buffers for use in the "new-style" host interface */
  145. #define ICAN3_NEW_BUFFERS 16
  146. /* Number of buffers for use in the "fast" host interface */
  147. #define ICAN3_TX_BUFFERS 512
  148. #define ICAN3_RX_BUFFERS 1024
  149. /* SJA1000 Clock Input */
  150. #define ICAN3_CAN_CLOCK 8000000
  151. /* Janz ICAN3 firmware types */
  152. enum ican3_fwtype {
  153. ICAN3_FWTYPE_ICANOS,
  154. ICAN3_FWTYPE_CAL_CANOPEN,
  155. };
  156. /* Driver Name */
  157. #define DRV_NAME "janz-ican3"
  158. /* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
  159. struct ican3_dpm_control {
  160. /* window address register */
  161. u8 window_address;
  162. u8 unused1;
  163. /*
  164. * Read access: clear interrupt from microcontroller
  165. * Write access: send interrupt to microcontroller
  166. */
  167. u8 interrupt;
  168. u8 unused2;
  169. /* write-only: reset all hardware on the module */
  170. u8 hwreset;
  171. u8 unused3;
  172. /* write-only: generate an interrupt to the TPU */
  173. u8 tpuinterrupt;
  174. };
  175. struct ican3_dev {
  176. /* must be the first member */
  177. struct can_priv can;
  178. /* CAN network device */
  179. struct net_device *ndev;
  180. struct napi_struct napi;
  181. /* module number */
  182. unsigned int num;
  183. /* base address of registers and IRQ */
  184. struct janz_cmodio_onboard_regs __iomem *ctrl;
  185. struct ican3_dpm_control __iomem *dpmctrl;
  186. void __iomem *dpm;
  187. int irq;
  188. /* CAN bus termination status */
  189. struct completion termination_comp;
  190. bool termination_enabled;
  191. /* CAN bus error status registers */
  192. struct completion buserror_comp;
  193. struct can_berr_counter bec;
  194. /* firmware type */
  195. enum ican3_fwtype fwtype;
  196. char fwinfo[32];
  197. /* old and new style host interface */
  198. unsigned int iftype;
  199. /* queue for echo packets */
  200. struct sk_buff_head echoq;
  201. /*
  202. * Any function which changes the current DPM page must hold this
  203. * lock while it is performing data accesses. This ensures that the
  204. * function will not be preempted and end up reading data from a
  205. * different DPM page than it expects.
  206. */
  207. spinlock_t lock;
  208. /* new host interface */
  209. unsigned int rx_int;
  210. unsigned int rx_num;
  211. unsigned int tx_num;
  212. /* fast host interface */
  213. unsigned int fastrx_start;
  214. unsigned int fastrx_num;
  215. unsigned int fasttx_start;
  216. unsigned int fasttx_num;
  217. /* first free DPM page */
  218. unsigned int free_page;
  219. };
  220. struct ican3_msg {
  221. u8 control;
  222. u8 spec;
  223. __le16 len;
  224. u8 data[252];
  225. };
  226. struct ican3_new_desc {
  227. u8 control;
  228. u8 pointer;
  229. };
  230. struct ican3_fast_desc {
  231. u8 control;
  232. u8 command;
  233. u8 data[14];
  234. };
  235. /* write to the window basic address register */
  236. static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
  237. {
  238. BUG_ON(page >= DPM_NUM_PAGES);
  239. iowrite8(page, &mod->dpmctrl->window_address);
  240. }
  241. /*
  242. * ICAN3 "old-style" host interface
  243. */
  244. /*
  245. * Receive a message from the ICAN3 "old-style" firmware interface
  246. *
  247. * LOCKING: must hold mod->lock
  248. *
  249. * returns 0 on success, -ENOMEM when no message exists
  250. */
  251. static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  252. {
  253. unsigned int mbox, mbox_page;
  254. u8 locl, peer, xord;
  255. /* get the MSYNC registers */
  256. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  257. peer = ioread8(mod->dpm + MSYNC_PEER);
  258. locl = ioread8(mod->dpm + MSYNC_LOCL);
  259. xord = locl ^ peer;
  260. if ((xord & MSYNC_RB_MASK) == 0x00) {
  261. netdev_dbg(mod->ndev, "no mbox for reading\n");
  262. return -ENOMEM;
  263. }
  264. /* find the first free mbox to read */
  265. if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
  266. mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
  267. else
  268. mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
  269. /* copy the message */
  270. mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
  271. ican3_set_page(mod, mbox_page);
  272. memcpy_fromio(msg, mod->dpm, sizeof(*msg));
  273. /*
  274. * notify the firmware that the read buffer is available
  275. * for it to fill again
  276. */
  277. locl ^= mbox;
  278. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  279. iowrite8(locl, mod->dpm + MSYNC_LOCL);
  280. return 0;
  281. }
  282. /*
  283. * Send a message through the "old-style" firmware interface
  284. *
  285. * LOCKING: must hold mod->lock
  286. *
  287. * returns 0 on success, -ENOMEM when no free space exists
  288. */
  289. static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  290. {
  291. unsigned int mbox, mbox_page;
  292. u8 locl, peer, xord;
  293. /* get the MSYNC registers */
  294. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  295. peer = ioread8(mod->dpm + MSYNC_PEER);
  296. locl = ioread8(mod->dpm + MSYNC_LOCL);
  297. xord = locl ^ peer;
  298. if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
  299. netdev_err(mod->ndev, "no mbox for writing\n");
  300. return -ENOMEM;
  301. }
  302. /* calculate a free mbox to use */
  303. mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
  304. /* copy the message to the DPM */
  305. mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
  306. ican3_set_page(mod, mbox_page);
  307. memcpy_toio(mod->dpm, msg, sizeof(*msg));
  308. locl ^= mbox;
  309. if (mbox == MSYNC_WB1)
  310. locl |= MSYNC_WBLW;
  311. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  312. iowrite8(locl, mod->dpm + MSYNC_LOCL);
  313. return 0;
  314. }
  315. /*
  316. * ICAN3 "new-style" Host Interface Setup
  317. */
  318. static void ican3_init_new_host_interface(struct ican3_dev *mod)
  319. {
  320. struct ican3_new_desc desc;
  321. unsigned long flags;
  322. void __iomem *dst;
  323. int i;
  324. spin_lock_irqsave(&mod->lock, flags);
  325. /* setup the internal datastructures for RX */
  326. mod->rx_num = 0;
  327. mod->rx_int = 0;
  328. /* tohost queue descriptors are in page 5 */
  329. ican3_set_page(mod, QUEUE_TOHOST);
  330. dst = mod->dpm;
  331. /* initialize the tohost (rx) queue descriptors: pages 9-24 */
  332. for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
  333. desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
  334. desc.pointer = mod->free_page;
  335. /* set wrap flag on last buffer */
  336. if (i == ICAN3_NEW_BUFFERS - 1)
  337. desc.control |= DESC_WRAP;
  338. memcpy_toio(dst, &desc, sizeof(desc));
  339. dst += sizeof(desc);
  340. mod->free_page++;
  341. }
  342. /* fromhost (tx) mid queue descriptors are in page 6 */
  343. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  344. dst = mod->dpm;
  345. /* setup the internal datastructures for TX */
  346. mod->tx_num = 0;
  347. /* initialize the fromhost mid queue descriptors: pages 25-40 */
  348. for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
  349. desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
  350. desc.pointer = mod->free_page;
  351. /* set wrap flag on last buffer */
  352. if (i == ICAN3_NEW_BUFFERS - 1)
  353. desc.control |= DESC_WRAP;
  354. memcpy_toio(dst, &desc, sizeof(desc));
  355. dst += sizeof(desc);
  356. mod->free_page++;
  357. }
  358. /* fromhost hi queue descriptors are in page 7 */
  359. ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
  360. dst = mod->dpm;
  361. /* initialize only a single buffer in the fromhost hi queue (unused) */
  362. desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
  363. desc.pointer = mod->free_page;
  364. memcpy_toio(dst, &desc, sizeof(desc));
  365. mod->free_page++;
  366. /* fromhost low queue descriptors are in page 8 */
  367. ican3_set_page(mod, QUEUE_FROMHOST_LOW);
  368. dst = mod->dpm;
  369. /* initialize only a single buffer in the fromhost low queue (unused) */
  370. desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
  371. desc.pointer = mod->free_page;
  372. memcpy_toio(dst, &desc, sizeof(desc));
  373. mod->free_page++;
  374. spin_unlock_irqrestore(&mod->lock, flags);
  375. }
  376. /*
  377. * ICAN3 Fast Host Interface Setup
  378. */
  379. static void ican3_init_fast_host_interface(struct ican3_dev *mod)
  380. {
  381. struct ican3_fast_desc desc;
  382. unsigned long flags;
  383. unsigned int addr;
  384. void __iomem *dst;
  385. int i;
  386. spin_lock_irqsave(&mod->lock, flags);
  387. /* save the start recv page */
  388. mod->fastrx_start = mod->free_page;
  389. mod->fastrx_num = 0;
  390. /* build a single fast tohost queue descriptor */
  391. memset(&desc, 0, sizeof(desc));
  392. desc.control = 0x00;
  393. desc.command = 1;
  394. /* build the tohost queue descriptor ring in memory */
  395. addr = 0;
  396. for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
  397. /* set the wrap bit on the last buffer */
  398. if (i == ICAN3_RX_BUFFERS - 1)
  399. desc.control |= DESC_WRAP;
  400. /* switch to the correct page */
  401. ican3_set_page(mod, mod->free_page);
  402. /* copy the descriptor to the DPM */
  403. dst = mod->dpm + addr;
  404. memcpy_toio(dst, &desc, sizeof(desc));
  405. addr += sizeof(desc);
  406. /* move to the next page if necessary */
  407. if (addr >= DPM_PAGE_SIZE) {
  408. addr = 0;
  409. mod->free_page++;
  410. }
  411. }
  412. /* make sure we page-align the next queue */
  413. if (addr != 0)
  414. mod->free_page++;
  415. /* save the start xmit page */
  416. mod->fasttx_start = mod->free_page;
  417. mod->fasttx_num = 0;
  418. /* build a single fast fromhost queue descriptor */
  419. memset(&desc, 0, sizeof(desc));
  420. desc.control = DESC_VALID;
  421. desc.command = 1;
  422. /* build the fromhost queue descriptor ring in memory */
  423. addr = 0;
  424. for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
  425. /* set the wrap bit on the last buffer */
  426. if (i == ICAN3_TX_BUFFERS - 1)
  427. desc.control |= DESC_WRAP;
  428. /* switch to the correct page */
  429. ican3_set_page(mod, mod->free_page);
  430. /* copy the descriptor to the DPM */
  431. dst = mod->dpm + addr;
  432. memcpy_toio(dst, &desc, sizeof(desc));
  433. addr += sizeof(desc);
  434. /* move to the next page if necessary */
  435. if (addr >= DPM_PAGE_SIZE) {
  436. addr = 0;
  437. mod->free_page++;
  438. }
  439. }
  440. spin_unlock_irqrestore(&mod->lock, flags);
  441. }
  442. /*
  443. * ICAN3 "new-style" Host Interface Message Helpers
  444. */
  445. /*
  446. * LOCKING: must hold mod->lock
  447. */
  448. static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  449. {
  450. struct ican3_new_desc desc;
  451. void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
  452. /* switch to the fromhost mid queue, and read the buffer descriptor */
  453. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  454. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  455. if (!(desc.control & DESC_VALID)) {
  456. netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__);
  457. return -ENOMEM;
  458. }
  459. /* switch to the data page, copy the data */
  460. ican3_set_page(mod, desc.pointer);
  461. memcpy_toio(mod->dpm, msg, sizeof(*msg));
  462. /* switch back to the descriptor, set the valid bit, write it back */
  463. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  464. desc.control ^= DESC_VALID;
  465. memcpy_toio(desc_addr, &desc, sizeof(desc));
  466. /* update the tx number */
  467. mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
  468. return 0;
  469. }
  470. /*
  471. * LOCKING: must hold mod->lock
  472. */
  473. static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  474. {
  475. struct ican3_new_desc desc;
  476. void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
  477. /* switch to the tohost queue, and read the buffer descriptor */
  478. ican3_set_page(mod, QUEUE_TOHOST);
  479. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  480. if (!(desc.control & DESC_VALID)) {
  481. netdev_dbg(mod->ndev, "%s: no buffers to recv\n", __func__);
  482. return -ENOMEM;
  483. }
  484. /* switch to the data page, copy the data */
  485. ican3_set_page(mod, desc.pointer);
  486. memcpy_fromio(msg, mod->dpm, sizeof(*msg));
  487. /* switch back to the descriptor, toggle the valid bit, write it back */
  488. ican3_set_page(mod, QUEUE_TOHOST);
  489. desc.control ^= DESC_VALID;
  490. memcpy_toio(desc_addr, &desc, sizeof(desc));
  491. /* update the rx number */
  492. mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
  493. return 0;
  494. }
  495. /*
  496. * Message Send / Recv Helpers
  497. */
  498. static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  499. {
  500. unsigned long flags;
  501. int ret;
  502. spin_lock_irqsave(&mod->lock, flags);
  503. if (mod->iftype == 0)
  504. ret = ican3_old_send_msg(mod, msg);
  505. else
  506. ret = ican3_new_send_msg(mod, msg);
  507. spin_unlock_irqrestore(&mod->lock, flags);
  508. return ret;
  509. }
  510. static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  511. {
  512. unsigned long flags;
  513. int ret;
  514. spin_lock_irqsave(&mod->lock, flags);
  515. if (mod->iftype == 0)
  516. ret = ican3_old_recv_msg(mod, msg);
  517. else
  518. ret = ican3_new_recv_msg(mod, msg);
  519. spin_unlock_irqrestore(&mod->lock, flags);
  520. return ret;
  521. }
  522. /*
  523. * Quick Pre-constructed Messages
  524. */
  525. static int ican3_msg_connect(struct ican3_dev *mod)
  526. {
  527. struct ican3_msg msg;
  528. memset(&msg, 0, sizeof(msg));
  529. msg.spec = MSG_CONNECTI;
  530. msg.len = cpu_to_le16(0);
  531. return ican3_send_msg(mod, &msg);
  532. }
  533. static int ican3_msg_disconnect(struct ican3_dev *mod)
  534. {
  535. struct ican3_msg msg;
  536. memset(&msg, 0, sizeof(msg));
  537. msg.spec = MSG_DISCONNECT;
  538. msg.len = cpu_to_le16(0);
  539. return ican3_send_msg(mod, &msg);
  540. }
  541. static int ican3_msg_newhostif(struct ican3_dev *mod)
  542. {
  543. struct ican3_msg msg;
  544. int ret;
  545. memset(&msg, 0, sizeof(msg));
  546. msg.spec = MSG_NEWHOSTIF;
  547. msg.len = cpu_to_le16(0);
  548. /* If we're not using the old interface, switching seems bogus */
  549. WARN_ON(mod->iftype != 0);
  550. ret = ican3_send_msg(mod, &msg);
  551. if (ret)
  552. return ret;
  553. /* mark the module as using the new host interface */
  554. mod->iftype = 1;
  555. return 0;
  556. }
  557. static int ican3_msg_fasthostif(struct ican3_dev *mod)
  558. {
  559. struct ican3_msg msg;
  560. unsigned int addr;
  561. memset(&msg, 0, sizeof(msg));
  562. msg.spec = MSG_INITFDPMQUEUE;
  563. msg.len = cpu_to_le16(8);
  564. /* write the tohost queue start address */
  565. addr = DPM_PAGE_ADDR(mod->fastrx_start);
  566. msg.data[0] = addr & 0xff;
  567. msg.data[1] = (addr >> 8) & 0xff;
  568. msg.data[2] = (addr >> 16) & 0xff;
  569. msg.data[3] = (addr >> 24) & 0xff;
  570. /* write the fromhost queue start address */
  571. addr = DPM_PAGE_ADDR(mod->fasttx_start);
  572. msg.data[4] = addr & 0xff;
  573. msg.data[5] = (addr >> 8) & 0xff;
  574. msg.data[6] = (addr >> 16) & 0xff;
  575. msg.data[7] = (addr >> 24) & 0xff;
  576. /* If we're not using the new interface yet, we cannot do this */
  577. WARN_ON(mod->iftype != 1);
  578. return ican3_send_msg(mod, &msg);
  579. }
  580. /*
  581. * Setup the CAN filter to either accept or reject all
  582. * messages from the CAN bus.
  583. */
  584. static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
  585. {
  586. struct ican3_msg msg;
  587. int ret;
  588. /* Standard Frame Format */
  589. memset(&msg, 0, sizeof(msg));
  590. msg.spec = MSG_SETAFILMASK;
  591. msg.len = cpu_to_le16(5);
  592. msg.data[0] = 0x00; /* IDLo LSB */
  593. msg.data[1] = 0x00; /* IDLo MSB */
  594. msg.data[2] = 0xff; /* IDHi LSB */
  595. msg.data[3] = 0x07; /* IDHi MSB */
  596. /* accept all frames for fast host if, or reject all frames */
  597. msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
  598. ret = ican3_send_msg(mod, &msg);
  599. if (ret)
  600. return ret;
  601. /* Extended Frame Format */
  602. memset(&msg, 0, sizeof(msg));
  603. msg.spec = MSG_SETAFILMASK;
  604. msg.len = cpu_to_le16(13);
  605. msg.data[0] = 0; /* MUX = 0 */
  606. msg.data[1] = 0x00; /* IDLo LSB */
  607. msg.data[2] = 0x00;
  608. msg.data[3] = 0x00;
  609. msg.data[4] = 0x20; /* IDLo MSB */
  610. msg.data[5] = 0xff; /* IDHi LSB */
  611. msg.data[6] = 0xff;
  612. msg.data[7] = 0xff;
  613. msg.data[8] = 0x3f; /* IDHi MSB */
  614. /* accept all frames for fast host if, or reject all frames */
  615. msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
  616. return ican3_send_msg(mod, &msg);
  617. }
  618. /*
  619. * Bring the CAN bus online or offline
  620. */
  621. static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
  622. {
  623. struct can_bittiming *bt = &mod->can.bittiming;
  624. struct ican3_msg msg;
  625. u8 btr0, btr1;
  626. int res;
  627. /* This algorithm was stolen from drivers/net/can/sja1000/sja1000.c */
  628. /* The bittiming register command for the ICAN3 just sets the bit timing */
  629. /* registers on the SJA1000 chip directly */
  630. btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
  631. btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
  632. (((bt->phase_seg2 - 1) & 0x7) << 4);
  633. if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
  634. btr1 |= 0x80;
  635. if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
  636. if (on) {
  637. /* set bittiming */
  638. memset(&msg, 0, sizeof(msg));
  639. msg.spec = MSG_CBTRREQ;
  640. msg.len = cpu_to_le16(4);
  641. msg.data[0] = 0x00;
  642. msg.data[1] = 0x00;
  643. msg.data[2] = btr0;
  644. msg.data[3] = btr1;
  645. res = ican3_send_msg(mod, &msg);
  646. if (res)
  647. return res;
  648. }
  649. /* can-on/off request */
  650. memset(&msg, 0, sizeof(msg));
  651. msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
  652. msg.len = cpu_to_le16(0);
  653. return ican3_send_msg(mod, &msg);
  654. } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
  655. /* bittiming + can-on/off request */
  656. memset(&msg, 0, sizeof(msg));
  657. msg.spec = MSG_LMTS;
  658. if (on) {
  659. msg.len = cpu_to_le16(4);
  660. msg.data[0] = LMTS_BUSON_REQ;
  661. msg.data[1] = 0;
  662. msg.data[2] = btr0;
  663. msg.data[3] = btr1;
  664. } else {
  665. msg.len = cpu_to_le16(2);
  666. msg.data[0] = LMTS_BUSOFF_REQ;
  667. msg.data[1] = 0;
  668. }
  669. res = ican3_send_msg(mod, &msg);
  670. if (res)
  671. return res;
  672. if (on) {
  673. /* create NMT Slave Node for error processing
  674. * class 2 (with error capability, see CiA/DS203-1)
  675. * id 1
  676. * name locnod1 (must be exactly 7 bytes)
  677. */
  678. memset(&msg, 0, sizeof(msg));
  679. msg.spec = MSG_NMTS;
  680. msg.len = cpu_to_le16(11);
  681. msg.data[0] = NMTS_CREATE_NODE_REQ;
  682. msg.data[1] = 0;
  683. msg.data[2] = 2; /* node class */
  684. msg.data[3] = 1; /* node id */
  685. strcpy(msg.data + 4, "locnod1"); /* node name */
  686. return ican3_send_msg(mod, &msg);
  687. }
  688. return 0;
  689. }
  690. return -ENOTSUPP;
  691. }
  692. static int ican3_set_termination(struct ican3_dev *mod, bool on)
  693. {
  694. struct ican3_msg msg;
  695. memset(&msg, 0, sizeof(msg));
  696. msg.spec = MSG_HWCONF;
  697. msg.len = cpu_to_le16(2);
  698. msg.data[0] = 0x00;
  699. msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
  700. return ican3_send_msg(mod, &msg);
  701. }
  702. static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
  703. {
  704. struct ican3_msg msg;
  705. memset(&msg, 0, sizeof(msg));
  706. msg.spec = MSG_INQUIRY;
  707. msg.len = cpu_to_le16(2);
  708. msg.data[0] = subspec;
  709. msg.data[1] = 0x00;
  710. return ican3_send_msg(mod, &msg);
  711. }
  712. static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
  713. {
  714. struct ican3_msg msg;
  715. if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
  716. memset(&msg, 0, sizeof(msg));
  717. msg.spec = MSG_CCONFREQ;
  718. msg.len = cpu_to_le16(2);
  719. msg.data[0] = 0x00;
  720. msg.data[1] = quota;
  721. } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
  722. memset(&msg, 0, sizeof(msg));
  723. msg.spec = MSG_LMTS;
  724. msg.len = cpu_to_le16(4);
  725. msg.data[0] = LMTS_CAN_CONF_REQ;
  726. msg.data[1] = 0x00;
  727. msg.data[2] = 0x00;
  728. msg.data[3] = quota;
  729. } else {
  730. return -ENOTSUPP;
  731. }
  732. return ican3_send_msg(mod, &msg);
  733. }
  734. /*
  735. * ICAN3 to Linux CAN Frame Conversion
  736. */
  737. static void ican3_to_can_frame(struct ican3_dev *mod,
  738. struct ican3_fast_desc *desc,
  739. struct can_frame *cf)
  740. {
  741. if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
  742. if (desc->data[1] & ICAN3_SFF_RTR)
  743. cf->can_id |= CAN_RTR_FLAG;
  744. cf->can_id |= desc->data[0] << 3;
  745. cf->can_id |= (desc->data[1] & 0xe0) >> 5;
  746. cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
  747. memcpy(cf->data, &desc->data[2], cf->can_dlc);
  748. } else {
  749. cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
  750. if (desc->data[0] & ICAN3_EFF_RTR)
  751. cf->can_id |= CAN_RTR_FLAG;
  752. if (desc->data[0] & ICAN3_EFF) {
  753. cf->can_id |= CAN_EFF_FLAG;
  754. cf->can_id |= desc->data[2] << 21; /* 28-21 */
  755. cf->can_id |= desc->data[3] << 13; /* 20-13 */
  756. cf->can_id |= desc->data[4] << 5; /* 12-5 */
  757. cf->can_id |= (desc->data[5] & 0xf8) >> 3;
  758. } else {
  759. cf->can_id |= desc->data[2] << 3; /* 10-3 */
  760. cf->can_id |= desc->data[3] >> 5; /* 2-0 */
  761. }
  762. memcpy(cf->data, &desc->data[6], cf->can_dlc);
  763. }
  764. }
  765. static void can_frame_to_ican3(struct ican3_dev *mod,
  766. struct can_frame *cf,
  767. struct ican3_fast_desc *desc)
  768. {
  769. /* clear out any stale data in the descriptor */
  770. memset(desc->data, 0, sizeof(desc->data));
  771. /* we always use the extended format, with the ECHO flag set */
  772. desc->command = ICAN3_CAN_TYPE_EFF;
  773. desc->data[0] |= cf->can_dlc;
  774. desc->data[1] |= ICAN3_ECHO;
  775. /* support single transmission (no retries) mode */
  776. if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
  777. desc->data[1] |= ICAN3_SNGL;
  778. if (cf->can_id & CAN_RTR_FLAG)
  779. desc->data[0] |= ICAN3_EFF_RTR;
  780. /* pack the id into the correct places */
  781. if (cf->can_id & CAN_EFF_FLAG) {
  782. desc->data[0] |= ICAN3_EFF;
  783. desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
  784. desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
  785. desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
  786. desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
  787. } else {
  788. desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
  789. desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
  790. }
  791. /* copy the data bits into the descriptor */
  792. memcpy(&desc->data[6], cf->data, cf->can_dlc);
  793. }
  794. /*
  795. * Interrupt Handling
  796. */
  797. /*
  798. * Handle an ID + Version message response from the firmware. We never generate
  799. * this message in production code, but it is very useful when debugging to be
  800. * able to display this message.
  801. */
  802. static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
  803. {
  804. netdev_dbg(mod->ndev, "IDVERS response: %s\n", msg->data);
  805. }
  806. static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
  807. {
  808. struct net_device *dev = mod->ndev;
  809. struct net_device_stats *stats = &dev->stats;
  810. struct can_frame *cf;
  811. struct sk_buff *skb;
  812. /*
  813. * Report that communication messages with the microcontroller firmware
  814. * are being lost. These are never CAN frames, so we do not generate an
  815. * error frame for userspace
  816. */
  817. if (msg->spec == MSG_MSGLOST) {
  818. netdev_err(mod->ndev, "lost %d control messages\n", msg->data[0]);
  819. return;
  820. }
  821. /*
  822. * Oops, this indicates that we have lost messages in the fast queue,
  823. * which are exclusively CAN messages. Our driver isn't reading CAN
  824. * frames fast enough.
  825. *
  826. * We'll pretend that the SJA1000 told us that it ran out of buffer
  827. * space, because there is not a better message for this.
  828. */
  829. skb = alloc_can_err_skb(dev, &cf);
  830. if (skb) {
  831. cf->can_id |= CAN_ERR_CRTL;
  832. cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
  833. stats->rx_over_errors++;
  834. stats->rx_errors++;
  835. netif_rx(skb);
  836. }
  837. }
  838. /*
  839. * Handle CAN Event Indication Messages from the firmware
  840. *
  841. * The ICAN3 firmware provides the values of some SJA1000 registers when it
  842. * generates this message. The code below is largely copied from the
  843. * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
  844. */
  845. static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
  846. {
  847. struct net_device *dev = mod->ndev;
  848. struct net_device_stats *stats = &dev->stats;
  849. enum can_state state = mod->can.state;
  850. u8 isrc, ecc, status, rxerr, txerr;
  851. struct can_frame *cf;
  852. struct sk_buff *skb;
  853. /* we can only handle the SJA1000 part */
  854. if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
  855. netdev_err(mod->ndev, "unable to handle errors on non-SJA1000\n");
  856. return -ENODEV;
  857. }
  858. /* check the message length for sanity */
  859. if (le16_to_cpu(msg->len) < 6) {
  860. netdev_err(mod->ndev, "error message too short\n");
  861. return -EINVAL;
  862. }
  863. isrc = msg->data[0];
  864. ecc = msg->data[2];
  865. status = msg->data[3];
  866. rxerr = msg->data[4];
  867. txerr = msg->data[5];
  868. /*
  869. * This hardware lacks any support other than bus error messages to
  870. * determine if packet transmission has failed.
  871. *
  872. * When TX errors happen, one echo skb needs to be dropped from the
  873. * front of the queue.
  874. *
  875. * A small bit of code is duplicated here and below, to avoid error
  876. * skb allocation when it will just be freed immediately.
  877. */
  878. if (isrc == CEVTIND_BEI) {
  879. int ret;
  880. netdev_dbg(mod->ndev, "bus error interrupt\n");
  881. /* TX error */
  882. if (!(ecc & ECC_DIR)) {
  883. kfree_skb(skb_dequeue(&mod->echoq));
  884. stats->tx_errors++;
  885. } else {
  886. stats->rx_errors++;
  887. }
  888. /*
  889. * The controller automatically disables bus-error interrupts
  890. * and therefore we must re-enable them.
  891. */
  892. ret = ican3_set_buserror(mod, 1);
  893. if (ret) {
  894. netdev_err(mod->ndev, "unable to re-enable bus-error\n");
  895. return ret;
  896. }
  897. /* bus error reporting is off, return immediately */
  898. if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
  899. return 0;
  900. }
  901. skb = alloc_can_err_skb(dev, &cf);
  902. if (skb == NULL)
  903. return -ENOMEM;
  904. /* data overrun interrupt */
  905. if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
  906. netdev_dbg(mod->ndev, "data overrun interrupt\n");
  907. cf->can_id |= CAN_ERR_CRTL;
  908. cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
  909. stats->rx_over_errors++;
  910. stats->rx_errors++;
  911. }
  912. /* error warning + passive interrupt */
  913. if (isrc == CEVTIND_EI) {
  914. netdev_dbg(mod->ndev, "error warning + passive interrupt\n");
  915. if (status & SR_BS) {
  916. state = CAN_STATE_BUS_OFF;
  917. cf->can_id |= CAN_ERR_BUSOFF;
  918. mod->can.can_stats.bus_off++;
  919. can_bus_off(dev);
  920. } else if (status & SR_ES) {
  921. if (rxerr >= 128 || txerr >= 128)
  922. state = CAN_STATE_ERROR_PASSIVE;
  923. else
  924. state = CAN_STATE_ERROR_WARNING;
  925. } else {
  926. state = CAN_STATE_ERROR_ACTIVE;
  927. }
  928. }
  929. /* bus error interrupt */
  930. if (isrc == CEVTIND_BEI) {
  931. mod->can.can_stats.bus_error++;
  932. cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
  933. switch (ecc & ECC_MASK) {
  934. case ECC_BIT:
  935. cf->data[2] |= CAN_ERR_PROT_BIT;
  936. break;
  937. case ECC_FORM:
  938. cf->data[2] |= CAN_ERR_PROT_FORM;
  939. break;
  940. case ECC_STUFF:
  941. cf->data[2] |= CAN_ERR_PROT_STUFF;
  942. break;
  943. default:
  944. cf->data[3] = ecc & ECC_SEG;
  945. break;
  946. }
  947. if (!(ecc & ECC_DIR))
  948. cf->data[2] |= CAN_ERR_PROT_TX;
  949. cf->data[6] = txerr;
  950. cf->data[7] = rxerr;
  951. }
  952. if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
  953. state == CAN_STATE_ERROR_PASSIVE)) {
  954. cf->can_id |= CAN_ERR_CRTL;
  955. if (state == CAN_STATE_ERROR_WARNING) {
  956. mod->can.can_stats.error_warning++;
  957. cf->data[1] = (txerr > rxerr) ?
  958. CAN_ERR_CRTL_TX_WARNING :
  959. CAN_ERR_CRTL_RX_WARNING;
  960. } else {
  961. mod->can.can_stats.error_passive++;
  962. cf->data[1] = (txerr > rxerr) ?
  963. CAN_ERR_CRTL_TX_PASSIVE :
  964. CAN_ERR_CRTL_RX_PASSIVE;
  965. }
  966. cf->data[6] = txerr;
  967. cf->data[7] = rxerr;
  968. }
  969. mod->can.state = state;
  970. netif_rx(skb);
  971. return 0;
  972. }
  973. static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
  974. {
  975. switch (msg->data[0]) {
  976. case INQUIRY_STATUS:
  977. case INQUIRY_EXTENDED:
  978. mod->bec.rxerr = msg->data[5];
  979. mod->bec.txerr = msg->data[6];
  980. complete(&mod->buserror_comp);
  981. break;
  982. case INQUIRY_TERMINATION:
  983. mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
  984. complete(&mod->termination_comp);
  985. break;
  986. default:
  987. netdev_err(mod->ndev, "received an unknown inquiry response\n");
  988. break;
  989. }
  990. }
  991. /* Handle NMTS Slave Event Indication Messages from the firmware */
  992. static void ican3_handle_nmtsind(struct ican3_dev *mod, struct ican3_msg *msg)
  993. {
  994. u16 subspec;
  995. subspec = msg->data[0] + msg->data[1] * 0x100;
  996. if (subspec == NMTS_SLAVE_EVENT_IND) {
  997. switch (msg->data[2]) {
  998. case NE_LOCAL_OCCURRED:
  999. case NE_LOCAL_RESOLVED:
  1000. /* now follows the same message as Raw ICANOS CEVTIND
  1001. * shift the data at the same place and call this method
  1002. */
  1003. le16_add_cpu(&msg->len, -3);
  1004. memmove(msg->data, msg->data + 3, le16_to_cpu(msg->len));
  1005. ican3_handle_cevtind(mod, msg);
  1006. break;
  1007. case NE_REMOTE_OCCURRED:
  1008. case NE_REMOTE_RESOLVED:
  1009. /* should not occurre, ignore */
  1010. break;
  1011. default:
  1012. netdev_warn(mod->ndev, "unknown NMTS event indication %x\n",
  1013. msg->data[2]);
  1014. break;
  1015. }
  1016. } else if (subspec == NMTS_SLAVE_STATE_IND) {
  1017. /* ignore state indications */
  1018. } else {
  1019. netdev_warn(mod->ndev, "unhandled NMTS indication %x\n",
  1020. subspec);
  1021. return;
  1022. }
  1023. }
  1024. static void ican3_handle_unknown_message(struct ican3_dev *mod,
  1025. struct ican3_msg *msg)
  1026. {
  1027. netdev_warn(mod->ndev, "received unknown message: spec 0x%.2x length %d\n",
  1028. msg->spec, le16_to_cpu(msg->len));
  1029. }
  1030. /*
  1031. * Handle a control message from the firmware
  1032. */
  1033. static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
  1034. {
  1035. netdev_dbg(mod->ndev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
  1036. mod->num, msg->spec, le16_to_cpu(msg->len));
  1037. switch (msg->spec) {
  1038. case MSG_IDVERS:
  1039. ican3_handle_idvers(mod, msg);
  1040. break;
  1041. case MSG_MSGLOST:
  1042. case MSG_FMSGLOST:
  1043. ican3_handle_msglost(mod, msg);
  1044. break;
  1045. case MSG_CEVTIND:
  1046. ican3_handle_cevtind(mod, msg);
  1047. break;
  1048. case MSG_INQUIRY:
  1049. ican3_handle_inquiry(mod, msg);
  1050. break;
  1051. case MSG_NMTS:
  1052. ican3_handle_nmtsind(mod, msg);
  1053. break;
  1054. default:
  1055. ican3_handle_unknown_message(mod, msg);
  1056. break;
  1057. }
  1058. }
  1059. /*
  1060. * The ican3 needs to store all echo skbs, and therefore cannot
  1061. * use the generic infrastructure for this.
  1062. */
  1063. static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
  1064. {
  1065. skb = can_create_echo_skb(skb);
  1066. if (!skb)
  1067. return;
  1068. /* save this skb for tx interrupt echo handling */
  1069. skb_queue_tail(&mod->echoq, skb);
  1070. }
  1071. static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
  1072. {
  1073. struct sk_buff *skb = skb_dequeue(&mod->echoq);
  1074. struct can_frame *cf;
  1075. u8 dlc;
  1076. /* this should never trigger unless there is a driver bug */
  1077. if (!skb) {
  1078. netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
  1079. return 0;
  1080. }
  1081. cf = (struct can_frame *)skb->data;
  1082. dlc = cf->can_dlc;
  1083. /* check flag whether this packet has to be looped back */
  1084. if (skb->pkt_type != PACKET_LOOPBACK) {
  1085. kfree_skb(skb);
  1086. return dlc;
  1087. }
  1088. skb->protocol = htons(ETH_P_CAN);
  1089. skb->pkt_type = PACKET_BROADCAST;
  1090. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1091. skb->dev = mod->ndev;
  1092. netif_receive_skb(skb);
  1093. return dlc;
  1094. }
  1095. /*
  1096. * Compare an skb with an existing echo skb
  1097. *
  1098. * This function will be used on devices which have a hardware loopback.
  1099. * On these devices, this function can be used to compare a received skb
  1100. * with the saved echo skbs so that the hardware echo skb can be dropped.
  1101. *
  1102. * Returns true if the skb's are identical, false otherwise.
  1103. */
  1104. static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
  1105. {
  1106. struct can_frame *cf = (struct can_frame *)skb->data;
  1107. struct sk_buff *echo_skb = skb_peek(&mod->echoq);
  1108. struct can_frame *echo_cf;
  1109. if (!echo_skb)
  1110. return false;
  1111. echo_cf = (struct can_frame *)echo_skb->data;
  1112. if (cf->can_id != echo_cf->can_id)
  1113. return false;
  1114. if (cf->can_dlc != echo_cf->can_dlc)
  1115. return false;
  1116. return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
  1117. }
  1118. /*
  1119. * Check that there is room in the TX ring to transmit another skb
  1120. *
  1121. * LOCKING: must hold mod->lock
  1122. */
  1123. static bool ican3_txok(struct ican3_dev *mod)
  1124. {
  1125. struct ican3_fast_desc __iomem *desc;
  1126. u8 control;
  1127. /* check that we have echo queue space */
  1128. if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
  1129. return false;
  1130. /* copy the control bits of the descriptor */
  1131. ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
  1132. desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
  1133. control = ioread8(&desc->control);
  1134. /* if the control bits are not valid, then we have no more space */
  1135. if (!(control & DESC_VALID))
  1136. return false;
  1137. return true;
  1138. }
  1139. /*
  1140. * Receive one CAN frame from the hardware
  1141. *
  1142. * CONTEXT: must be called from user context
  1143. */
  1144. static int ican3_recv_skb(struct ican3_dev *mod)
  1145. {
  1146. struct net_device *ndev = mod->ndev;
  1147. struct net_device_stats *stats = &ndev->stats;
  1148. struct ican3_fast_desc desc;
  1149. void __iomem *desc_addr;
  1150. struct can_frame *cf;
  1151. struct sk_buff *skb;
  1152. unsigned long flags;
  1153. spin_lock_irqsave(&mod->lock, flags);
  1154. /* copy the whole descriptor */
  1155. ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
  1156. desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
  1157. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  1158. spin_unlock_irqrestore(&mod->lock, flags);
  1159. /* check that we actually have a CAN frame */
  1160. if (!(desc.control & DESC_VALID))
  1161. return -ENOBUFS;
  1162. /* allocate an skb */
  1163. skb = alloc_can_skb(ndev, &cf);
  1164. if (unlikely(skb == NULL)) {
  1165. stats->rx_dropped++;
  1166. goto err_noalloc;
  1167. }
  1168. /* convert the ICAN3 frame into Linux CAN format */
  1169. ican3_to_can_frame(mod, &desc, cf);
  1170. /*
  1171. * If this is an ECHO frame received from the hardware loopback
  1172. * feature, use the skb saved in the ECHO stack instead. This allows
  1173. * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
  1174. *
  1175. * Since this is a confirmation of a successfully transmitted packet
  1176. * sent from this host, update the transmit statistics.
  1177. *
  1178. * Also, the netdevice queue needs to be allowed to send packets again.
  1179. */
  1180. if (ican3_echo_skb_matches(mod, skb)) {
  1181. stats->tx_packets++;
  1182. stats->tx_bytes += ican3_get_echo_skb(mod);
  1183. kfree_skb(skb);
  1184. goto err_noalloc;
  1185. }
  1186. /* update statistics, receive the skb */
  1187. stats->rx_packets++;
  1188. stats->rx_bytes += cf->can_dlc;
  1189. netif_receive_skb(skb);
  1190. err_noalloc:
  1191. /* toggle the valid bit and return the descriptor to the ring */
  1192. desc.control ^= DESC_VALID;
  1193. spin_lock_irqsave(&mod->lock, flags);
  1194. ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
  1195. memcpy_toio(desc_addr, &desc, 1);
  1196. /* update the next buffer pointer */
  1197. mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
  1198. : (mod->fastrx_num + 1);
  1199. /* there are still more buffers to process */
  1200. spin_unlock_irqrestore(&mod->lock, flags);
  1201. return 0;
  1202. }
  1203. static int ican3_napi(struct napi_struct *napi, int budget)
  1204. {
  1205. struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
  1206. unsigned long flags;
  1207. int received = 0;
  1208. int ret;
  1209. /* process all communication messages */
  1210. while (true) {
  1211. struct ican3_msg uninitialized_var(msg);
  1212. ret = ican3_recv_msg(mod, &msg);
  1213. if (ret)
  1214. break;
  1215. ican3_handle_message(mod, &msg);
  1216. }
  1217. /* process all CAN frames from the fast interface */
  1218. while (received < budget) {
  1219. ret = ican3_recv_skb(mod);
  1220. if (ret)
  1221. break;
  1222. received++;
  1223. }
  1224. /* We have processed all packets that the adapter had, but it
  1225. * was less than our budget, stop polling */
  1226. if (received < budget)
  1227. napi_complete_done(napi, received);
  1228. spin_lock_irqsave(&mod->lock, flags);
  1229. /* Wake up the transmit queue if necessary */
  1230. if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
  1231. netif_wake_queue(mod->ndev);
  1232. spin_unlock_irqrestore(&mod->lock, flags);
  1233. /* re-enable interrupt generation */
  1234. iowrite8(1 << mod->num, &mod->ctrl->int_enable);
  1235. return received;
  1236. }
  1237. static irqreturn_t ican3_irq(int irq, void *dev_id)
  1238. {
  1239. struct ican3_dev *mod = dev_id;
  1240. u8 stat;
  1241. /*
  1242. * The interrupt status register on this device reports interrupts
  1243. * as zeroes instead of using ones like most other devices
  1244. */
  1245. stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
  1246. if (stat == (1 << mod->num))
  1247. return IRQ_NONE;
  1248. /* clear the MODULbus interrupt from the microcontroller */
  1249. ioread8(&mod->dpmctrl->interrupt);
  1250. /* disable interrupt generation, schedule the NAPI poller */
  1251. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1252. napi_schedule(&mod->napi);
  1253. return IRQ_HANDLED;
  1254. }
  1255. /*
  1256. * Firmware reset, startup, and shutdown
  1257. */
  1258. /*
  1259. * Reset an ICAN module to its power-on state
  1260. *
  1261. * CONTEXT: no network device registered
  1262. */
  1263. static int ican3_reset_module(struct ican3_dev *mod)
  1264. {
  1265. unsigned long start;
  1266. u8 runold, runnew;
  1267. /* disable interrupts so no more work is scheduled */
  1268. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1269. /* the first unallocated page in the DPM is #9 */
  1270. mod->free_page = DPM_FREE_START;
  1271. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  1272. runold = ioread8(mod->dpm + TARGET_RUNNING);
  1273. /* reset the module */
  1274. iowrite8(0x00, &mod->dpmctrl->hwreset);
  1275. /* wait until the module has finished resetting and is running */
  1276. start = jiffies;
  1277. do {
  1278. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  1279. runnew = ioread8(mod->dpm + TARGET_RUNNING);
  1280. if (runnew == (runold ^ 0xff))
  1281. return 0;
  1282. msleep(10);
  1283. } while (time_before(jiffies, start + HZ / 2));
  1284. netdev_err(mod->ndev, "failed to reset CAN module\n");
  1285. return -ETIMEDOUT;
  1286. }
  1287. static void ican3_shutdown_module(struct ican3_dev *mod)
  1288. {
  1289. ican3_msg_disconnect(mod);
  1290. ican3_reset_module(mod);
  1291. }
  1292. /*
  1293. * Startup an ICAN module, bringing it into fast mode
  1294. */
  1295. static int ican3_startup_module(struct ican3_dev *mod)
  1296. {
  1297. int ret;
  1298. ret = ican3_reset_module(mod);
  1299. if (ret) {
  1300. netdev_err(mod->ndev, "unable to reset module\n");
  1301. return ret;
  1302. }
  1303. /* detect firmware */
  1304. memcpy_fromio(mod->fwinfo, mod->dpm + FIRMWARE_STAMP, sizeof(mod->fwinfo) - 1);
  1305. if (strncmp(mod->fwinfo, "JANZ-ICAN3", 10)) {
  1306. netdev_err(mod->ndev, "ICAN3 not detected (found %s)\n", mod->fwinfo);
  1307. return -ENODEV;
  1308. }
  1309. if (strstr(mod->fwinfo, "CAL/CANopen"))
  1310. mod->fwtype = ICAN3_FWTYPE_CAL_CANOPEN;
  1311. else
  1312. mod->fwtype = ICAN3_FWTYPE_ICANOS;
  1313. /* re-enable interrupts so we can send messages */
  1314. iowrite8(1 << mod->num, &mod->ctrl->int_enable);
  1315. ret = ican3_msg_connect(mod);
  1316. if (ret) {
  1317. netdev_err(mod->ndev, "unable to connect to module\n");
  1318. return ret;
  1319. }
  1320. ican3_init_new_host_interface(mod);
  1321. ret = ican3_msg_newhostif(mod);
  1322. if (ret) {
  1323. netdev_err(mod->ndev, "unable to switch to new-style interface\n");
  1324. return ret;
  1325. }
  1326. /* default to "termination on" */
  1327. ret = ican3_set_termination(mod, true);
  1328. if (ret) {
  1329. netdev_err(mod->ndev, "unable to enable termination\n");
  1330. return ret;
  1331. }
  1332. /* default to "bus errors enabled" */
  1333. ret = ican3_set_buserror(mod, 1);
  1334. if (ret) {
  1335. netdev_err(mod->ndev, "unable to set bus-error\n");
  1336. return ret;
  1337. }
  1338. ican3_init_fast_host_interface(mod);
  1339. ret = ican3_msg_fasthostif(mod);
  1340. if (ret) {
  1341. netdev_err(mod->ndev, "unable to switch to fast host interface\n");
  1342. return ret;
  1343. }
  1344. ret = ican3_set_id_filter(mod, true);
  1345. if (ret) {
  1346. netdev_err(mod->ndev, "unable to set acceptance filter\n");
  1347. return ret;
  1348. }
  1349. return 0;
  1350. }
  1351. /*
  1352. * CAN Network Device
  1353. */
  1354. static int ican3_open(struct net_device *ndev)
  1355. {
  1356. struct ican3_dev *mod = netdev_priv(ndev);
  1357. int ret;
  1358. /* open the CAN layer */
  1359. ret = open_candev(ndev);
  1360. if (ret) {
  1361. netdev_err(mod->ndev, "unable to start CAN layer\n");
  1362. return ret;
  1363. }
  1364. /* bring the bus online */
  1365. ret = ican3_set_bus_state(mod, true);
  1366. if (ret) {
  1367. netdev_err(mod->ndev, "unable to set bus-on\n");
  1368. close_candev(ndev);
  1369. return ret;
  1370. }
  1371. /* start up the network device */
  1372. mod->can.state = CAN_STATE_ERROR_ACTIVE;
  1373. netif_start_queue(ndev);
  1374. return 0;
  1375. }
  1376. static int ican3_stop(struct net_device *ndev)
  1377. {
  1378. struct ican3_dev *mod = netdev_priv(ndev);
  1379. int ret;
  1380. /* stop the network device xmit routine */
  1381. netif_stop_queue(ndev);
  1382. mod->can.state = CAN_STATE_STOPPED;
  1383. /* bring the bus offline, stop receiving packets */
  1384. ret = ican3_set_bus_state(mod, false);
  1385. if (ret) {
  1386. netdev_err(mod->ndev, "unable to set bus-off\n");
  1387. return ret;
  1388. }
  1389. /* drop all outstanding echo skbs */
  1390. skb_queue_purge(&mod->echoq);
  1391. /* close the CAN layer */
  1392. close_candev(ndev);
  1393. return 0;
  1394. }
  1395. static netdev_tx_t ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
  1396. {
  1397. struct ican3_dev *mod = netdev_priv(ndev);
  1398. struct can_frame *cf = (struct can_frame *)skb->data;
  1399. struct ican3_fast_desc desc;
  1400. void __iomem *desc_addr;
  1401. unsigned long flags;
  1402. if (can_dropped_invalid_skb(ndev, skb))
  1403. return NETDEV_TX_OK;
  1404. spin_lock_irqsave(&mod->lock, flags);
  1405. /* check that we can actually transmit */
  1406. if (!ican3_txok(mod)) {
  1407. netdev_err(mod->ndev, "BUG: no free descriptors\n");
  1408. spin_unlock_irqrestore(&mod->lock, flags);
  1409. return NETDEV_TX_BUSY;
  1410. }
  1411. /* copy the control bits of the descriptor */
  1412. ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
  1413. desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
  1414. memset(&desc, 0, sizeof(desc));
  1415. memcpy_fromio(&desc, desc_addr, 1);
  1416. /* convert the Linux CAN frame into ICAN3 format */
  1417. can_frame_to_ican3(mod, cf, &desc);
  1418. /*
  1419. * This hardware doesn't have TX-done notifications, so we'll try and
  1420. * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
  1421. * stack. Upon packet reception, check if the ECHO skb and received
  1422. * skb match, and use that to wake the queue.
  1423. */
  1424. ican3_put_echo_skb(mod, skb);
  1425. /*
  1426. * the programming manual says that you must set the IVALID bit, then
  1427. * interrupt, then set the valid bit. Quite weird, but it seems to be
  1428. * required for this to work
  1429. */
  1430. desc.control |= DESC_IVALID;
  1431. memcpy_toio(desc_addr, &desc, sizeof(desc));
  1432. /* generate a MODULbus interrupt to the microcontroller */
  1433. iowrite8(0x01, &mod->dpmctrl->interrupt);
  1434. desc.control ^= DESC_VALID;
  1435. memcpy_toio(desc_addr, &desc, sizeof(desc));
  1436. /* update the next buffer pointer */
  1437. mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
  1438. : (mod->fasttx_num + 1);
  1439. /* if there is no free descriptor space, stop the transmit queue */
  1440. if (!ican3_txok(mod))
  1441. netif_stop_queue(ndev);
  1442. spin_unlock_irqrestore(&mod->lock, flags);
  1443. return NETDEV_TX_OK;
  1444. }
  1445. static const struct net_device_ops ican3_netdev_ops = {
  1446. .ndo_open = ican3_open,
  1447. .ndo_stop = ican3_stop,
  1448. .ndo_start_xmit = ican3_xmit,
  1449. .ndo_change_mtu = can_change_mtu,
  1450. };
  1451. /*
  1452. * Low-level CAN Device
  1453. */
  1454. /* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
  1455. static const struct can_bittiming_const ican3_bittiming_const = {
  1456. .name = DRV_NAME,
  1457. .tseg1_min = 1,
  1458. .tseg1_max = 16,
  1459. .tseg2_min = 1,
  1460. .tseg2_max = 8,
  1461. .sjw_max = 4,
  1462. .brp_min = 1,
  1463. .brp_max = 64,
  1464. .brp_inc = 1,
  1465. };
  1466. static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
  1467. {
  1468. struct ican3_dev *mod = netdev_priv(ndev);
  1469. int ret;
  1470. if (mode != CAN_MODE_START)
  1471. return -ENOTSUPP;
  1472. /* bring the bus online */
  1473. ret = ican3_set_bus_state(mod, true);
  1474. if (ret) {
  1475. netdev_err(ndev, "unable to set bus-on\n");
  1476. return ret;
  1477. }
  1478. /* start up the network device */
  1479. mod->can.state = CAN_STATE_ERROR_ACTIVE;
  1480. if (netif_queue_stopped(ndev))
  1481. netif_wake_queue(ndev);
  1482. return 0;
  1483. }
  1484. static int ican3_get_berr_counter(const struct net_device *ndev,
  1485. struct can_berr_counter *bec)
  1486. {
  1487. struct ican3_dev *mod = netdev_priv(ndev);
  1488. int ret;
  1489. ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
  1490. if (ret)
  1491. return ret;
  1492. if (!wait_for_completion_timeout(&mod->buserror_comp, HZ)) {
  1493. netdev_info(mod->ndev, "%s timed out\n", __func__);
  1494. return -ETIMEDOUT;
  1495. }
  1496. bec->rxerr = mod->bec.rxerr;
  1497. bec->txerr = mod->bec.txerr;
  1498. return 0;
  1499. }
  1500. /*
  1501. * Sysfs Attributes
  1502. */
  1503. static ssize_t ican3_sysfs_show_term(struct device *dev,
  1504. struct device_attribute *attr,
  1505. char *buf)
  1506. {
  1507. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1508. int ret;
  1509. ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
  1510. if (ret)
  1511. return ret;
  1512. if (!wait_for_completion_timeout(&mod->termination_comp, HZ)) {
  1513. netdev_info(mod->ndev, "%s timed out\n", __func__);
  1514. return -ETIMEDOUT;
  1515. }
  1516. return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
  1517. }
  1518. static ssize_t ican3_sysfs_set_term(struct device *dev,
  1519. struct device_attribute *attr,
  1520. const char *buf, size_t count)
  1521. {
  1522. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1523. unsigned long enable;
  1524. int ret;
  1525. if (kstrtoul(buf, 0, &enable))
  1526. return -EINVAL;
  1527. ret = ican3_set_termination(mod, enable);
  1528. if (ret)
  1529. return ret;
  1530. return count;
  1531. }
  1532. static ssize_t ican3_sysfs_show_fwinfo(struct device *dev,
  1533. struct device_attribute *attr,
  1534. char *buf)
  1535. {
  1536. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1537. return scnprintf(buf, PAGE_SIZE, "%s\n", mod->fwinfo);
  1538. }
  1539. static DEVICE_ATTR(termination, 0644, ican3_sysfs_show_term,
  1540. ican3_sysfs_set_term);
  1541. static DEVICE_ATTR(fwinfo, 0444, ican3_sysfs_show_fwinfo, NULL);
  1542. static struct attribute *ican3_sysfs_attrs[] = {
  1543. &dev_attr_termination.attr,
  1544. &dev_attr_fwinfo.attr,
  1545. NULL,
  1546. };
  1547. static const struct attribute_group ican3_sysfs_attr_group = {
  1548. .attrs = ican3_sysfs_attrs,
  1549. };
  1550. /*
  1551. * PCI Subsystem
  1552. */
  1553. static int ican3_probe(struct platform_device *pdev)
  1554. {
  1555. struct janz_platform_data *pdata;
  1556. struct net_device *ndev;
  1557. struct ican3_dev *mod;
  1558. struct resource *res;
  1559. struct device *dev;
  1560. int ret;
  1561. pdata = dev_get_platdata(&pdev->dev);
  1562. if (!pdata)
  1563. return -ENXIO;
  1564. dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
  1565. /* save the struct device for printing */
  1566. dev = &pdev->dev;
  1567. /* allocate the CAN device and private data */
  1568. ndev = alloc_candev(sizeof(*mod), 0);
  1569. if (!ndev) {
  1570. dev_err(dev, "unable to allocate CANdev\n");
  1571. ret = -ENOMEM;
  1572. goto out_return;
  1573. }
  1574. platform_set_drvdata(pdev, ndev);
  1575. mod = netdev_priv(ndev);
  1576. mod->ndev = ndev;
  1577. mod->num = pdata->modno;
  1578. netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
  1579. skb_queue_head_init(&mod->echoq);
  1580. spin_lock_init(&mod->lock);
  1581. init_completion(&mod->termination_comp);
  1582. init_completion(&mod->buserror_comp);
  1583. /* setup device-specific sysfs attributes */
  1584. ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
  1585. /* the first unallocated page in the DPM is 9 */
  1586. mod->free_page = DPM_FREE_START;
  1587. ndev->netdev_ops = &ican3_netdev_ops;
  1588. ndev->flags |= IFF_ECHO;
  1589. SET_NETDEV_DEV(ndev, &pdev->dev);
  1590. mod->can.clock.freq = ICAN3_CAN_CLOCK;
  1591. mod->can.bittiming_const = &ican3_bittiming_const;
  1592. mod->can.do_set_mode = ican3_set_mode;
  1593. mod->can.do_get_berr_counter = ican3_get_berr_counter;
  1594. mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
  1595. | CAN_CTRLMODE_BERR_REPORTING
  1596. | CAN_CTRLMODE_ONE_SHOT;
  1597. /* find our IRQ number */
  1598. mod->irq = platform_get_irq(pdev, 0);
  1599. if (mod->irq < 0) {
  1600. ret = -ENODEV;
  1601. goto out_free_ndev;
  1602. }
  1603. ndev->irq = mod->irq;
  1604. /* get access to the MODULbus registers for this module */
  1605. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1606. if (!res) {
  1607. dev_err(dev, "MODULbus registers not found\n");
  1608. ret = -ENODEV;
  1609. goto out_free_ndev;
  1610. }
  1611. mod->dpm = ioremap(res->start, resource_size(res));
  1612. if (!mod->dpm) {
  1613. dev_err(dev, "MODULbus registers not ioremap\n");
  1614. ret = -ENOMEM;
  1615. goto out_free_ndev;
  1616. }
  1617. mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
  1618. /* get access to the control registers for this module */
  1619. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  1620. if (!res) {
  1621. dev_err(dev, "CONTROL registers not found\n");
  1622. ret = -ENODEV;
  1623. goto out_iounmap_dpm;
  1624. }
  1625. mod->ctrl = ioremap(res->start, resource_size(res));
  1626. if (!mod->ctrl) {
  1627. dev_err(dev, "CONTROL registers not ioremap\n");
  1628. ret = -ENOMEM;
  1629. goto out_iounmap_dpm;
  1630. }
  1631. /* disable our IRQ, then hookup the IRQ handler */
  1632. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1633. ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
  1634. if (ret) {
  1635. dev_err(dev, "unable to request IRQ\n");
  1636. goto out_iounmap_ctrl;
  1637. }
  1638. /* reset and initialize the CAN controller into fast mode */
  1639. napi_enable(&mod->napi);
  1640. ret = ican3_startup_module(mod);
  1641. if (ret) {
  1642. dev_err(dev, "%s: unable to start CANdev\n", __func__);
  1643. goto out_free_irq;
  1644. }
  1645. /* register with the Linux CAN layer */
  1646. ret = register_candev(ndev);
  1647. if (ret) {
  1648. dev_err(dev, "%s: unable to register CANdev\n", __func__);
  1649. goto out_free_irq;
  1650. }
  1651. netdev_info(mod->ndev, "module %d: registered CAN device\n", pdata->modno);
  1652. return 0;
  1653. out_free_irq:
  1654. napi_disable(&mod->napi);
  1655. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1656. free_irq(mod->irq, mod);
  1657. out_iounmap_ctrl:
  1658. iounmap(mod->ctrl);
  1659. out_iounmap_dpm:
  1660. iounmap(mod->dpm);
  1661. out_free_ndev:
  1662. free_candev(ndev);
  1663. out_return:
  1664. return ret;
  1665. }
  1666. static int ican3_remove(struct platform_device *pdev)
  1667. {
  1668. struct net_device *ndev = platform_get_drvdata(pdev);
  1669. struct ican3_dev *mod = netdev_priv(ndev);
  1670. /* unregister the netdevice, stop interrupts */
  1671. unregister_netdev(ndev);
  1672. napi_disable(&mod->napi);
  1673. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1674. free_irq(mod->irq, mod);
  1675. /* put the module into reset */
  1676. ican3_shutdown_module(mod);
  1677. /* unmap all registers */
  1678. iounmap(mod->ctrl);
  1679. iounmap(mod->dpm);
  1680. free_candev(ndev);
  1681. return 0;
  1682. }
  1683. static struct platform_driver ican3_driver = {
  1684. .driver = {
  1685. .name = DRV_NAME,
  1686. },
  1687. .probe = ican3_probe,
  1688. .remove = ican3_remove,
  1689. };
  1690. module_platform_driver(ican3_driver);
  1691. MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
  1692. MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
  1693. MODULE_LICENSE("GPL");
  1694. MODULE_ALIAS("platform:janz-ican3");