fimc-capture.c 50 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  4. *
  5. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  6. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/kernel.h>
  10. #include <linux/types.h>
  11. #include <linux/errno.h>
  12. #include <linux/bug.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/device.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/list.h>
  17. #include <linux/slab.h>
  18. #include <linux/videodev2.h>
  19. #include <media/v4l2-device.h>
  20. #include <media/v4l2-ioctl.h>
  21. #include <media/v4l2-mem2mem.h>
  22. #include <media/videobuf2-v4l2.h>
  23. #include <media/videobuf2-dma-contig.h>
  24. #include "common.h"
  25. #include "fimc-core.h"
  26. #include "fimc-reg.h"
  27. #include "media-dev.h"
  28. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  29. {
  30. struct fimc_source_info *si = &fimc->vid_cap.source_config;
  31. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  32. int ret;
  33. unsigned long flags;
  34. if (ctx == NULL || ctx->s_frame.fmt == NULL)
  35. return -EINVAL;
  36. if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
  37. ret = fimc_hw_camblk_cfg_writeback(fimc);
  38. if (ret < 0)
  39. return ret;
  40. }
  41. spin_lock_irqsave(&fimc->slock, flags);
  42. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  43. fimc_set_yuv_order(ctx);
  44. fimc_hw_set_camera_polarity(fimc, si);
  45. fimc_hw_set_camera_type(fimc, si);
  46. fimc_hw_set_camera_source(fimc, si);
  47. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  48. ret = fimc_set_scaler_info(ctx);
  49. if (!ret) {
  50. fimc_hw_set_input_path(ctx);
  51. fimc_hw_set_prescaler(ctx);
  52. fimc_hw_set_mainscaler(ctx);
  53. fimc_hw_set_target_format(ctx);
  54. fimc_hw_set_rotation(ctx);
  55. fimc_hw_set_effect(ctx);
  56. fimc_hw_set_output_path(ctx);
  57. fimc_hw_set_out_dma(ctx);
  58. if (fimc->drv_data->alpha_color)
  59. fimc_hw_set_rgb_alpha(ctx);
  60. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  61. }
  62. spin_unlock_irqrestore(&fimc->slock, flags);
  63. return ret;
  64. }
  65. /*
  66. * Reinitialize the driver so it is ready to start the streaming again.
  67. * Set fimc->state to indicate stream off and the hardware shut down state.
  68. * If not suspending (@suspend is false), return any buffers to videobuf2.
  69. * Otherwise put any owned buffers onto the pending buffers queue, so they
  70. * can be re-spun when the device is being resumed. Also perform FIMC
  71. * software reset and disable streaming on the whole pipeline if required.
  72. */
  73. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  74. {
  75. struct fimc_vid_cap *cap = &fimc->vid_cap;
  76. struct fimc_vid_buffer *buf;
  77. unsigned long flags;
  78. bool streaming;
  79. spin_lock_irqsave(&fimc->slock, flags);
  80. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  81. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  82. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  83. if (suspend)
  84. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  85. else
  86. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  87. /* Release unused buffers */
  88. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  89. buf = fimc_pending_queue_pop(cap);
  90. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  91. }
  92. /* If suspending put unused buffers onto pending queue */
  93. while (!list_empty(&cap->active_buf_q)) {
  94. buf = fimc_active_queue_pop(cap);
  95. if (suspend)
  96. fimc_pending_queue_add(cap, buf);
  97. else
  98. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  99. }
  100. fimc_hw_reset(fimc);
  101. cap->buf_index = 0;
  102. spin_unlock_irqrestore(&fimc->slock, flags);
  103. if (streaming)
  104. return fimc_pipeline_call(&cap->ve, set_stream, 0);
  105. else
  106. return 0;
  107. }
  108. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  109. {
  110. unsigned long flags;
  111. if (!fimc_capture_active(fimc))
  112. return 0;
  113. spin_lock_irqsave(&fimc->slock, flags);
  114. set_bit(ST_CAPT_SHUT, &fimc->state);
  115. fimc_deactivate_capture(fimc);
  116. spin_unlock_irqrestore(&fimc->slock, flags);
  117. wait_event_timeout(fimc->irq_queue,
  118. !test_bit(ST_CAPT_SHUT, &fimc->state),
  119. (2*HZ/10)); /* 200 ms */
  120. return fimc_capture_state_cleanup(fimc, suspend);
  121. }
  122. /**
  123. * fimc_capture_config_update - apply the camera interface configuration
  124. * @ctx: FIMC capture context
  125. *
  126. * To be called from within the interrupt handler with fimc.slock
  127. * spinlock held. It updates the camera pixel crop, rotation and
  128. * image flip in H/W.
  129. */
  130. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  131. {
  132. struct fimc_dev *fimc = ctx->fimc_dev;
  133. int ret;
  134. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  135. ret = fimc_set_scaler_info(ctx);
  136. if (ret)
  137. return ret;
  138. fimc_hw_set_prescaler(ctx);
  139. fimc_hw_set_mainscaler(ctx);
  140. fimc_hw_set_target_format(ctx);
  141. fimc_hw_set_rotation(ctx);
  142. fimc_hw_set_effect(ctx);
  143. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  144. fimc_hw_set_out_dma(ctx);
  145. if (fimc->drv_data->alpha_color)
  146. fimc_hw_set_rgb_alpha(ctx);
  147. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  148. return ret;
  149. }
  150. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  151. {
  152. struct fimc_vid_cap *cap = &fimc->vid_cap;
  153. struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);
  154. struct v4l2_subdev *csis = p->subdevs[IDX_CSIS];
  155. struct fimc_frame *f = &cap->ctx->d_frame;
  156. struct fimc_vid_buffer *v_buf;
  157. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  158. wake_up(&fimc->irq_queue);
  159. goto done;
  160. }
  161. if (!list_empty(&cap->active_buf_q) &&
  162. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  163. v_buf = fimc_active_queue_pop(cap);
  164. v_buf->vb.vb2_buf.timestamp = ktime_get_ns();
  165. v_buf->vb.sequence = cap->frame_count++;
  166. vb2_buffer_done(&v_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
  167. }
  168. if (!list_empty(&cap->pending_buf_q)) {
  169. v_buf = fimc_pending_queue_pop(cap);
  170. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  171. v_buf->index = cap->buf_index;
  172. /* Move the buffer to the capture active queue */
  173. fimc_active_queue_add(cap, v_buf);
  174. dbg("next frame: %d, done frame: %d",
  175. fimc_hw_get_frame_index(fimc), v_buf->index);
  176. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  177. cap->buf_index = 0;
  178. }
  179. /*
  180. * Set up a buffer at MIPI-CSIS if current image format
  181. * requires the frame embedded data capture.
  182. */
  183. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  184. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  185. unsigned int size = f->payload[plane];
  186. s32 index = fimc_hw_get_frame_index(fimc);
  187. void *vaddr;
  188. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  189. if (v_buf->index != index)
  190. continue;
  191. vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane);
  192. v4l2_subdev_call(csis, video, s_rx_buffer,
  193. vaddr, &size);
  194. break;
  195. }
  196. }
  197. if (cap->active_buf_cnt == 0) {
  198. if (deq_buf)
  199. clear_bit(ST_CAPT_RUN, &fimc->state);
  200. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  201. cap->buf_index = 0;
  202. } else {
  203. set_bit(ST_CAPT_RUN, &fimc->state);
  204. }
  205. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  206. fimc_capture_config_update(cap->ctx);
  207. done:
  208. if (cap->active_buf_cnt == 1) {
  209. fimc_deactivate_capture(fimc);
  210. clear_bit(ST_CAPT_STREAM, &fimc->state);
  211. }
  212. dbg("frame: %d, active_buf_cnt: %d",
  213. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  214. }
  215. static int start_streaming(struct vb2_queue *q, unsigned int count)
  216. {
  217. struct fimc_ctx *ctx = q->drv_priv;
  218. struct fimc_dev *fimc = ctx->fimc_dev;
  219. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  220. int min_bufs;
  221. int ret;
  222. vid_cap->frame_count = 0;
  223. ret = fimc_capture_hw_init(fimc);
  224. if (ret) {
  225. fimc_capture_state_cleanup(fimc, false);
  226. return ret;
  227. }
  228. set_bit(ST_CAPT_PEND, &fimc->state);
  229. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  230. if (vid_cap->active_buf_cnt >= min_bufs &&
  231. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  232. fimc_activate_capture(ctx);
  233. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  234. return fimc_pipeline_call(&vid_cap->ve, set_stream, 1);
  235. }
  236. return 0;
  237. }
  238. static void stop_streaming(struct vb2_queue *q)
  239. {
  240. struct fimc_ctx *ctx = q->drv_priv;
  241. struct fimc_dev *fimc = ctx->fimc_dev;
  242. if (!fimc_capture_active(fimc))
  243. return;
  244. fimc_stop_capture(fimc, false);
  245. }
  246. int fimc_capture_suspend(struct fimc_dev *fimc)
  247. {
  248. bool suspend = fimc_capture_busy(fimc);
  249. int ret = fimc_stop_capture(fimc, suspend);
  250. if (ret)
  251. return ret;
  252. return fimc_pipeline_call(&fimc->vid_cap.ve, close);
  253. }
  254. static void buffer_queue(struct vb2_buffer *vb);
  255. int fimc_capture_resume(struct fimc_dev *fimc)
  256. {
  257. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  258. struct exynos_video_entity *ve = &vid_cap->ve;
  259. struct fimc_vid_buffer *buf;
  260. int i;
  261. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  262. return 0;
  263. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  264. vid_cap->buf_index = 0;
  265. fimc_pipeline_call(ve, open, &ve->vdev.entity, false);
  266. fimc_capture_hw_init(fimc);
  267. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  268. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  269. if (list_empty(&vid_cap->pending_buf_q))
  270. break;
  271. buf = fimc_pending_queue_pop(vid_cap);
  272. buffer_queue(&buf->vb.vb2_buf);
  273. }
  274. return 0;
  275. }
  276. static int queue_setup(struct vb2_queue *vq,
  277. unsigned int *num_buffers, unsigned int *num_planes,
  278. unsigned int sizes[], struct device *alloc_devs[])
  279. {
  280. struct fimc_ctx *ctx = vq->drv_priv;
  281. struct fimc_frame *frame = &ctx->d_frame;
  282. struct fimc_fmt *fmt = frame->fmt;
  283. unsigned long wh = frame->f_width * frame->f_height;
  284. int i;
  285. if (fmt == NULL)
  286. return -EINVAL;
  287. if (*num_planes) {
  288. if (*num_planes != fmt->memplanes)
  289. return -EINVAL;
  290. for (i = 0; i < *num_planes; i++)
  291. if (sizes[i] < (wh * fmt->depth[i]) / 8)
  292. return -EINVAL;
  293. return 0;
  294. }
  295. *num_planes = fmt->memplanes;
  296. for (i = 0; i < fmt->memplanes; i++) {
  297. unsigned int size = (wh * fmt->depth[i]) / 8;
  298. if (fimc_fmt_is_user_defined(fmt->color))
  299. sizes[i] = frame->payload[i];
  300. else
  301. sizes[i] = max_t(u32, size, frame->payload[i]);
  302. }
  303. return 0;
  304. }
  305. static int buffer_prepare(struct vb2_buffer *vb)
  306. {
  307. struct vb2_queue *vq = vb->vb2_queue;
  308. struct fimc_ctx *ctx = vq->drv_priv;
  309. int i;
  310. if (ctx->d_frame.fmt == NULL)
  311. return -EINVAL;
  312. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  313. unsigned long size = ctx->d_frame.payload[i];
  314. if (vb2_plane_size(vb, i) < size) {
  315. v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
  316. "User buffer too small (%ld < %ld)\n",
  317. vb2_plane_size(vb, i), size);
  318. return -EINVAL;
  319. }
  320. vb2_set_plane_payload(vb, i, size);
  321. }
  322. return 0;
  323. }
  324. static void buffer_queue(struct vb2_buffer *vb)
  325. {
  326. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  327. struct fimc_vid_buffer *buf
  328. = container_of(vbuf, struct fimc_vid_buffer, vb);
  329. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  330. struct fimc_dev *fimc = ctx->fimc_dev;
  331. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  332. struct exynos_video_entity *ve = &vid_cap->ve;
  333. unsigned long flags;
  334. int min_bufs;
  335. spin_lock_irqsave(&fimc->slock, flags);
  336. fimc_prepare_addr(ctx, &buf->vb.vb2_buf, &ctx->d_frame, &buf->paddr);
  337. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  338. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  339. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  340. /* Setup the buffer directly for processing. */
  341. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  342. vid_cap->buf_index;
  343. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  344. buf->index = vid_cap->buf_index;
  345. fimc_active_queue_add(vid_cap, buf);
  346. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  347. vid_cap->buf_index = 0;
  348. } else {
  349. fimc_pending_queue_add(vid_cap, buf);
  350. }
  351. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  352. if (vb2_is_streaming(&vid_cap->vbq) &&
  353. vid_cap->active_buf_cnt >= min_bufs &&
  354. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  355. int ret;
  356. fimc_activate_capture(ctx);
  357. spin_unlock_irqrestore(&fimc->slock, flags);
  358. if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  359. return;
  360. ret = fimc_pipeline_call(ve, set_stream, 1);
  361. if (ret < 0)
  362. v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
  363. return;
  364. }
  365. spin_unlock_irqrestore(&fimc->slock, flags);
  366. }
  367. static const struct vb2_ops fimc_capture_qops = {
  368. .queue_setup = queue_setup,
  369. .buf_prepare = buffer_prepare,
  370. .buf_queue = buffer_queue,
  371. .wait_prepare = vb2_ops_wait_prepare,
  372. .wait_finish = vb2_ops_wait_finish,
  373. .start_streaming = start_streaming,
  374. .stop_streaming = stop_streaming,
  375. };
  376. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  377. static int fimc_capture_open(struct file *file)
  378. {
  379. struct fimc_dev *fimc = video_drvdata(file);
  380. struct fimc_vid_cap *vc = &fimc->vid_cap;
  381. struct exynos_video_entity *ve = &vc->ve;
  382. int ret = -EBUSY;
  383. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  384. mutex_lock(&fimc->lock);
  385. if (fimc_m2m_active(fimc))
  386. goto unlock;
  387. set_bit(ST_CAPT_BUSY, &fimc->state);
  388. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  389. if (ret < 0)
  390. goto unlock;
  391. ret = v4l2_fh_open(file);
  392. if (ret) {
  393. pm_runtime_put_sync(&fimc->pdev->dev);
  394. goto unlock;
  395. }
  396. if (v4l2_fh_is_singular_file(file)) {
  397. fimc_md_graph_lock(ve);
  398. ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true);
  399. if (ret == 0 && vc->user_subdev_api && vc->inh_sensor_ctrls) {
  400. /*
  401. * Recreate controls of the the video node to drop
  402. * any controls inherited from the sensor subdev.
  403. */
  404. fimc_ctrls_delete(vc->ctx);
  405. ret = fimc_ctrls_create(vc->ctx);
  406. if (ret == 0)
  407. vc->inh_sensor_ctrls = false;
  408. }
  409. if (ret == 0)
  410. ve->vdev.entity.use_count++;
  411. fimc_md_graph_unlock(ve);
  412. if (ret == 0)
  413. ret = fimc_capture_set_default_format(fimc);
  414. if (ret < 0) {
  415. clear_bit(ST_CAPT_BUSY, &fimc->state);
  416. pm_runtime_put_sync(&fimc->pdev->dev);
  417. v4l2_fh_release(file);
  418. }
  419. }
  420. unlock:
  421. mutex_unlock(&fimc->lock);
  422. return ret;
  423. }
  424. static int fimc_capture_release(struct file *file)
  425. {
  426. struct fimc_dev *fimc = video_drvdata(file);
  427. struct fimc_vid_cap *vc = &fimc->vid_cap;
  428. bool close = v4l2_fh_is_singular_file(file);
  429. int ret;
  430. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  431. mutex_lock(&fimc->lock);
  432. if (close && vc->streaming) {
  433. media_pipeline_stop(&vc->ve.vdev.entity);
  434. vc->streaming = false;
  435. }
  436. ret = _vb2_fop_release(file, NULL);
  437. if (close) {
  438. clear_bit(ST_CAPT_BUSY, &fimc->state);
  439. fimc_pipeline_call(&vc->ve, close);
  440. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  441. fimc_md_graph_lock(&vc->ve);
  442. vc->ve.vdev.entity.use_count--;
  443. fimc_md_graph_unlock(&vc->ve);
  444. }
  445. pm_runtime_put_sync(&fimc->pdev->dev);
  446. mutex_unlock(&fimc->lock);
  447. return ret;
  448. }
  449. static const struct v4l2_file_operations fimc_capture_fops = {
  450. .owner = THIS_MODULE,
  451. .open = fimc_capture_open,
  452. .release = fimc_capture_release,
  453. .poll = vb2_fop_poll,
  454. .unlocked_ioctl = video_ioctl2,
  455. .mmap = vb2_fop_mmap,
  456. };
  457. /*
  458. * Format and crop negotiation helpers
  459. */
  460. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  461. u32 *width, u32 *height,
  462. u32 *code, u32 *fourcc, int pad)
  463. {
  464. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  465. struct fimc_dev *fimc = ctx->fimc_dev;
  466. const struct fimc_variant *var = fimc->variant;
  467. const struct fimc_pix_limit *pl = var->pix_limit;
  468. struct fimc_frame *dst = &ctx->d_frame;
  469. u32 depth, min_w, max_w, min_h, align_h = 3;
  470. u32 mask = FMT_FLAGS_CAM;
  471. struct fimc_fmt *ffmt;
  472. /* Conversion from/to JPEG or User Defined format is not supported */
  473. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  474. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  475. *code = ctx->s_frame.fmt->mbus_code;
  476. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
  477. mask |= FMT_FLAGS_M2M;
  478. if (pad == FIMC_SD_PAD_SINK_FIFO)
  479. mask = FMT_FLAGS_WRITEBACK;
  480. ffmt = fimc_find_format(fourcc, code, mask, 0);
  481. if (WARN_ON(!ffmt))
  482. return NULL;
  483. if (code)
  484. *code = ffmt->mbus_code;
  485. if (fourcc)
  486. *fourcc = ffmt->fourcc;
  487. if (pad != FIMC_SD_PAD_SOURCE) {
  488. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  489. pl->scaler_dis_w : pl->scaler_en_w;
  490. /* Apply the camera input interface pixel constraints */
  491. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  492. height, max_t(u32, *height, 32),
  493. FIMC_CAMIF_MAX_HEIGHT,
  494. fimc_fmt_is_user_defined(ffmt->color) ?
  495. 3 : 1,
  496. 0);
  497. return ffmt;
  498. }
  499. /* Can't scale or crop in transparent (JPEG) transfer mode */
  500. if (fimc_fmt_is_user_defined(ffmt->color)) {
  501. *width = ctx->s_frame.f_width;
  502. *height = ctx->s_frame.f_height;
  503. return ffmt;
  504. }
  505. /* Apply the scaler and the output DMA constraints */
  506. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  507. if (ctx->state & FIMC_COMPOSE) {
  508. min_w = dst->offs_h + dst->width;
  509. min_h = dst->offs_v + dst->height;
  510. } else {
  511. min_w = var->min_out_pixsize;
  512. min_h = var->min_out_pixsize;
  513. }
  514. if (var->min_vsize_align == 1 && !rotation)
  515. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  516. depth = fimc_get_format_depth(ffmt);
  517. v4l_bound_align_image(width, min_w, max_w,
  518. ffs(var->min_out_pixsize) - 1,
  519. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  520. align_h,
  521. 64/(ALIGN(depth, 8)));
  522. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  523. pad, code ? *code : 0, *width, *height,
  524. dst->f_width, dst->f_height);
  525. return ffmt;
  526. }
  527. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  528. struct v4l2_rect *r,
  529. int target)
  530. {
  531. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  532. struct fimc_dev *fimc = ctx->fimc_dev;
  533. const struct fimc_variant *var = fimc->variant;
  534. const struct fimc_pix_limit *pl = var->pix_limit;
  535. struct fimc_frame *sink = &ctx->s_frame;
  536. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  537. u32 align_sz = 0, align_h = 4;
  538. u32 max_sc_h, max_sc_v;
  539. /* In JPEG transparent transfer mode cropping is not supported */
  540. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  541. r->width = sink->f_width;
  542. r->height = sink->f_height;
  543. r->left = r->top = 0;
  544. return;
  545. }
  546. if (target == V4L2_SEL_TGT_COMPOSE) {
  547. u32 tmp_min_h = ffs(sink->width) - 3;
  548. u32 tmp_min_v = ffs(sink->height) - 1;
  549. if (ctx->rotation != 90 && ctx->rotation != 270)
  550. align_h = 1;
  551. max_sc_h = min(SCALER_MAX_HRATIO, 1 << tmp_min_h);
  552. max_sc_v = min(SCALER_MAX_VRATIO, 1 << tmp_min_v);
  553. min_sz = var->min_out_pixsize;
  554. } else {
  555. u32 depth = fimc_get_format_depth(sink->fmt);
  556. align_sz = 64/ALIGN(depth, 8);
  557. min_sz = var->min_inp_pixsize;
  558. min_w = min_h = min_sz;
  559. max_sc_h = max_sc_v = 1;
  560. }
  561. /*
  562. * For the compose rectangle the following constraints must be met:
  563. * - it must fit in the sink pad format rectangle (f_width/f_height);
  564. * - maximum downscaling ratio is 64;
  565. * - maximum crop size depends if the rotator is used or not;
  566. * - the sink pad format width/height must be 4 multiple of the
  567. * prescaler ratios determined by sink pad size and source pad crop,
  568. * the prescaler ratio is returned by fimc_get_scaler_factor().
  569. */
  570. max_w = min_t(u32,
  571. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  572. rotate ? sink->f_height : sink->f_width);
  573. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  574. if (target == V4L2_SEL_TGT_COMPOSE) {
  575. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  576. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  577. if (rotate) {
  578. swap(max_sc_h, max_sc_v);
  579. swap(min_w, min_h);
  580. }
  581. }
  582. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  583. &r->height, min_h, max_h, align_h,
  584. align_sz);
  585. /* Adjust left/top if crop/compose rectangle is out of bounds */
  586. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  587. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  588. r->left = round_down(r->left, var->hor_offs_align);
  589. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  590. target, r->left, r->top, r->width, r->height,
  591. sink->f_width, sink->f_height);
  592. }
  593. /*
  594. * The video node ioctl operations
  595. */
  596. static int fimc_cap_querycap(struct file *file, void *priv,
  597. struct v4l2_capability *cap)
  598. {
  599. struct fimc_dev *fimc = video_drvdata(file);
  600. __fimc_vidioc_querycap(&fimc->pdev->dev, cap);
  601. return 0;
  602. }
  603. static int fimc_cap_enum_fmt(struct file *file, void *priv,
  604. struct v4l2_fmtdesc *f)
  605. {
  606. struct fimc_fmt *fmt;
  607. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  608. f->index);
  609. if (!fmt)
  610. return -EINVAL;
  611. f->pixelformat = fmt->fourcc;
  612. return 0;
  613. }
  614. static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
  615. {
  616. struct media_pad *pad = &me->pads[0];
  617. while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
  618. pad = media_entity_remote_pad(pad);
  619. if (!pad)
  620. break;
  621. me = pad->entity;
  622. pad = &me->pads[0];
  623. }
  624. return me;
  625. }
  626. /**
  627. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  628. * elements
  629. * @ctx: FIMC capture context
  630. * @tfmt: media bus format to try/set on subdevs
  631. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  632. * @set: true to set format on subdevs, false to try only
  633. */
  634. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  635. struct v4l2_mbus_framefmt *tfmt,
  636. struct fimc_fmt **fmt_id,
  637. bool set)
  638. {
  639. struct fimc_dev *fimc = ctx->fimc_dev;
  640. struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);
  641. struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
  642. struct v4l2_subdev_format sfmt;
  643. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  644. struct media_entity *me;
  645. struct fimc_fmt *ffmt;
  646. struct media_pad *pad;
  647. int ret, i = 1;
  648. u32 fcc;
  649. if (WARN_ON(!sd || !tfmt))
  650. return -EINVAL;
  651. memset(&sfmt, 0, sizeof(sfmt));
  652. sfmt.format = *tfmt;
  653. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  654. me = fimc_pipeline_get_head(&sd->entity);
  655. while (1) {
  656. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  657. FMT_FLAGS_CAM, i++);
  658. if (ffmt == NULL) {
  659. /*
  660. * Notify user-space if common pixel code for
  661. * host and sensor does not exist.
  662. */
  663. return -EINVAL;
  664. }
  665. mf->code = tfmt->code = ffmt->mbus_code;
  666. /* set format on all pipeline subdevs */
  667. while (me != &fimc->vid_cap.subdev.entity) {
  668. sd = media_entity_to_v4l2_subdev(me);
  669. sfmt.pad = 0;
  670. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  671. if (ret)
  672. return ret;
  673. if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
  674. sfmt.pad = me->num_pads - 1;
  675. mf->code = tfmt->code;
  676. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
  677. &sfmt);
  678. if (ret)
  679. return ret;
  680. }
  681. pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
  682. if (!pad)
  683. return -EINVAL;
  684. me = pad->entity;
  685. }
  686. if (mf->code != tfmt->code)
  687. continue;
  688. fcc = ffmt->fourcc;
  689. tfmt->width = mf->width;
  690. tfmt->height = mf->height;
  691. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  692. NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
  693. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  694. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  695. if (ffmt && ffmt->mbus_code)
  696. mf->code = ffmt->mbus_code;
  697. if (mf->width != tfmt->width || mf->height != tfmt->height)
  698. continue;
  699. tfmt->code = mf->code;
  700. break;
  701. }
  702. if (fmt_id && ffmt)
  703. *fmt_id = ffmt;
  704. *tfmt = *mf;
  705. return 0;
  706. }
  707. /**
  708. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  709. * @sensor: pointer to the sensor subdev
  710. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  711. * @num_planes: number of planes
  712. * @try: true to set the frame parameters, false to query only
  713. *
  714. * This function is used by this driver only for compressed/blob data formats.
  715. */
  716. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  717. struct v4l2_plane_pix_format *plane_fmt,
  718. unsigned int num_planes, bool try)
  719. {
  720. struct v4l2_mbus_frame_desc fd;
  721. int i, ret;
  722. int pad;
  723. for (i = 0; i < num_planes; i++)
  724. fd.entry[i].length = plane_fmt[i].sizeimage;
  725. pad = sensor->entity.num_pads - 1;
  726. if (try)
  727. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
  728. else
  729. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
  730. if (ret < 0)
  731. return ret;
  732. if (num_planes != fd.num_entries)
  733. return -EINVAL;
  734. for (i = 0; i < num_planes; i++)
  735. plane_fmt[i].sizeimage = fd.entry[i].length;
  736. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  737. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  738. fd.entry[0].length);
  739. return -EINVAL;
  740. }
  741. return 0;
  742. }
  743. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  744. struct v4l2_format *f)
  745. {
  746. struct fimc_dev *fimc = video_drvdata(file);
  747. __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
  748. return 0;
  749. }
  750. /*
  751. * Try or set format on the fimc.X.capture video node and additionally
  752. * on the whole pipeline if @try is false.
  753. * Locking: the caller must _not_ hold the graph mutex.
  754. */
  755. static int __video_try_or_set_format(struct fimc_dev *fimc,
  756. struct v4l2_format *f, bool try,
  757. struct fimc_fmt **inp_fmt,
  758. struct fimc_fmt **out_fmt)
  759. {
  760. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  761. struct fimc_vid_cap *vc = &fimc->vid_cap;
  762. struct exynos_video_entity *ve = &vc->ve;
  763. struct fimc_ctx *ctx = vc->ctx;
  764. unsigned int width = 0, height = 0;
  765. int ret = 0;
  766. /* Pre-configure format at the camera input interface, for JPEG only */
  767. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  768. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  769. NULL, &pix->pixelformat,
  770. FIMC_SD_PAD_SINK_CAM);
  771. if (try) {
  772. width = pix->width;
  773. height = pix->height;
  774. } else {
  775. ctx->s_frame.f_width = pix->width;
  776. ctx->s_frame.f_height = pix->height;
  777. }
  778. }
  779. /* Try the format at the scaler and the DMA output */
  780. *out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  781. NULL, &pix->pixelformat,
  782. FIMC_SD_PAD_SOURCE);
  783. if (*out_fmt == NULL)
  784. return -EINVAL;
  785. /* Restore image width/height for JPEG (no resizing supported). */
  786. if (try && fimc_jpeg_fourcc(pix->pixelformat)) {
  787. pix->width = width;
  788. pix->height = height;
  789. }
  790. /* Try to match format at the host and the sensor */
  791. if (!vc->user_subdev_api) {
  792. struct v4l2_mbus_framefmt mbus_fmt;
  793. struct v4l2_mbus_framefmt *mf;
  794. mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt;
  795. mf->code = (*out_fmt)->mbus_code;
  796. mf->width = pix->width;
  797. mf->height = pix->height;
  798. fimc_md_graph_lock(ve);
  799. ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try);
  800. fimc_md_graph_unlock(ve);
  801. if (ret < 0)
  802. return ret;
  803. pix->width = mf->width;
  804. pix->height = mf->height;
  805. }
  806. fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix);
  807. if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) {
  808. struct v4l2_subdev *sensor;
  809. fimc_md_graph_lock(ve);
  810. sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
  811. if (sensor)
  812. fimc_get_sensor_frame_desc(sensor, pix->plane_fmt,
  813. (*out_fmt)->memplanes, try);
  814. else
  815. ret = -EPIPE;
  816. fimc_md_graph_unlock(ve);
  817. }
  818. return ret;
  819. }
  820. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  821. struct v4l2_format *f)
  822. {
  823. struct fimc_dev *fimc = video_drvdata(file);
  824. struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL;
  825. return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt);
  826. }
  827. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  828. enum fimc_color_fmt color)
  829. {
  830. bool jpeg = fimc_fmt_is_user_defined(color);
  831. ctx->scaler.enabled = !jpeg;
  832. fimc_ctrls_activate(ctx, !jpeg);
  833. if (jpeg)
  834. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  835. else
  836. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  837. }
  838. static int __fimc_capture_set_format(struct fimc_dev *fimc,
  839. struct v4l2_format *f)
  840. {
  841. struct fimc_vid_cap *vc = &fimc->vid_cap;
  842. struct fimc_ctx *ctx = vc->ctx;
  843. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  844. struct fimc_frame *ff = &ctx->d_frame;
  845. struct fimc_fmt *inp_fmt = NULL;
  846. int ret, i;
  847. if (vb2_is_busy(&fimc->vid_cap.vbq))
  848. return -EBUSY;
  849. ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt);
  850. if (ret < 0)
  851. return ret;
  852. /* Update RGB Alpha control state and value range */
  853. fimc_alpha_ctrl_update(ctx);
  854. for (i = 0; i < ff->fmt->memplanes; i++) {
  855. ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
  856. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  857. }
  858. set_frame_bounds(ff, pix->width, pix->height);
  859. /* Reset the composition rectangle if not yet configured */
  860. if (!(ctx->state & FIMC_COMPOSE))
  861. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  862. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  863. /* Reset cropping and set format at the camera interface input */
  864. if (!vc->user_subdev_api) {
  865. ctx->s_frame.fmt = inp_fmt;
  866. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  867. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  868. }
  869. return ret;
  870. }
  871. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  872. struct v4l2_format *f)
  873. {
  874. struct fimc_dev *fimc = video_drvdata(file);
  875. return __fimc_capture_set_format(fimc, f);
  876. }
  877. static int fimc_cap_enum_input(struct file *file, void *priv,
  878. struct v4l2_input *i)
  879. {
  880. struct fimc_dev *fimc = video_drvdata(file);
  881. struct exynos_video_entity *ve = &fimc->vid_cap.ve;
  882. struct v4l2_subdev *sd;
  883. if (i->index != 0)
  884. return -EINVAL;
  885. i->type = V4L2_INPUT_TYPE_CAMERA;
  886. fimc_md_graph_lock(ve);
  887. sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
  888. fimc_md_graph_unlock(ve);
  889. if (sd)
  890. strscpy(i->name, sd->name, sizeof(i->name));
  891. return 0;
  892. }
  893. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  894. {
  895. return i == 0 ? i : -EINVAL;
  896. }
  897. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  898. {
  899. *i = 0;
  900. return 0;
  901. }
  902. /**
  903. * fimc_pipeline_validate - check for formats inconsistencies
  904. * between source and sink pad of each link
  905. * @fimc: the FIMC device this context applies to
  906. *
  907. * Return 0 if all formats match or -EPIPE otherwise.
  908. */
  909. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  910. {
  911. struct v4l2_subdev_format sink_fmt, src_fmt;
  912. struct fimc_vid_cap *vc = &fimc->vid_cap;
  913. struct v4l2_subdev *sd = &vc->subdev;
  914. struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);
  915. struct media_pad *sink_pad, *src_pad;
  916. int i, ret;
  917. while (1) {
  918. /*
  919. * Find current entity sink pad and any remote sink pad linked
  920. * to it. We stop if there is no sink pad in current entity or
  921. * it is not linked to any other remote entity.
  922. */
  923. src_pad = NULL;
  924. for (i = 0; i < sd->entity.num_pads; i++) {
  925. struct media_pad *p = &sd->entity.pads[i];
  926. if (p->flags & MEDIA_PAD_FL_SINK) {
  927. sink_pad = p;
  928. src_pad = media_entity_remote_pad(sink_pad);
  929. if (src_pad)
  930. break;
  931. }
  932. }
  933. if (!src_pad || !is_media_entity_v4l2_subdev(src_pad->entity))
  934. break;
  935. /* Don't call FIMC subdev operation to avoid nested locking */
  936. if (sd == &vc->subdev) {
  937. struct fimc_frame *ff = &vc->ctx->s_frame;
  938. sink_fmt.format.width = ff->f_width;
  939. sink_fmt.format.height = ff->f_height;
  940. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  941. } else {
  942. sink_fmt.pad = sink_pad->index;
  943. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  944. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  945. if (ret < 0 && ret != -ENOIOCTLCMD)
  946. return -EPIPE;
  947. }
  948. /* Retrieve format at the source pad */
  949. sd = media_entity_to_v4l2_subdev(src_pad->entity);
  950. src_fmt.pad = src_pad->index;
  951. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  952. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  953. if (ret < 0 && ret != -ENOIOCTLCMD)
  954. return -EPIPE;
  955. if (src_fmt.format.width != sink_fmt.format.width ||
  956. src_fmt.format.height != sink_fmt.format.height ||
  957. src_fmt.format.code != sink_fmt.format.code)
  958. return -EPIPE;
  959. if (sd == p->subdevs[IDX_SENSOR] &&
  960. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  961. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  962. struct fimc_frame *frame = &vc->ctx->d_frame;
  963. unsigned int i;
  964. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  965. frame->fmt->memplanes,
  966. false);
  967. if (ret < 0)
  968. return -EPIPE;
  969. for (i = 0; i < frame->fmt->memplanes; i++)
  970. if (frame->payload[i] < plane_fmt[i].sizeimage)
  971. return -EPIPE;
  972. }
  973. }
  974. return 0;
  975. }
  976. static int fimc_cap_streamon(struct file *file, void *priv,
  977. enum v4l2_buf_type type)
  978. {
  979. struct fimc_dev *fimc = video_drvdata(file);
  980. struct fimc_vid_cap *vc = &fimc->vid_cap;
  981. struct media_entity *entity = &vc->ve.vdev.entity;
  982. struct fimc_source_info *si = NULL;
  983. struct v4l2_subdev *sd;
  984. int ret;
  985. if (fimc_capture_active(fimc))
  986. return -EBUSY;
  987. ret = media_pipeline_start(entity, &vc->ve.pipe->mp);
  988. if (ret < 0)
  989. return ret;
  990. sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);
  991. if (sd)
  992. si = v4l2_get_subdev_hostdata(sd);
  993. if (si == NULL) {
  994. ret = -EPIPE;
  995. goto err_p_stop;
  996. }
  997. /*
  998. * Save configuration data related to currently attached image
  999. * sensor or other data source, e.g. FIMC-IS.
  1000. */
  1001. vc->source_config = *si;
  1002. if (vc->input == GRP_ID_FIMC_IS)
  1003. vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  1004. if (vc->user_subdev_api) {
  1005. ret = fimc_pipeline_validate(fimc);
  1006. if (ret < 0)
  1007. goto err_p_stop;
  1008. }
  1009. ret = vb2_ioctl_streamon(file, priv, type);
  1010. if (!ret) {
  1011. vc->streaming = true;
  1012. return ret;
  1013. }
  1014. err_p_stop:
  1015. media_pipeline_stop(entity);
  1016. return ret;
  1017. }
  1018. static int fimc_cap_streamoff(struct file *file, void *priv,
  1019. enum v4l2_buf_type type)
  1020. {
  1021. struct fimc_dev *fimc = video_drvdata(file);
  1022. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1023. int ret;
  1024. ret = vb2_ioctl_streamoff(file, priv, type);
  1025. if (ret < 0)
  1026. return ret;
  1027. media_pipeline_stop(&vc->ve.vdev.entity);
  1028. vc->streaming = false;
  1029. return 0;
  1030. }
  1031. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1032. struct v4l2_requestbuffers *reqbufs)
  1033. {
  1034. struct fimc_dev *fimc = video_drvdata(file);
  1035. int ret;
  1036. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  1037. if (!ret)
  1038. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1039. return ret;
  1040. }
  1041. static int fimc_cap_g_selection(struct file *file, void *fh,
  1042. struct v4l2_selection *s)
  1043. {
  1044. struct fimc_dev *fimc = video_drvdata(file);
  1045. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1046. struct fimc_frame *f = &ctx->s_frame;
  1047. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  1048. return -EINVAL;
  1049. switch (s->target) {
  1050. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1051. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1052. f = &ctx->d_frame;
  1053. /* fall through */
  1054. case V4L2_SEL_TGT_CROP_BOUNDS:
  1055. case V4L2_SEL_TGT_CROP_DEFAULT:
  1056. s->r.left = 0;
  1057. s->r.top = 0;
  1058. s->r.width = f->o_width;
  1059. s->r.height = f->o_height;
  1060. return 0;
  1061. case V4L2_SEL_TGT_COMPOSE:
  1062. f = &ctx->d_frame;
  1063. /* fall through */
  1064. case V4L2_SEL_TGT_CROP:
  1065. s->r.left = f->offs_h;
  1066. s->r.top = f->offs_v;
  1067. s->r.width = f->width;
  1068. s->r.height = f->height;
  1069. return 0;
  1070. }
  1071. return -EINVAL;
  1072. }
  1073. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1074. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1075. {
  1076. if (a->left < b->left || a->top < b->top)
  1077. return 0;
  1078. if (a->left + a->width > b->left + b->width)
  1079. return 0;
  1080. if (a->top + a->height > b->top + b->height)
  1081. return 0;
  1082. return 1;
  1083. }
  1084. static int fimc_cap_s_selection(struct file *file, void *fh,
  1085. struct v4l2_selection *s)
  1086. {
  1087. struct fimc_dev *fimc = video_drvdata(file);
  1088. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1089. struct v4l2_rect rect = s->r;
  1090. struct fimc_frame *f;
  1091. unsigned long flags;
  1092. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  1093. return -EINVAL;
  1094. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1095. f = &ctx->d_frame;
  1096. else if (s->target == V4L2_SEL_TGT_CROP)
  1097. f = &ctx->s_frame;
  1098. else
  1099. return -EINVAL;
  1100. fimc_capture_try_selection(ctx, &rect, s->target);
  1101. if (s->flags & V4L2_SEL_FLAG_LE &&
  1102. !enclosed_rectangle(&rect, &s->r))
  1103. return -ERANGE;
  1104. if (s->flags & V4L2_SEL_FLAG_GE &&
  1105. !enclosed_rectangle(&s->r, &rect))
  1106. return -ERANGE;
  1107. s->r = rect;
  1108. spin_lock_irqsave(&fimc->slock, flags);
  1109. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1110. s->r.height);
  1111. spin_unlock_irqrestore(&fimc->slock, flags);
  1112. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1113. return 0;
  1114. }
  1115. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1116. .vidioc_querycap = fimc_cap_querycap,
  1117. .vidioc_enum_fmt_vid_cap = fimc_cap_enum_fmt,
  1118. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1119. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1120. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1121. .vidioc_reqbufs = fimc_cap_reqbufs,
  1122. .vidioc_querybuf = vb2_ioctl_querybuf,
  1123. .vidioc_qbuf = vb2_ioctl_qbuf,
  1124. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1125. .vidioc_expbuf = vb2_ioctl_expbuf,
  1126. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1127. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1128. .vidioc_streamon = fimc_cap_streamon,
  1129. .vidioc_streamoff = fimc_cap_streamoff,
  1130. .vidioc_g_selection = fimc_cap_g_selection,
  1131. .vidioc_s_selection = fimc_cap_s_selection,
  1132. .vidioc_enum_input = fimc_cap_enum_input,
  1133. .vidioc_s_input = fimc_cap_s_input,
  1134. .vidioc_g_input = fimc_cap_g_input,
  1135. };
  1136. /* Capture subdev media entity operations */
  1137. static int fimc_link_setup(struct media_entity *entity,
  1138. const struct media_pad *local,
  1139. const struct media_pad *remote, u32 flags)
  1140. {
  1141. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1142. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1143. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1144. struct v4l2_subdev *sensor;
  1145. if (!is_media_entity_v4l2_subdev(remote->entity))
  1146. return -EINVAL;
  1147. if (WARN_ON(fimc == NULL))
  1148. return 0;
  1149. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1150. local->entity->name, remote->entity->name, flags,
  1151. fimc->vid_cap.input);
  1152. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1153. fimc->vid_cap.input = 0;
  1154. return 0;
  1155. }
  1156. if (vc->input != 0)
  1157. return -EBUSY;
  1158. vc->input = sd->grp_id;
  1159. if (vc->user_subdev_api || vc->inh_sensor_ctrls)
  1160. return 0;
  1161. /* Inherit V4L2 controls from the image sensor subdev. */
  1162. sensor = fimc_find_remote_sensor(&vc->subdev.entity);
  1163. if (sensor == NULL)
  1164. return 0;
  1165. return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
  1166. sensor->ctrl_handler, NULL, true);
  1167. }
  1168. static const struct media_entity_operations fimc_sd_media_ops = {
  1169. .link_setup = fimc_link_setup,
  1170. };
  1171. /**
  1172. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1173. * @sd: pointer to a subdev generating the notification
  1174. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1175. * @arg: pointer to an u32 type integer that stores the frame payload value
  1176. *
  1177. * The End Of Frame notification sent by sensor subdev in its still capture
  1178. * mode. If there is only a single VSYNC generated by the sensor at the
  1179. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1180. * (end of frame) interrupt. And this notification is used to complete the
  1181. * frame capture and returning a buffer to user-space. Subdev drivers should
  1182. * call this notification from their last 'End of frame capture' interrupt.
  1183. */
  1184. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1185. void *arg)
  1186. {
  1187. struct fimc_source_info *si;
  1188. struct fimc_vid_buffer *buf;
  1189. struct fimc_md *fmd;
  1190. struct fimc_dev *fimc;
  1191. unsigned long flags;
  1192. if (sd == NULL)
  1193. return;
  1194. si = v4l2_get_subdev_hostdata(sd);
  1195. fmd = entity_to_fimc_mdev(&sd->entity);
  1196. spin_lock_irqsave(&fmd->slock, flags);
  1197. fimc = si ? source_to_sensor_info(si)->host : NULL;
  1198. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1199. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1200. unsigned long irq_flags;
  1201. spin_lock_irqsave(&fimc->slock, irq_flags);
  1202. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1203. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1204. struct fimc_vid_buffer, list);
  1205. vb2_set_plane_payload(&buf->vb.vb2_buf, 0,
  1206. *((u32 *)arg));
  1207. }
  1208. fimc_capture_irq_handler(fimc, 1);
  1209. fimc_deactivate_capture(fimc);
  1210. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1211. }
  1212. spin_unlock_irqrestore(&fmd->slock, flags);
  1213. }
  1214. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1215. struct v4l2_subdev_pad_config *cfg,
  1216. struct v4l2_subdev_mbus_code_enum *code)
  1217. {
  1218. struct fimc_fmt *fmt;
  1219. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1220. if (!fmt)
  1221. return -EINVAL;
  1222. code->code = fmt->mbus_code;
  1223. return 0;
  1224. }
  1225. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1226. struct v4l2_subdev_pad_config *cfg,
  1227. struct v4l2_subdev_format *fmt)
  1228. {
  1229. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1230. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1231. struct fimc_frame *ff = &ctx->s_frame;
  1232. struct v4l2_mbus_framefmt *mf;
  1233. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1234. mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  1235. fmt->format = *mf;
  1236. return 0;
  1237. }
  1238. mf = &fmt->format;
  1239. mutex_lock(&fimc->lock);
  1240. switch (fmt->pad) {
  1241. case FIMC_SD_PAD_SOURCE:
  1242. if (!WARN_ON(ff->fmt == NULL))
  1243. mf->code = ff->fmt->mbus_code;
  1244. /* Sink pads crop rectangle size */
  1245. mf->width = ff->width;
  1246. mf->height = ff->height;
  1247. break;
  1248. case FIMC_SD_PAD_SINK_FIFO:
  1249. *mf = fimc->vid_cap.wb_fmt;
  1250. break;
  1251. case FIMC_SD_PAD_SINK_CAM:
  1252. default:
  1253. *mf = fimc->vid_cap.ci_fmt;
  1254. break;
  1255. }
  1256. mutex_unlock(&fimc->lock);
  1257. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1258. return 0;
  1259. }
  1260. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1261. struct v4l2_subdev_pad_config *cfg,
  1262. struct v4l2_subdev_format *fmt)
  1263. {
  1264. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1265. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1266. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1267. struct fimc_ctx *ctx = vc->ctx;
  1268. struct fimc_frame *ff;
  1269. struct fimc_fmt *ffmt;
  1270. dbg("pad%d: code: 0x%x, %dx%d",
  1271. fmt->pad, mf->code, mf->width, mf->height);
  1272. if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
  1273. return -EBUSY;
  1274. mutex_lock(&fimc->lock);
  1275. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1276. &mf->code, NULL, fmt->pad);
  1277. mutex_unlock(&fimc->lock);
  1278. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1279. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1280. mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  1281. *mf = fmt->format;
  1282. return 0;
  1283. }
  1284. /* There must be a bug in the driver if this happens */
  1285. if (WARN_ON(ffmt == NULL))
  1286. return -EINVAL;
  1287. /* Update RGB Alpha control state and value range */
  1288. fimc_alpha_ctrl_update(ctx);
  1289. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1290. if (fmt->pad == FIMC_SD_PAD_SOURCE) {
  1291. ff = &ctx->d_frame;
  1292. /* Sink pads crop rectangle size */
  1293. mf->width = ctx->s_frame.width;
  1294. mf->height = ctx->s_frame.height;
  1295. } else {
  1296. ff = &ctx->s_frame;
  1297. }
  1298. mutex_lock(&fimc->lock);
  1299. set_frame_bounds(ff, mf->width, mf->height);
  1300. if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
  1301. vc->wb_fmt = *mf;
  1302. else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
  1303. vc->ci_fmt = *mf;
  1304. ff->fmt = ffmt;
  1305. /* Reset the crop rectangle if required. */
  1306. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1307. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1308. if (fmt->pad != FIMC_SD_PAD_SOURCE)
  1309. ctx->state &= ~FIMC_COMPOSE;
  1310. mutex_unlock(&fimc->lock);
  1311. return 0;
  1312. }
  1313. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1314. struct v4l2_subdev_pad_config *cfg,
  1315. struct v4l2_subdev_selection *sel)
  1316. {
  1317. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1318. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1319. struct fimc_frame *f = &ctx->s_frame;
  1320. struct v4l2_rect *r = &sel->r;
  1321. struct v4l2_rect *try_sel;
  1322. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1323. return -EINVAL;
  1324. mutex_lock(&fimc->lock);
  1325. switch (sel->target) {
  1326. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1327. f = &ctx->d_frame;
  1328. /* fall through */
  1329. case V4L2_SEL_TGT_CROP_BOUNDS:
  1330. r->width = f->o_width;
  1331. r->height = f->o_height;
  1332. r->left = 0;
  1333. r->top = 0;
  1334. mutex_unlock(&fimc->lock);
  1335. return 0;
  1336. case V4L2_SEL_TGT_CROP:
  1337. try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  1338. break;
  1339. case V4L2_SEL_TGT_COMPOSE:
  1340. try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
  1341. f = &ctx->d_frame;
  1342. break;
  1343. default:
  1344. mutex_unlock(&fimc->lock);
  1345. return -EINVAL;
  1346. }
  1347. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1348. sel->r = *try_sel;
  1349. } else {
  1350. r->left = f->offs_h;
  1351. r->top = f->offs_v;
  1352. r->width = f->width;
  1353. r->height = f->height;
  1354. }
  1355. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1356. sel->pad, r->left, r->top, r->width, r->height,
  1357. f->f_width, f->f_height);
  1358. mutex_unlock(&fimc->lock);
  1359. return 0;
  1360. }
  1361. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1362. struct v4l2_subdev_pad_config *cfg,
  1363. struct v4l2_subdev_selection *sel)
  1364. {
  1365. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1366. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1367. struct fimc_frame *f = &ctx->s_frame;
  1368. struct v4l2_rect *r = &sel->r;
  1369. struct v4l2_rect *try_sel;
  1370. unsigned long flags;
  1371. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1372. return -EINVAL;
  1373. mutex_lock(&fimc->lock);
  1374. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1375. switch (sel->target) {
  1376. case V4L2_SEL_TGT_CROP:
  1377. try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  1378. break;
  1379. case V4L2_SEL_TGT_COMPOSE:
  1380. try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
  1381. f = &ctx->d_frame;
  1382. break;
  1383. default:
  1384. mutex_unlock(&fimc->lock);
  1385. return -EINVAL;
  1386. }
  1387. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1388. *try_sel = sel->r;
  1389. } else {
  1390. spin_lock_irqsave(&fimc->slock, flags);
  1391. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1392. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1393. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1394. ctx->state |= FIMC_COMPOSE;
  1395. spin_unlock_irqrestore(&fimc->slock, flags);
  1396. }
  1397. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1398. r->width, r->height);
  1399. mutex_unlock(&fimc->lock);
  1400. return 0;
  1401. }
  1402. static const struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1403. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1404. .get_selection = fimc_subdev_get_selection,
  1405. .set_selection = fimc_subdev_set_selection,
  1406. .get_fmt = fimc_subdev_get_fmt,
  1407. .set_fmt = fimc_subdev_set_fmt,
  1408. };
  1409. static const struct v4l2_subdev_ops fimc_subdev_ops = {
  1410. .pad = &fimc_subdev_pad_ops,
  1411. };
  1412. /* Set default format at the sensor and host interface */
  1413. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1414. {
  1415. struct v4l2_format fmt = {
  1416. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1417. .fmt.pix_mp = {
  1418. .width = FIMC_DEFAULT_WIDTH,
  1419. .height = FIMC_DEFAULT_HEIGHT,
  1420. .pixelformat = V4L2_PIX_FMT_YUYV,
  1421. .field = V4L2_FIELD_NONE,
  1422. .colorspace = V4L2_COLORSPACE_JPEG,
  1423. },
  1424. };
  1425. return __fimc_capture_set_format(fimc, &fmt);
  1426. }
  1427. /* fimc->lock must be already initialized */
  1428. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1429. struct v4l2_device *v4l2_dev)
  1430. {
  1431. struct video_device *vfd = &fimc->vid_cap.ve.vdev;
  1432. struct vb2_queue *q = &fimc->vid_cap.vbq;
  1433. struct fimc_ctx *ctx;
  1434. struct fimc_vid_cap *vid_cap;
  1435. struct fimc_fmt *fmt;
  1436. int ret = -ENOMEM;
  1437. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1438. if (!ctx)
  1439. return -ENOMEM;
  1440. ctx->fimc_dev = fimc;
  1441. ctx->in_path = FIMC_IO_CAMERA;
  1442. ctx->out_path = FIMC_IO_DMA;
  1443. ctx->state = FIMC_CTX_CAP;
  1444. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1445. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1446. memset(vfd, 0, sizeof(*vfd));
  1447. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1448. vfd->fops = &fimc_capture_fops;
  1449. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1450. vfd->v4l2_dev = v4l2_dev;
  1451. vfd->minor = -1;
  1452. vfd->release = video_device_release_empty;
  1453. vfd->queue = q;
  1454. vfd->lock = &fimc->lock;
  1455. vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
  1456. video_set_drvdata(vfd, fimc);
  1457. vid_cap = &fimc->vid_cap;
  1458. vid_cap->active_buf_cnt = 0;
  1459. vid_cap->reqbufs_count = 0;
  1460. vid_cap->ctx = ctx;
  1461. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1462. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1463. memset(q, 0, sizeof(*q));
  1464. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1465. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1466. q->drv_priv = ctx;
  1467. q->ops = &fimc_capture_qops;
  1468. q->mem_ops = &vb2_dma_contig_memops;
  1469. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1470. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1471. q->lock = &fimc->lock;
  1472. q->dev = &fimc->pdev->dev;
  1473. ret = vb2_queue_init(q);
  1474. if (ret)
  1475. goto err_free_ctx;
  1476. /* Default format configuration */
  1477. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1478. vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH;
  1479. vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT;
  1480. vid_cap->ci_fmt.code = fmt->mbus_code;
  1481. ctx->s_frame.width = FIMC_DEFAULT_WIDTH;
  1482. ctx->s_frame.height = FIMC_DEFAULT_HEIGHT;
  1483. ctx->s_frame.fmt = fmt;
  1484. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0);
  1485. vid_cap->wb_fmt = vid_cap->ci_fmt;
  1486. vid_cap->wb_fmt.code = fmt->mbus_code;
  1487. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1488. vfd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
  1489. ret = media_entity_pads_init(&vfd->entity, 1, &vid_cap->vd_pad);
  1490. if (ret)
  1491. goto err_free_ctx;
  1492. ret = fimc_ctrls_create(ctx);
  1493. if (ret)
  1494. goto err_me_cleanup;
  1495. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1496. if (ret)
  1497. goto err_ctrl_free;
  1498. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1499. vfd->name, video_device_node_name(vfd));
  1500. vfd->ctrl_handler = &ctx->ctrls.handler;
  1501. return 0;
  1502. err_ctrl_free:
  1503. fimc_ctrls_delete(ctx);
  1504. err_me_cleanup:
  1505. media_entity_cleanup(&vfd->entity);
  1506. err_free_ctx:
  1507. kfree(ctx);
  1508. return ret;
  1509. }
  1510. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1511. {
  1512. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1513. int ret;
  1514. if (fimc == NULL)
  1515. return -ENXIO;
  1516. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1517. if (ret)
  1518. return ret;
  1519. fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);
  1520. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1521. if (ret) {
  1522. fimc_unregister_m2m_device(fimc);
  1523. fimc->vid_cap.ve.pipe = NULL;
  1524. }
  1525. return ret;
  1526. }
  1527. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1528. {
  1529. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1530. struct video_device *vdev;
  1531. if (fimc == NULL)
  1532. return;
  1533. mutex_lock(&fimc->lock);
  1534. fimc_unregister_m2m_device(fimc);
  1535. vdev = &fimc->vid_cap.ve.vdev;
  1536. if (video_is_registered(vdev)) {
  1537. video_unregister_device(vdev);
  1538. media_entity_cleanup(&vdev->entity);
  1539. fimc_ctrls_delete(fimc->vid_cap.ctx);
  1540. fimc->vid_cap.ve.pipe = NULL;
  1541. }
  1542. kfree(fimc->vid_cap.ctx);
  1543. fimc->vid_cap.ctx = NULL;
  1544. mutex_unlock(&fimc->lock);
  1545. }
  1546. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1547. .registered = fimc_capture_subdev_registered,
  1548. .unregistered = fimc_capture_subdev_unregistered,
  1549. };
  1550. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1551. {
  1552. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1553. int ret;
  1554. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1555. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1556. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
  1557. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
  1558. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
  1559. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1560. ret = media_entity_pads_init(&sd->entity, FIMC_SD_PADS_NUM,
  1561. fimc->vid_cap.sd_pads);
  1562. if (ret)
  1563. return ret;
  1564. sd->entity.ops = &fimc_sd_media_ops;
  1565. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1566. v4l2_set_subdevdata(sd, fimc);
  1567. return 0;
  1568. }
  1569. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1570. {
  1571. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1572. v4l2_device_unregister_subdev(sd);
  1573. media_entity_cleanup(&sd->entity);
  1574. v4l2_set_subdevdata(sd, NULL);
  1575. }