mn88472.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Panasonic MN88472 DVB-T/T2/C demodulator driver
  4. *
  5. * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
  6. */
  7. #include "mn88472_priv.h"
  8. static int mn88472_get_tune_settings(struct dvb_frontend *fe,
  9. struct dvb_frontend_tune_settings *s)
  10. {
  11. s->min_delay_ms = 1000;
  12. return 0;
  13. }
  14. static int mn88472_read_status(struct dvb_frontend *fe, enum fe_status *status)
  15. {
  16. struct i2c_client *client = fe->demodulator_priv;
  17. struct mn88472_dev *dev = i2c_get_clientdata(client);
  18. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  19. int ret, i, stmp;
  20. unsigned int utmp, utmp1, utmp2;
  21. u8 buf[5];
  22. if (!dev->active) {
  23. ret = -EAGAIN;
  24. goto err;
  25. }
  26. switch (c->delivery_system) {
  27. case SYS_DVBT:
  28. ret = regmap_read(dev->regmap[0], 0x7f, &utmp);
  29. if (ret)
  30. goto err;
  31. if ((utmp & 0x0f) >= 0x09)
  32. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  33. FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
  34. else
  35. *status = 0;
  36. break;
  37. case SYS_DVBT2:
  38. ret = regmap_read(dev->regmap[2], 0x92, &utmp);
  39. if (ret)
  40. goto err;
  41. if ((utmp & 0x0f) >= 0x0d)
  42. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  43. FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
  44. else if ((utmp & 0x0f) >= 0x0a)
  45. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  46. FE_HAS_VITERBI;
  47. else if ((utmp & 0x0f) >= 0x07)
  48. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
  49. else
  50. *status = 0;
  51. break;
  52. case SYS_DVBC_ANNEX_A:
  53. ret = regmap_read(dev->regmap[1], 0x84, &utmp);
  54. if (ret)
  55. goto err;
  56. if ((utmp & 0x0f) >= 0x08)
  57. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  58. FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
  59. else
  60. *status = 0;
  61. break;
  62. default:
  63. ret = -EINVAL;
  64. goto err;
  65. }
  66. /* Signal strength */
  67. if (*status & FE_HAS_SIGNAL) {
  68. for (i = 0; i < 2; i++) {
  69. ret = regmap_bulk_read(dev->regmap[2], 0x8e + i,
  70. &buf[i], 1);
  71. if (ret)
  72. goto err;
  73. }
  74. utmp1 = buf[0] << 8 | buf[1] << 0 | buf[0] >> 2;
  75. dev_dbg(&client->dev, "strength=%u\n", utmp1);
  76. c->strength.stat[0].scale = FE_SCALE_RELATIVE;
  77. c->strength.stat[0].uvalue = utmp1;
  78. } else {
  79. c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  80. }
  81. /* CNR */
  82. if (*status & FE_HAS_VITERBI && c->delivery_system == SYS_DVBT) {
  83. /* DVB-T CNR */
  84. ret = regmap_bulk_read(dev->regmap[0], 0x9c, buf, 2);
  85. if (ret)
  86. goto err;
  87. utmp = buf[0] << 8 | buf[1] << 0;
  88. if (utmp) {
  89. /* CNR[dB]: 10 * log10(65536 / value) + 2 */
  90. /* log10(65536) = 80807124, 0.2 = 3355443 */
  91. stmp = ((u64)80807124 - intlog10(utmp) + 3355443)
  92. * 10000 >> 24;
  93. dev_dbg(&client->dev, "cnr=%d value=%u\n", stmp, utmp);
  94. } else {
  95. stmp = 0;
  96. }
  97. c->cnr.stat[0].svalue = stmp;
  98. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  99. } else if (*status & FE_HAS_VITERBI &&
  100. c->delivery_system == SYS_DVBT2) {
  101. /* DVB-T2 CNR */
  102. for (i = 0; i < 3; i++) {
  103. ret = regmap_bulk_read(dev->regmap[2], 0xbc + i,
  104. &buf[i], 1);
  105. if (ret)
  106. goto err;
  107. }
  108. utmp = buf[1] << 8 | buf[2] << 0;
  109. utmp1 = (buf[0] >> 2) & 0x01; /* 0=SISO, 1=MISO */
  110. if (utmp) {
  111. if (utmp1) {
  112. /* CNR[dB]: 10 * log10(16384 / value) - 6 */
  113. /* log10(16384) = 70706234, 0.6 = 10066330 */
  114. stmp = ((u64)70706234 - intlog10(utmp)
  115. - 10066330) * 10000 >> 24;
  116. dev_dbg(&client->dev, "cnr=%d value=%u MISO\n",
  117. stmp, utmp);
  118. } else {
  119. /* CNR[dB]: 10 * log10(65536 / value) + 2 */
  120. /* log10(65536) = 80807124, 0.2 = 3355443 */
  121. stmp = ((u64)80807124 - intlog10(utmp)
  122. + 3355443) * 10000 >> 24;
  123. dev_dbg(&client->dev, "cnr=%d value=%u SISO\n",
  124. stmp, utmp);
  125. }
  126. } else {
  127. stmp = 0;
  128. }
  129. c->cnr.stat[0].svalue = stmp;
  130. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  131. } else if (*status & FE_HAS_VITERBI &&
  132. c->delivery_system == SYS_DVBC_ANNEX_A) {
  133. /* DVB-C CNR */
  134. ret = regmap_bulk_read(dev->regmap[1], 0xa1, buf, 4);
  135. if (ret)
  136. goto err;
  137. utmp1 = buf[0] << 8 | buf[1] << 0; /* signal */
  138. utmp2 = buf[2] << 8 | buf[3] << 0; /* noise */
  139. if (utmp1 && utmp2) {
  140. /* CNR[dB]: 10 * log10(8 * (signal / noise)) */
  141. /* log10(8) = 15151336 */
  142. stmp = ((u64)15151336 + intlog10(utmp1)
  143. - intlog10(utmp2)) * 10000 >> 24;
  144. dev_dbg(&client->dev, "cnr=%d signal=%u noise=%u\n",
  145. stmp, utmp1, utmp2);
  146. } else {
  147. stmp = 0;
  148. }
  149. c->cnr.stat[0].svalue = stmp;
  150. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  151. } else {
  152. c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  153. }
  154. /* PER */
  155. if (*status & FE_HAS_SYNC) {
  156. ret = regmap_bulk_read(dev->regmap[0], 0xe1, buf, 4);
  157. if (ret)
  158. goto err;
  159. utmp1 = buf[0] << 8 | buf[1] << 0;
  160. utmp2 = buf[2] << 8 | buf[3] << 0;
  161. dev_dbg(&client->dev, "block_error=%u block_count=%u\n",
  162. utmp1, utmp2);
  163. c->block_error.stat[0].scale = FE_SCALE_COUNTER;
  164. c->block_error.stat[0].uvalue += utmp1;
  165. c->block_count.stat[0].scale = FE_SCALE_COUNTER;
  166. c->block_count.stat[0].uvalue += utmp2;
  167. } else {
  168. c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  169. c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  170. }
  171. return 0;
  172. err:
  173. dev_dbg(&client->dev, "failed=%d\n", ret);
  174. return ret;
  175. }
  176. static int mn88472_set_frontend(struct dvb_frontend *fe)
  177. {
  178. struct i2c_client *client = fe->demodulator_priv;
  179. struct mn88472_dev *dev = i2c_get_clientdata(client);
  180. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  181. int ret, i;
  182. unsigned int utmp;
  183. u32 if_frequency;
  184. u8 buf[3], delivery_system_val, bandwidth_val, *bandwidth_vals_ptr;
  185. u8 reg_bank0_b4_val, reg_bank0_cd_val, reg_bank0_d4_val;
  186. u8 reg_bank0_d6_val;
  187. dev_dbg(&client->dev,
  188. "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
  189. c->delivery_system, c->modulation, c->frequency,
  190. c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
  191. if (!dev->active) {
  192. ret = -EAGAIN;
  193. goto err;
  194. }
  195. switch (c->delivery_system) {
  196. case SYS_DVBT:
  197. delivery_system_val = 0x02;
  198. reg_bank0_b4_val = 0x00;
  199. reg_bank0_cd_val = 0x1f;
  200. reg_bank0_d4_val = 0x0a;
  201. reg_bank0_d6_val = 0x48;
  202. break;
  203. case SYS_DVBT2:
  204. delivery_system_val = 0x03;
  205. reg_bank0_b4_val = 0xf6;
  206. reg_bank0_cd_val = 0x01;
  207. reg_bank0_d4_val = 0x09;
  208. reg_bank0_d6_val = 0x46;
  209. break;
  210. case SYS_DVBC_ANNEX_A:
  211. delivery_system_val = 0x04;
  212. reg_bank0_b4_val = 0x00;
  213. reg_bank0_cd_val = 0x17;
  214. reg_bank0_d4_val = 0x09;
  215. reg_bank0_d6_val = 0x48;
  216. break;
  217. default:
  218. ret = -EINVAL;
  219. goto err;
  220. }
  221. switch (c->delivery_system) {
  222. case SYS_DVBT:
  223. case SYS_DVBT2:
  224. switch (c->bandwidth_hz) {
  225. case 5000000:
  226. bandwidth_vals_ptr = "\xe5\x99\x9a\x1b\xa9\x1b\xa9";
  227. bandwidth_val = 0x03;
  228. break;
  229. case 6000000:
  230. bandwidth_vals_ptr = "\xbf\x55\x55\x15\x6b\x15\x6b";
  231. bandwidth_val = 0x02;
  232. break;
  233. case 7000000:
  234. bandwidth_vals_ptr = "\xa4\x00\x00\x0f\x2c\x0f\x2c";
  235. bandwidth_val = 0x01;
  236. break;
  237. case 8000000:
  238. bandwidth_vals_ptr = "\x8f\x80\x00\x08\xee\x08\xee";
  239. bandwidth_val = 0x00;
  240. break;
  241. default:
  242. ret = -EINVAL;
  243. goto err;
  244. }
  245. break;
  246. case SYS_DVBC_ANNEX_A:
  247. bandwidth_vals_ptr = NULL;
  248. bandwidth_val = 0x00;
  249. break;
  250. default:
  251. break;
  252. }
  253. /* Program tuner */
  254. if (fe->ops.tuner_ops.set_params) {
  255. ret = fe->ops.tuner_ops.set_params(fe);
  256. if (ret)
  257. goto err;
  258. }
  259. if (fe->ops.tuner_ops.get_if_frequency) {
  260. ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
  261. if (ret)
  262. goto err;
  263. dev_dbg(&client->dev, "get_if_frequency=%d\n", if_frequency);
  264. } else {
  265. ret = -EINVAL;
  266. goto err;
  267. }
  268. ret = regmap_write(dev->regmap[2], 0x00, 0x66);
  269. if (ret)
  270. goto err;
  271. ret = regmap_write(dev->regmap[2], 0x01, 0x00);
  272. if (ret)
  273. goto err;
  274. ret = regmap_write(dev->regmap[2], 0x02, 0x01);
  275. if (ret)
  276. goto err;
  277. ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
  278. if (ret)
  279. goto err;
  280. ret = regmap_write(dev->regmap[2], 0x04, bandwidth_val);
  281. if (ret)
  282. goto err;
  283. /* IF */
  284. utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x1000000, dev->clk);
  285. buf[0] = (utmp >> 16) & 0xff;
  286. buf[1] = (utmp >> 8) & 0xff;
  287. buf[2] = (utmp >> 0) & 0xff;
  288. for (i = 0; i < 3; i++) {
  289. ret = regmap_write(dev->regmap[2], 0x10 + i, buf[i]);
  290. if (ret)
  291. goto err;
  292. }
  293. /* Bandwidth */
  294. if (bandwidth_vals_ptr) {
  295. for (i = 0; i < 7; i++) {
  296. ret = regmap_write(dev->regmap[2], 0x13 + i,
  297. bandwidth_vals_ptr[i]);
  298. if (ret)
  299. goto err;
  300. }
  301. }
  302. ret = regmap_write(dev->regmap[0], 0xb4, reg_bank0_b4_val);
  303. if (ret)
  304. goto err;
  305. ret = regmap_write(dev->regmap[0], 0xcd, reg_bank0_cd_val);
  306. if (ret)
  307. goto err;
  308. ret = regmap_write(dev->regmap[0], 0xd4, reg_bank0_d4_val);
  309. if (ret)
  310. goto err;
  311. ret = regmap_write(dev->regmap[0], 0xd6, reg_bank0_d6_val);
  312. if (ret)
  313. goto err;
  314. switch (c->delivery_system) {
  315. case SYS_DVBT:
  316. ret = regmap_write(dev->regmap[0], 0x07, 0x26);
  317. if (ret)
  318. goto err;
  319. ret = regmap_write(dev->regmap[0], 0x00, 0xba);
  320. if (ret)
  321. goto err;
  322. ret = regmap_write(dev->regmap[0], 0x01, 0x13);
  323. if (ret)
  324. goto err;
  325. break;
  326. case SYS_DVBT2:
  327. ret = regmap_write(dev->regmap[2], 0x2b, 0x13);
  328. if (ret)
  329. goto err;
  330. ret = regmap_write(dev->regmap[2], 0x4f, 0x05);
  331. if (ret)
  332. goto err;
  333. ret = regmap_write(dev->regmap[1], 0xf6, 0x05);
  334. if (ret)
  335. goto err;
  336. ret = regmap_write(dev->regmap[2], 0x32,
  337. (c->stream_id == NO_STREAM_ID_FILTER) ? 0 :
  338. c->stream_id );
  339. if (ret)
  340. goto err;
  341. break;
  342. case SYS_DVBC_ANNEX_A:
  343. break;
  344. default:
  345. break;
  346. }
  347. /* Reset FSM */
  348. ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
  349. if (ret)
  350. goto err;
  351. return 0;
  352. err:
  353. dev_dbg(&client->dev, "failed=%d\n", ret);
  354. return ret;
  355. }
  356. static int mn88472_init(struct dvb_frontend *fe)
  357. {
  358. struct i2c_client *client = fe->demodulator_priv;
  359. struct mn88472_dev *dev = i2c_get_clientdata(client);
  360. int ret, len, rem;
  361. unsigned int utmp;
  362. const struct firmware *firmware;
  363. const char *name = MN88472_FIRMWARE;
  364. dev_dbg(&client->dev, "\n");
  365. /* Power up */
  366. ret = regmap_write(dev->regmap[2], 0x05, 0x00);
  367. if (ret)
  368. goto err;
  369. ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
  370. if (ret)
  371. goto err;
  372. ret = regmap_write(dev->regmap[2], 0x0c, 0x00);
  373. if (ret)
  374. goto err;
  375. /* Check if firmware is already running */
  376. ret = regmap_read(dev->regmap[0], 0xf5, &utmp);
  377. if (ret)
  378. goto err;
  379. if (!(utmp & 0x01))
  380. goto warm;
  381. ret = request_firmware(&firmware, name, &client->dev);
  382. if (ret) {
  383. dev_err(&client->dev, "firmware file '%s' not found\n", name);
  384. goto err;
  385. }
  386. dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
  387. ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
  388. if (ret)
  389. goto err_release_firmware;
  390. for (rem = firmware->size; rem > 0; rem -= (dev->i2c_write_max - 1)) {
  391. len = min(dev->i2c_write_max - 1, rem);
  392. ret = regmap_bulk_write(dev->regmap[0], 0xf6,
  393. &firmware->data[firmware->size - rem],
  394. len);
  395. if (ret) {
  396. dev_err(&client->dev, "firmware download failed %d\n",
  397. ret);
  398. goto err_release_firmware;
  399. }
  400. }
  401. /* Parity check of firmware */
  402. ret = regmap_read(dev->regmap[0], 0xf8, &utmp);
  403. if (ret)
  404. goto err_release_firmware;
  405. if (utmp & 0x10) {
  406. ret = -EINVAL;
  407. dev_err(&client->dev, "firmware did not run\n");
  408. goto err_release_firmware;
  409. }
  410. ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
  411. if (ret)
  412. goto err_release_firmware;
  413. release_firmware(firmware);
  414. warm:
  415. /* TS config */
  416. switch (dev->ts_mode) {
  417. case SERIAL_TS_MODE:
  418. utmp = 0x1d;
  419. break;
  420. case PARALLEL_TS_MODE:
  421. utmp = 0x00;
  422. break;
  423. default:
  424. ret = -EINVAL;
  425. goto err;
  426. }
  427. ret = regmap_write(dev->regmap[2], 0x08, utmp);
  428. if (ret)
  429. goto err;
  430. switch (dev->ts_clk) {
  431. case VARIABLE_TS_CLOCK:
  432. utmp = 0xe3;
  433. break;
  434. case FIXED_TS_CLOCK:
  435. utmp = 0xe1;
  436. break;
  437. default:
  438. ret = -EINVAL;
  439. goto err;
  440. }
  441. ret = regmap_write(dev->regmap[0], 0xd9, utmp);
  442. if (ret)
  443. goto err;
  444. dev->active = true;
  445. return 0;
  446. err_release_firmware:
  447. release_firmware(firmware);
  448. err:
  449. dev_dbg(&client->dev, "failed=%d\n", ret);
  450. return ret;
  451. }
  452. static int mn88472_sleep(struct dvb_frontend *fe)
  453. {
  454. struct i2c_client *client = fe->demodulator_priv;
  455. struct mn88472_dev *dev = i2c_get_clientdata(client);
  456. int ret;
  457. dev_dbg(&client->dev, "\n");
  458. /* Power down */
  459. ret = regmap_write(dev->regmap[2], 0x0c, 0x30);
  460. if (ret)
  461. goto err;
  462. ret = regmap_write(dev->regmap[2], 0x0b, 0x30);
  463. if (ret)
  464. goto err;
  465. ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
  466. if (ret)
  467. goto err;
  468. return 0;
  469. err:
  470. dev_dbg(&client->dev, "failed=%d\n", ret);
  471. return ret;
  472. }
  473. static const struct dvb_frontend_ops mn88472_ops = {
  474. .delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
  475. .info = {
  476. .name = "Panasonic MN88472",
  477. .symbol_rate_min = 1000000,
  478. .symbol_rate_max = 7200000,
  479. .caps = FE_CAN_FEC_1_2 |
  480. FE_CAN_FEC_2_3 |
  481. FE_CAN_FEC_3_4 |
  482. FE_CAN_FEC_5_6 |
  483. FE_CAN_FEC_7_8 |
  484. FE_CAN_FEC_AUTO |
  485. FE_CAN_QPSK |
  486. FE_CAN_QAM_16 |
  487. FE_CAN_QAM_32 |
  488. FE_CAN_QAM_64 |
  489. FE_CAN_QAM_128 |
  490. FE_CAN_QAM_256 |
  491. FE_CAN_QAM_AUTO |
  492. FE_CAN_TRANSMISSION_MODE_AUTO |
  493. FE_CAN_GUARD_INTERVAL_AUTO |
  494. FE_CAN_HIERARCHY_AUTO |
  495. FE_CAN_MUTE_TS |
  496. FE_CAN_2G_MODULATION |
  497. FE_CAN_MULTISTREAM
  498. },
  499. .get_tune_settings = mn88472_get_tune_settings,
  500. .init = mn88472_init,
  501. .sleep = mn88472_sleep,
  502. .set_frontend = mn88472_set_frontend,
  503. .read_status = mn88472_read_status,
  504. };
  505. static struct dvb_frontend *mn88472_get_dvb_frontend(struct i2c_client *client)
  506. {
  507. struct mn88472_dev *dev = i2c_get_clientdata(client);
  508. dev_dbg(&client->dev, "\n");
  509. return &dev->fe;
  510. }
  511. static int mn88472_probe(struct i2c_client *client,
  512. const struct i2c_device_id *id)
  513. {
  514. struct mn88472_config *pdata = client->dev.platform_data;
  515. struct mn88472_dev *dev;
  516. struct dtv_frontend_properties *c;
  517. int ret;
  518. unsigned int utmp;
  519. static const struct regmap_config regmap_config = {
  520. .reg_bits = 8,
  521. .val_bits = 8,
  522. };
  523. dev_dbg(&client->dev, "\n");
  524. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  525. if (!dev) {
  526. ret = -ENOMEM;
  527. goto err;
  528. }
  529. dev->i2c_write_max = pdata->i2c_wr_max ? pdata->i2c_wr_max : ~0;
  530. dev->clk = pdata->xtal;
  531. dev->ts_mode = pdata->ts_mode;
  532. dev->ts_clk = pdata->ts_clock;
  533. dev->client[0] = client;
  534. dev->regmap[0] = regmap_init_i2c(dev->client[0], &regmap_config);
  535. if (IS_ERR(dev->regmap[0])) {
  536. ret = PTR_ERR(dev->regmap[0]);
  537. goto err_kfree;
  538. }
  539. /*
  540. * Chip has three I2C addresses for different register banks. Used
  541. * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
  542. * 0x1a and 0x1c, in order to get own I2C client for each register bank.
  543. *
  544. * Also, register bank 2 do not support sequential I/O. Only single
  545. * register write or read is allowed to that bank.
  546. */
  547. dev->client[1] = i2c_new_dummy_device(client->adapter, 0x1a);
  548. if (IS_ERR(dev->client[1])) {
  549. ret = PTR_ERR(dev->client[1]);
  550. dev_err(&client->dev, "I2C registration failed\n");
  551. goto err_regmap_0_regmap_exit;
  552. }
  553. dev->regmap[1] = regmap_init_i2c(dev->client[1], &regmap_config);
  554. if (IS_ERR(dev->regmap[1])) {
  555. ret = PTR_ERR(dev->regmap[1]);
  556. goto err_client_1_i2c_unregister_device;
  557. }
  558. i2c_set_clientdata(dev->client[1], dev);
  559. dev->client[2] = i2c_new_dummy_device(client->adapter, 0x1c);
  560. if (IS_ERR(dev->client[2])) {
  561. ret = PTR_ERR(dev->client[2]);
  562. dev_err(&client->dev, "2nd I2C registration failed\n");
  563. goto err_regmap_1_regmap_exit;
  564. }
  565. dev->regmap[2] = regmap_init_i2c(dev->client[2], &regmap_config);
  566. if (IS_ERR(dev->regmap[2])) {
  567. ret = PTR_ERR(dev->regmap[2]);
  568. goto err_client_2_i2c_unregister_device;
  569. }
  570. i2c_set_clientdata(dev->client[2], dev);
  571. /* Check demod answers with correct chip id */
  572. ret = regmap_read(dev->regmap[2], 0xff, &utmp);
  573. if (ret)
  574. goto err_regmap_2_regmap_exit;
  575. dev_dbg(&client->dev, "chip id=%02x\n", utmp);
  576. if (utmp != 0x02) {
  577. ret = -ENODEV;
  578. goto err_regmap_2_regmap_exit;
  579. }
  580. /* Sleep because chip is active by default */
  581. ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
  582. if (ret)
  583. goto err_regmap_2_regmap_exit;
  584. /* Create dvb frontend */
  585. memcpy(&dev->fe.ops, &mn88472_ops, sizeof(struct dvb_frontend_ops));
  586. dev->fe.demodulator_priv = client;
  587. *pdata->fe = &dev->fe;
  588. i2c_set_clientdata(client, dev);
  589. /* Init stats to indicate which stats are supported */
  590. c = &dev->fe.dtv_property_cache;
  591. c->strength.len = 1;
  592. c->cnr.len = 1;
  593. c->block_error.len = 1;
  594. c->block_count.len = 1;
  595. /* Setup callbacks */
  596. pdata->get_dvb_frontend = mn88472_get_dvb_frontend;
  597. dev_info(&client->dev, "Panasonic MN88472 successfully identified\n");
  598. return 0;
  599. err_regmap_2_regmap_exit:
  600. regmap_exit(dev->regmap[2]);
  601. err_client_2_i2c_unregister_device:
  602. i2c_unregister_device(dev->client[2]);
  603. err_regmap_1_regmap_exit:
  604. regmap_exit(dev->regmap[1]);
  605. err_client_1_i2c_unregister_device:
  606. i2c_unregister_device(dev->client[1]);
  607. err_regmap_0_regmap_exit:
  608. regmap_exit(dev->regmap[0]);
  609. err_kfree:
  610. kfree(dev);
  611. err:
  612. dev_dbg(&client->dev, "failed=%d\n", ret);
  613. return ret;
  614. }
  615. static int mn88472_remove(struct i2c_client *client)
  616. {
  617. struct mn88472_dev *dev = i2c_get_clientdata(client);
  618. dev_dbg(&client->dev, "\n");
  619. regmap_exit(dev->regmap[2]);
  620. i2c_unregister_device(dev->client[2]);
  621. regmap_exit(dev->regmap[1]);
  622. i2c_unregister_device(dev->client[1]);
  623. regmap_exit(dev->regmap[0]);
  624. kfree(dev);
  625. return 0;
  626. }
  627. static const struct i2c_device_id mn88472_id_table[] = {
  628. {"mn88472", 0},
  629. {}
  630. };
  631. MODULE_DEVICE_TABLE(i2c, mn88472_id_table);
  632. static struct i2c_driver mn88472_driver = {
  633. .driver = {
  634. .name = "mn88472",
  635. .suppress_bind_attrs = true,
  636. },
  637. .probe = mn88472_probe,
  638. .remove = mn88472_remove,
  639. .id_table = mn88472_id_table,
  640. };
  641. module_i2c_driver(mn88472_driver);
  642. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  643. MODULE_DESCRIPTION("Panasonic MN88472 DVB-T/T2/C demodulator driver");
  644. MODULE_LICENSE("GPL");
  645. MODULE_FIRMWARE(MN88472_FIRMWARE);