helene.c 31 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * helene.c
  4. *
  5. * Sony HELENE DVB-S/S2 DVB-T/T2 DVB-C/C2 ISDB-T/S tuner driver (CXD2858ER)
  6. *
  7. * Copyright 2012 Sony Corporation
  8. * Copyright (C) 2014 NetUP Inc.
  9. * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
  10. */
  11. #include <linux/slab.h>
  12. #include <linux/module.h>
  13. #include <linux/dvb/frontend.h>
  14. #include <linux/types.h>
  15. #include "helene.h"
  16. #include <media/dvb_frontend.h>
  17. #define MAX_WRITE_REGSIZE 20
  18. enum helene_state {
  19. STATE_UNKNOWN,
  20. STATE_SLEEP,
  21. STATE_ACTIVE
  22. };
  23. struct helene_priv {
  24. u32 frequency;
  25. u8 i2c_address;
  26. struct i2c_adapter *i2c;
  27. enum helene_state state;
  28. void *set_tuner_data;
  29. int (*set_tuner)(void *, int);
  30. enum helene_xtal xtal;
  31. };
  32. #define TERR_INTERNAL_LOOPFILTER_AVAILABLE(tv_system) \
  33. (((tv_system) != SONY_HELENE_DTV_DVBC_6) && \
  34. ((tv_system) != SONY_HELENE_DTV_DVBC_8)\
  35. && ((tv_system) != SONY_HELENE_DTV_DVBC2_6) && \
  36. ((tv_system) != SONY_HELENE_DTV_DVBC2_8))
  37. #define HELENE_AUTO 0xff
  38. #define HELENE_OFFSET(ofs) ((u8)(ofs) & 0x1F)
  39. #define HELENE_BW_6 0x00
  40. #define HELENE_BW_7 0x01
  41. #define HELENE_BW_8 0x02
  42. #define HELENE_BW_1_7 0x03
  43. enum helene_tv_system_t {
  44. SONY_HELENE_TV_SYSTEM_UNKNOWN,
  45. /* Terrestrial Analog */
  46. SONY_HELENE_ATV_MN_EIAJ,
  47. /**< System-M (Japan) (IF: Fp=5.75MHz in default) */
  48. SONY_HELENE_ATV_MN_SAP,
  49. /**< System-M (US) (IF: Fp=5.75MHz in default) */
  50. SONY_HELENE_ATV_MN_A2,
  51. /**< System-M (Korea) (IF: Fp=5.9MHz in default) */
  52. SONY_HELENE_ATV_BG,
  53. /**< System-B/G (IF: Fp=7.3MHz in default) */
  54. SONY_HELENE_ATV_I,
  55. /**< System-I (IF: Fp=7.85MHz in default) */
  56. SONY_HELENE_ATV_DK,
  57. /**< System-D/K (IF: Fp=7.85MHz in default) */
  58. SONY_HELENE_ATV_L,
  59. /**< System-L (IF: Fp=7.85MHz in default) */
  60. SONY_HELENE_ATV_L_DASH,
  61. /**< System-L DASH (IF: Fp=2.2MHz in default) */
  62. /* Terrestrial/Cable Digital */
  63. SONY_HELENE_DTV_8VSB,
  64. /**< ATSC 8VSB (IF: Fc=3.7MHz in default) */
  65. SONY_HELENE_DTV_QAM,
  66. /**< US QAM (IF: Fc=3.7MHz in default) */
  67. SONY_HELENE_DTV_ISDBT_6,
  68. /**< ISDB-T 6MHzBW (IF: Fc=3.55MHz in default) */
  69. SONY_HELENE_DTV_ISDBT_7,
  70. /**< ISDB-T 7MHzBW (IF: Fc=4.15MHz in default) */
  71. SONY_HELENE_DTV_ISDBT_8,
  72. /**< ISDB-T 8MHzBW (IF: Fc=4.75MHz in default) */
  73. SONY_HELENE_DTV_DVBT_5,
  74. /**< DVB-T 5MHzBW (IF: Fc=3.6MHz in default) */
  75. SONY_HELENE_DTV_DVBT_6,
  76. /**< DVB-T 6MHzBW (IF: Fc=3.6MHz in default) */
  77. SONY_HELENE_DTV_DVBT_7,
  78. /**< DVB-T 7MHzBW (IF: Fc=4.2MHz in default) */
  79. SONY_HELENE_DTV_DVBT_8,
  80. /**< DVB-T 8MHzBW (IF: Fc=4.8MHz in default) */
  81. SONY_HELENE_DTV_DVBT2_1_7,
  82. /**< DVB-T2 1.7MHzBW (IF: Fc=3.5MHz in default) */
  83. SONY_HELENE_DTV_DVBT2_5,
  84. /**< DVB-T2 5MHzBW (IF: Fc=3.6MHz in default) */
  85. SONY_HELENE_DTV_DVBT2_6,
  86. /**< DVB-T2 6MHzBW (IF: Fc=3.6MHz in default) */
  87. SONY_HELENE_DTV_DVBT2_7,
  88. /**< DVB-T2 7MHzBW (IF: Fc=4.2MHz in default) */
  89. SONY_HELENE_DTV_DVBT2_8,
  90. /**< DVB-T2 8MHzBW (IF: Fc=4.8MHz in default) */
  91. SONY_HELENE_DTV_DVBC_6,
  92. /**< DVB-C 6MHzBW (IF: Fc=3.7MHz in default) */
  93. SONY_HELENE_DTV_DVBC_8,
  94. /**< DVB-C 8MHzBW (IF: Fc=4.9MHz in default) */
  95. SONY_HELENE_DTV_DVBC2_6,
  96. /**< DVB-C2 6MHzBW (IF: Fc=3.7MHz in default) */
  97. SONY_HELENE_DTV_DVBC2_8,
  98. /**< DVB-C2 8MHzBW (IF: Fc=4.9MHz in default) */
  99. SONY_HELENE_DTV_DTMB,
  100. /**< DTMB (IF: Fc=5.1MHz in default) */
  101. /* Satellite */
  102. SONY_HELENE_STV_ISDBS,
  103. /**< ISDB-S */
  104. SONY_HELENE_STV_DVBS,
  105. /**< DVB-S */
  106. SONY_HELENE_STV_DVBS2,
  107. /**< DVB-S2 */
  108. SONY_HELENE_ATV_MIN = SONY_HELENE_ATV_MN_EIAJ,
  109. /**< Minimum analog terrestrial system */
  110. SONY_HELENE_ATV_MAX = SONY_HELENE_ATV_L_DASH,
  111. /**< Maximum analog terrestrial system */
  112. SONY_HELENE_DTV_MIN = SONY_HELENE_DTV_8VSB,
  113. /**< Minimum digital terrestrial system */
  114. SONY_HELENE_DTV_MAX = SONY_HELENE_DTV_DTMB,
  115. /**< Maximum digital terrestrial system */
  116. SONY_HELENE_TERR_TV_SYSTEM_NUM,
  117. /**< Number of supported terrestrial broadcasting system */
  118. SONY_HELENE_STV_MIN = SONY_HELENE_STV_ISDBS,
  119. /**< Minimum satellite system */
  120. SONY_HELENE_STV_MAX = SONY_HELENE_STV_DVBS2
  121. /**< Maximum satellite system */
  122. };
  123. struct helene_terr_adjust_param_t {
  124. /* < Addr:0x69 Bit[6:4] : RFVGA gain.
  125. * 0xFF means Auto. (RF_GAIN_SEL = 1)
  126. */
  127. uint8_t RF_GAIN;
  128. /* < Addr:0x69 Bit[3:0] : IF_BPF gain.
  129. */
  130. uint8_t IF_BPF_GC;
  131. /* < Addr:0x6B Bit[3:0] : RF overload
  132. * RF input detect level. (FRF <= 172MHz)
  133. */
  134. uint8_t RFOVLD_DET_LV1_VL;
  135. /* < Addr:0x6B Bit[3:0] : RF overload
  136. * RF input detect level. (172MHz < FRF <= 464MHz)
  137. */
  138. uint8_t RFOVLD_DET_LV1_VH;
  139. /* < Addr:0x6B Bit[3:0] : RF overload
  140. * RF input detect level. (FRF > 464MHz)
  141. */
  142. uint8_t RFOVLD_DET_LV1_U;
  143. /* < Addr:0x6C Bit[2:0] :
  144. * Internal RFAGC detect level. (FRF <= 172MHz)
  145. */
  146. uint8_t IFOVLD_DET_LV_VL;
  147. /* < Addr:0x6C Bit[2:0] :
  148. * Internal RFAGC detect level. (172MHz < FRF <= 464MHz)
  149. */
  150. uint8_t IFOVLD_DET_LV_VH;
  151. /* < Addr:0x6C Bit[2:0] :
  152. * Internal RFAGC detect level. (FRF > 464MHz)
  153. */
  154. uint8_t IFOVLD_DET_LV_U;
  155. /* < Addr:0x6D Bit[5:4] :
  156. * IF filter center offset.
  157. */
  158. uint8_t IF_BPF_F0;
  159. /* < Addr:0x6D Bit[1:0] :
  160. * 6MHzBW(0x00) or 7MHzBW(0x01)
  161. * or 8MHzBW(0x02) or 1.7MHzBW(0x03)
  162. */
  163. uint8_t BW;
  164. /* < Addr:0x6E Bit[4:0] :
  165. * 5bit signed. IF offset (kHz) = FIF_OFFSET x 50
  166. */
  167. uint8_t FIF_OFFSET;
  168. /* < Addr:0x6F Bit[4:0] :
  169. * 5bit signed. BW offset (kHz) =
  170. * BW_OFFSET x 50 (BW_OFFSET x 10 in 1.7MHzBW)
  171. */
  172. uint8_t BW_OFFSET;
  173. /* < Addr:0x9C Bit[0] :
  174. * Local polarity. (0: Upper Local, 1: Lower Local)
  175. */
  176. uint8_t IS_LOWERLOCAL;
  177. };
  178. static const struct helene_terr_adjust_param_t
  179. terr_params[SONY_HELENE_TERR_TV_SYSTEM_NUM] = {
  180. /*< SONY_HELENE_TV_SYSTEM_UNKNOWN */
  181. {HELENE_AUTO, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  182. HELENE_BW_6, HELENE_OFFSET(0), HELENE_OFFSET(0), 0x00},
  183. /* Analog */
  184. /**< SONY_HELENE_ATV_MN_EIAJ (System-M (Japan)) */
  185. {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
  186. HELENE_BW_6, HELENE_OFFSET(0), HELENE_OFFSET(1), 0x00},
  187. /**< SONY_HELENE_ATV_MN_SAP (System-M (US)) */
  188. {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
  189. HELENE_BW_6, HELENE_OFFSET(0), HELENE_OFFSET(1), 0x00},
  190. {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
  191. HELENE_BW_6, HELENE_OFFSET(3), HELENE_OFFSET(1), 0x00},
  192. /**< SONY_HELENE_ATV_MN_A2 (System-M (Korea)) */
  193. {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
  194. HELENE_BW_7, HELENE_OFFSET(11), HELENE_OFFSET(5), 0x00},
  195. /**< SONY_HELENE_ATV_BG (System-B/G) */
  196. {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
  197. HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(-3), 0x00},
  198. /**< SONY_HELENE_ATV_I (System-I) */
  199. {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
  200. HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(-3), 0x00},
  201. /**< SONY_HELENE_ATV_DK (System-D/K) */
  202. {HELENE_AUTO, 0x03, 0x04, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x00,
  203. HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(-3), 0x00},
  204. /**< SONY_HELENE_ATV_L (System-L) */
  205. {HELENE_AUTO, 0x03, 0x04, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x00,
  206. HELENE_BW_8, HELENE_OFFSET(-1), HELENE_OFFSET(4), 0x00},
  207. /**< SONY_HELENE_ATV_L_DASH (System-L DASH) */
  208. /* Digital */
  209. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x03, 0x03, 0x03, 0x00,
  210. HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-3), 0x00},
  211. /**< SONY_HELENE_DTV_8VSB (ATSC 8VSB) */
  212. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  213. HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-3), 0x00},
  214. /**< SONY_HELENE_DTV_QAM (US QAM) */
  215. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  216. HELENE_BW_6, HELENE_OFFSET(-9), HELENE_OFFSET(-5), 0x00},
  217. /**< SONY_HELENE_DTV_ISDBT_6 (ISDB-T 6MHzBW) */
  218. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  219. HELENE_BW_7, HELENE_OFFSET(-7), HELENE_OFFSET(-6), 0x00},
  220. /**< SONY_HELENE_DTV_ISDBT_7 (ISDB-T 7MHzBW) */
  221. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  222. HELENE_BW_8, HELENE_OFFSET(-5), HELENE_OFFSET(-7), 0x00},
  223. /**< SONY_HELENE_DTV_ISDBT_8 (ISDB-T 8MHzBW) */
  224. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  225. HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00},
  226. /**< SONY_HELENE_DTV_DVBT_5 (DVB-T 5MHzBW) */
  227. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  228. HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00},
  229. /**< SONY_HELENE_DTV_DVBT_6 (DVB-T 6MHzBW) */
  230. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  231. HELENE_BW_7, HELENE_OFFSET(-6), HELENE_OFFSET(-5), 0x00},
  232. /**< SONY_HELENE_DTV_DVBT_7 (DVB-T 7MHzBW) */
  233. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  234. HELENE_BW_8, HELENE_OFFSET(-4), HELENE_OFFSET(-6), 0x00},
  235. /**< SONY_HELENE_DTV_DVBT_8 (DVB-T 8MHzBW) */
  236. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  237. HELENE_BW_1_7, HELENE_OFFSET(-10), HELENE_OFFSET(-10), 0x00},
  238. /**< SONY_HELENE_DTV_DVBT2_1_7 (DVB-T2 1.7MHzBW) */
  239. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  240. HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00},
  241. /**< SONY_HELENE_DTV_DVBT2_5 (DVB-T2 5MHzBW) */
  242. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  243. HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00},
  244. /**< SONY_HELENE_DTV_DVBT2_6 (DVB-T2 6MHzBW) */
  245. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  246. HELENE_BW_7, HELENE_OFFSET(-6), HELENE_OFFSET(-5), 0x00},
  247. /**< SONY_HELENE_DTV_DVBT2_7 (DVB-T2 7MHzBW) */
  248. {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  249. HELENE_BW_8, HELENE_OFFSET(-4), HELENE_OFFSET(-6), 0x00},
  250. /**< SONY_HELENE_DTV_DVBT2_8 (DVB-T2 8MHzBW) */
  251. {HELENE_AUTO, 0x05, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x00,
  252. HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-4), 0x00},
  253. /**< SONY_HELENE_DTV_DVBC_6 (DVB-C 6MHzBW) */
  254. {HELENE_AUTO, 0x05, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x00,
  255. HELENE_BW_8, HELENE_OFFSET(-2), HELENE_OFFSET(-3), 0x00},
  256. /**< SONY_HELENE_DTV_DVBC_8 (DVB-C 8MHzBW) */
  257. {HELENE_AUTO, 0x03, 0x09, 0x09, 0x09, 0x02, 0x02, 0x02, 0x00,
  258. HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-2), 0x00},
  259. /**< SONY_HELENE_DTV_DVBC2_6 (DVB-C2 6MHzBW) */
  260. {HELENE_AUTO, 0x03, 0x09, 0x09, 0x09, 0x02, 0x02, 0x02, 0x00,
  261. HELENE_BW_8, HELENE_OFFSET(-2), HELENE_OFFSET(0), 0x00},
  262. /**< SONY_HELENE_DTV_DVBC2_8 (DVB-C2 8MHzBW) */
  263. {HELENE_AUTO, 0x04, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
  264. HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(1), 0x00}
  265. /**< SONY_HELENE_DTV_DTMB (DTMB) */
  266. };
  267. static void helene_i2c_debug(struct helene_priv *priv,
  268. u8 reg, u8 write, const u8 *data, u32 len)
  269. {
  270. dev_dbg(&priv->i2c->dev, "helene: I2C %s reg 0x%02x size %d\n",
  271. (write == 0 ? "read" : "write"), reg, len);
  272. print_hex_dump_bytes("helene: I2C data: ",
  273. DUMP_PREFIX_OFFSET, data, len);
  274. }
  275. static int helene_write_regs(struct helene_priv *priv,
  276. u8 reg, const u8 *data, u32 len)
  277. {
  278. int ret;
  279. u8 buf[MAX_WRITE_REGSIZE + 1];
  280. struct i2c_msg msg[1] = {
  281. {
  282. .addr = priv->i2c_address,
  283. .flags = 0,
  284. .len = len + 1,
  285. .buf = buf,
  286. }
  287. };
  288. if (len + 1 > sizeof(buf)) {
  289. dev_warn(&priv->i2c->dev,
  290. "wr reg=%04x: len=%d vs %zu is too big!\n",
  291. reg, len + 1, sizeof(buf));
  292. return -E2BIG;
  293. }
  294. helene_i2c_debug(priv, reg, 1, data, len);
  295. buf[0] = reg;
  296. memcpy(&buf[1], data, len);
  297. ret = i2c_transfer(priv->i2c, msg, 1);
  298. if (ret >= 0 && ret != 1)
  299. ret = -EREMOTEIO;
  300. if (ret < 0) {
  301. dev_warn(&priv->i2c->dev,
  302. "%s: i2c wr failed=%d reg=%02x len=%d\n",
  303. KBUILD_MODNAME, ret, reg, len);
  304. return ret;
  305. }
  306. return 0;
  307. }
  308. static int helene_write_reg(struct helene_priv *priv, u8 reg, u8 val)
  309. {
  310. u8 tmp = val; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */
  311. return helene_write_regs(priv, reg, &tmp, 1);
  312. }
  313. static int helene_read_regs(struct helene_priv *priv,
  314. u8 reg, u8 *val, u32 len)
  315. {
  316. int ret;
  317. struct i2c_msg msg[2] = {
  318. {
  319. .addr = priv->i2c_address,
  320. .flags = 0,
  321. .len = 1,
  322. .buf = &reg,
  323. }, {
  324. .addr = priv->i2c_address,
  325. .flags = I2C_M_RD,
  326. .len = len,
  327. .buf = val,
  328. }
  329. };
  330. ret = i2c_transfer(priv->i2c, &msg[0], 1);
  331. if (ret >= 0 && ret != 1)
  332. ret = -EREMOTEIO;
  333. if (ret < 0) {
  334. dev_warn(&priv->i2c->dev,
  335. "%s: I2C rw failed=%d addr=%02x reg=%02x\n",
  336. KBUILD_MODNAME, ret, priv->i2c_address, reg);
  337. return ret;
  338. }
  339. ret = i2c_transfer(priv->i2c, &msg[1], 1);
  340. if (ret >= 0 && ret != 1)
  341. ret = -EREMOTEIO;
  342. if (ret < 0) {
  343. dev_warn(&priv->i2c->dev,
  344. "%s: i2c rd failed=%d addr=%02x reg=%02x\n",
  345. KBUILD_MODNAME, ret, priv->i2c_address, reg);
  346. return ret;
  347. }
  348. helene_i2c_debug(priv, reg, 0, val, len);
  349. return 0;
  350. }
  351. static int helene_read_reg(struct helene_priv *priv, u8 reg, u8 *val)
  352. {
  353. return helene_read_regs(priv, reg, val, 1);
  354. }
  355. static int helene_set_reg_bits(struct helene_priv *priv,
  356. u8 reg, u8 data, u8 mask)
  357. {
  358. int res;
  359. u8 rdata;
  360. if (mask != 0xff) {
  361. res = helene_read_reg(priv, reg, &rdata);
  362. if (res != 0)
  363. return res;
  364. data = ((data & mask) | (rdata & (mask ^ 0xFF)));
  365. }
  366. return helene_write_reg(priv, reg, data);
  367. }
  368. static int helene_enter_power_save(struct helene_priv *priv)
  369. {
  370. dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
  371. if (priv->state == STATE_SLEEP)
  372. return 0;
  373. /* Standby setting for CPU */
  374. helene_write_reg(priv, 0x88, 0x0);
  375. /* Standby setting for internal logic block */
  376. helene_write_reg(priv, 0x87, 0xC0);
  377. priv->state = STATE_SLEEP;
  378. return 0;
  379. }
  380. static int helene_leave_power_save(struct helene_priv *priv)
  381. {
  382. dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
  383. if (priv->state == STATE_ACTIVE)
  384. return 0;
  385. /* Standby setting for internal logic block */
  386. helene_write_reg(priv, 0x87, 0xC4);
  387. /* Standby setting for CPU */
  388. helene_write_reg(priv, 0x88, 0x40);
  389. priv->state = STATE_ACTIVE;
  390. return 0;
  391. }
  392. static int helene_init(struct dvb_frontend *fe)
  393. {
  394. struct helene_priv *priv = fe->tuner_priv;
  395. dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
  396. return helene_leave_power_save(priv);
  397. }
  398. static void helene_release(struct dvb_frontend *fe)
  399. {
  400. struct helene_priv *priv = fe->tuner_priv;
  401. dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
  402. kfree(fe->tuner_priv);
  403. fe->tuner_priv = NULL;
  404. }
  405. static int helene_sleep(struct dvb_frontend *fe)
  406. {
  407. struct helene_priv *priv = fe->tuner_priv;
  408. dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
  409. helene_enter_power_save(priv);
  410. return 0;
  411. }
  412. static enum helene_tv_system_t helene_get_tv_system(struct dvb_frontend *fe)
  413. {
  414. enum helene_tv_system_t system = SONY_HELENE_TV_SYSTEM_UNKNOWN;
  415. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  416. struct helene_priv *priv = fe->tuner_priv;
  417. if (p->delivery_system == SYS_DVBT) {
  418. if (p->bandwidth_hz <= 5000000)
  419. system = SONY_HELENE_DTV_DVBT_5;
  420. else if (p->bandwidth_hz <= 6000000)
  421. system = SONY_HELENE_DTV_DVBT_6;
  422. else if (p->bandwidth_hz <= 7000000)
  423. system = SONY_HELENE_DTV_DVBT_7;
  424. else if (p->bandwidth_hz <= 8000000)
  425. system = SONY_HELENE_DTV_DVBT_8;
  426. else {
  427. system = SONY_HELENE_DTV_DVBT_8;
  428. p->bandwidth_hz = 8000000;
  429. }
  430. } else if (p->delivery_system == SYS_DVBT2) {
  431. if (p->bandwidth_hz <= 5000000)
  432. system = SONY_HELENE_DTV_DVBT2_5;
  433. else if (p->bandwidth_hz <= 6000000)
  434. system = SONY_HELENE_DTV_DVBT2_6;
  435. else if (p->bandwidth_hz <= 7000000)
  436. system = SONY_HELENE_DTV_DVBT2_7;
  437. else if (p->bandwidth_hz <= 8000000)
  438. system = SONY_HELENE_DTV_DVBT2_8;
  439. else {
  440. system = SONY_HELENE_DTV_DVBT2_8;
  441. p->bandwidth_hz = 8000000;
  442. }
  443. } else if (p->delivery_system == SYS_DVBS) {
  444. system = SONY_HELENE_STV_DVBS;
  445. } else if (p->delivery_system == SYS_DVBS2) {
  446. system = SONY_HELENE_STV_DVBS2;
  447. } else if (p->delivery_system == SYS_ISDBS) {
  448. system = SONY_HELENE_STV_ISDBS;
  449. } else if (p->delivery_system == SYS_ISDBT) {
  450. if (p->bandwidth_hz <= 6000000)
  451. system = SONY_HELENE_DTV_ISDBT_6;
  452. else if (p->bandwidth_hz <= 7000000)
  453. system = SONY_HELENE_DTV_ISDBT_7;
  454. else if (p->bandwidth_hz <= 8000000)
  455. system = SONY_HELENE_DTV_ISDBT_8;
  456. else {
  457. system = SONY_HELENE_DTV_ISDBT_8;
  458. p->bandwidth_hz = 8000000;
  459. }
  460. } else if (p->delivery_system == SYS_DVBC_ANNEX_A) {
  461. if (p->bandwidth_hz <= 6000000)
  462. system = SONY_HELENE_DTV_DVBC_6;
  463. else if (p->bandwidth_hz <= 8000000)
  464. system = SONY_HELENE_DTV_DVBC_8;
  465. }
  466. dev_dbg(&priv->i2c->dev,
  467. "%s(): HELENE DTV system %d (delsys %d, bandwidth %d)\n",
  468. __func__, (int)system, p->delivery_system,
  469. p->bandwidth_hz);
  470. return system;
  471. }
  472. static int helene_set_params_s(struct dvb_frontend *fe)
  473. {
  474. u8 data[MAX_WRITE_REGSIZE];
  475. u32 frequency;
  476. enum helene_tv_system_t tv_system;
  477. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  478. struct helene_priv *priv = fe->tuner_priv;
  479. int frequencykHz = p->frequency;
  480. uint32_t frequency4kHz = 0;
  481. u32 symbol_rate = p->symbol_rate/1000;
  482. dev_dbg(&priv->i2c->dev, "%s(): tune frequency %dkHz sr=%uKsps\n",
  483. __func__, frequencykHz, symbol_rate);
  484. tv_system = helene_get_tv_system(fe);
  485. if (tv_system == SONY_HELENE_TV_SYSTEM_UNKNOWN) {
  486. dev_err(&priv->i2c->dev, "%s(): unknown DTV system\n",
  487. __func__);
  488. return -EINVAL;
  489. }
  490. /* RF switch turn to satellite */
  491. if (priv->set_tuner)
  492. priv->set_tuner(priv->set_tuner_data, 0);
  493. frequency = roundup(p->frequency / 1000, 1);
  494. /* Disable IF signal output */
  495. helene_write_reg(priv, 0x15, 0x02);
  496. /* RFIN matching in power save (Sat) reset */
  497. helene_write_reg(priv, 0x43, 0x06);
  498. /* Analog block setting (0x6A, 0x6B) */
  499. data[0] = 0x00;
  500. data[1] = 0x00;
  501. helene_write_regs(priv, 0x6A, data, 2);
  502. helene_write_reg(priv, 0x75, 0x99);
  503. helene_write_reg(priv, 0x9D, 0x00);
  504. /* Tuning setting for CPU (0x61) */
  505. helene_write_reg(priv, 0x61, 0x07);
  506. /* Satellite mode select (0x01) */
  507. helene_write_reg(priv, 0x01, 0x01);
  508. /* Clock enable for internal logic block, CPU wake-up (0x04, 0x05) */
  509. data[0] = 0xC4;
  510. data[1] = 0x40;
  511. switch (priv->xtal) {
  512. case SONY_HELENE_XTAL_16000:
  513. data[2] = 0x02;
  514. break;
  515. case SONY_HELENE_XTAL_20500:
  516. data[2] = 0x02;
  517. break;
  518. case SONY_HELENE_XTAL_24000:
  519. data[2] = 0x03;
  520. break;
  521. case SONY_HELENE_XTAL_41000:
  522. data[2] = 0x05;
  523. break;
  524. default:
  525. dev_err(&priv->i2c->dev, "%s(): unknown xtal %d\n",
  526. __func__, priv->xtal);
  527. return -EINVAL;
  528. }
  529. /* Setting for analog block (0x07). LOOPFILTER INTERNAL */
  530. data[3] = 0x80;
  531. /* Tuning setting for analog block
  532. * (0x08, 0x09, 0x0A, 0x0B). LOOPFILTER INTERNAL
  533. */
  534. if (priv->xtal == SONY_HELENE_XTAL_20500)
  535. data[4] = 0x58;
  536. else
  537. data[4] = 0x70;
  538. data[5] = 0x1E;
  539. data[6] = 0x02;
  540. data[7] = 0x24;
  541. /* Enable for analog block (0x0C, 0x0D, 0x0E). SAT LNA ON */
  542. data[8] = 0x0F;
  543. data[8] |= 0xE0; /* POWERSAVE_TERR_RF_ACTIVE */
  544. data[9] = 0x02;
  545. data[10] = 0x1E;
  546. /* Setting for LPF cutoff frequency (0x0F) */
  547. switch (tv_system) {
  548. case SONY_HELENE_STV_ISDBS:
  549. data[11] = 0x22; /* 22MHz */
  550. break;
  551. case SONY_HELENE_STV_DVBS:
  552. if (symbol_rate <= 4000)
  553. data[11] = 0x05;
  554. else if (symbol_rate <= 10000)
  555. data[11] = (uint8_t)((symbol_rate * 47
  556. + (40000-1)) / 40000);
  557. else
  558. data[11] = (uint8_t)((symbol_rate * 27
  559. + (40000-1)) / 40000 + 5);
  560. if (data[11] > 36)
  561. data[11] = 36; /* 5 <= lpf_cutoff <= 36 is valid */
  562. break;
  563. case SONY_HELENE_STV_DVBS2:
  564. if (symbol_rate <= 4000)
  565. data[11] = 0x05;
  566. else if (symbol_rate <= 10000)
  567. data[11] = (uint8_t)((symbol_rate * 11
  568. + (10000-1)) / 10000);
  569. else
  570. data[11] = (uint8_t)((symbol_rate * 3
  571. + (5000-1)) / 5000 + 5);
  572. if (data[11] > 36)
  573. data[11] = 36; /* 5 <= lpf_cutoff <= 36 is valid */
  574. break;
  575. default:
  576. dev_err(&priv->i2c->dev, "%s(): unknown standard %d\n",
  577. __func__, tv_system);
  578. return -EINVAL;
  579. }
  580. /* RF tuning frequency setting (0x10, 0x11, 0x12) */
  581. frequency4kHz = (frequencykHz + 2) / 4;
  582. data[12] = (uint8_t)(frequency4kHz & 0xFF); /* FRF_L */
  583. data[13] = (uint8_t)((frequency4kHz >> 8) & 0xFF); /* FRF_M */
  584. /* FRF_H (bit[3:0]) */
  585. data[14] = (uint8_t)((frequency4kHz >> 16) & 0x0F);
  586. /* Tuning command (0x13) */
  587. data[15] = 0xFF;
  588. /* Setting for IQOUT_LIMIT (0x14) 0.75Vpp */
  589. data[16] = 0x00;
  590. /* Enable IQ output (0x15) */
  591. data[17] = 0x01;
  592. helene_write_regs(priv, 0x04, data, 18);
  593. dev_dbg(&priv->i2c->dev, "%s(): tune done\n",
  594. __func__);
  595. priv->frequency = frequency;
  596. return 0;
  597. }
  598. static int helene_set_params_t(struct dvb_frontend *fe)
  599. {
  600. u8 data[MAX_WRITE_REGSIZE];
  601. u32 frequency;
  602. enum helene_tv_system_t tv_system;
  603. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  604. struct helene_priv *priv = fe->tuner_priv;
  605. int frequencykHz = p->frequency / 1000;
  606. dev_dbg(&priv->i2c->dev, "%s(): tune frequency %dkHz\n",
  607. __func__, frequencykHz);
  608. tv_system = helene_get_tv_system(fe);
  609. if (tv_system == SONY_HELENE_TV_SYSTEM_UNKNOWN) {
  610. dev_dbg(&priv->i2c->dev, "%s(): unknown DTV system\n",
  611. __func__);
  612. return -EINVAL;
  613. }
  614. if (priv->set_tuner)
  615. priv->set_tuner(priv->set_tuner_data, 1);
  616. frequency = roundup(p->frequency / 1000, 25);
  617. /* mode select */
  618. helene_write_reg(priv, 0x01, 0x00);
  619. /* Disable IF signal output */
  620. helene_write_reg(priv, 0x74, 0x02);
  621. if (priv->state == STATE_SLEEP)
  622. helene_leave_power_save(priv);
  623. /* Initial setting for internal analog block (0x91, 0x92) */
  624. if ((tv_system == SONY_HELENE_DTV_DVBC_6) ||
  625. (tv_system == SONY_HELENE_DTV_DVBC_8)) {
  626. data[0] = 0x16;
  627. data[1] = 0x26;
  628. } else {
  629. data[0] = 0x10;
  630. data[1] = 0x20;
  631. }
  632. helene_write_regs(priv, 0x91, data, 2);
  633. /* Setting for analog block */
  634. if (TERR_INTERNAL_LOOPFILTER_AVAILABLE(tv_system))
  635. data[0] = 0x90;
  636. else
  637. data[0] = 0x00;
  638. /* Setting for local polarity (0x9D) */
  639. data[1] = (uint8_t)(terr_params[tv_system].IS_LOWERLOCAL & 0x01);
  640. helene_write_regs(priv, 0x9C, data, 2);
  641. /* Enable for analog block */
  642. data[0] = 0xEE;
  643. data[1] = 0x02;
  644. data[2] = 0x1E;
  645. data[3] = 0x67; /* Tuning setting for CPU */
  646. /* Setting for PLL reference divider for xtal=24MHz */
  647. if ((tv_system == SONY_HELENE_DTV_DVBC_6) ||
  648. (tv_system == SONY_HELENE_DTV_DVBC_8))
  649. data[4] = 0x18;
  650. else
  651. data[4] = 0x03;
  652. /* Tuning setting for analog block */
  653. if (TERR_INTERNAL_LOOPFILTER_AVAILABLE(tv_system)) {
  654. data[5] = 0x38;
  655. data[6] = 0x1E;
  656. data[7] = 0x02;
  657. data[8] = 0x24;
  658. } else if ((tv_system == SONY_HELENE_DTV_DVBC_6) ||
  659. (tv_system == SONY_HELENE_DTV_DVBC_8)) {
  660. data[5] = 0x1C;
  661. data[6] = 0x78;
  662. data[7] = 0x08;
  663. data[8] = 0x1C;
  664. } else {
  665. data[5] = 0xB4;
  666. data[6] = 0x78;
  667. data[7] = 0x08;
  668. data[8] = 0x30;
  669. }
  670. helene_write_regs(priv, 0x5E, data, 9);
  671. /* LT_AMP_EN should be 0 */
  672. helene_set_reg_bits(priv, 0x67, 0x0, 0x02);
  673. /* Setting for IFOUT_LIMIT */
  674. data[0] = 0x00; /* 1.5Vpp */
  675. /* RF_GAIN setting */
  676. if (terr_params[tv_system].RF_GAIN == HELENE_AUTO)
  677. data[1] = 0x80; /* RF_GAIN_SEL = 1 */
  678. else
  679. data[1] = (uint8_t)((terr_params[tv_system].RF_GAIN
  680. << 4) & 0x70);
  681. /* IF_BPF_GC setting */
  682. data[1] |= (uint8_t)(terr_params[tv_system].IF_BPF_GC & 0x0F);
  683. /* Setting for internal RFAGC (0x6A, 0x6B, 0x6C) */
  684. data[2] = 0x00;
  685. if (frequencykHz <= 172000) {
  686. data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_VL
  687. & 0x0F);
  688. data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_VL
  689. & 0x07);
  690. } else if (frequencykHz <= 464000) {
  691. data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_VH
  692. & 0x0F);
  693. data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_VH
  694. & 0x07);
  695. } else {
  696. data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_U
  697. & 0x0F);
  698. data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_U
  699. & 0x07);
  700. }
  701. data[4] |= 0x20;
  702. /* Setting for IF frequency and bandwidth */
  703. /* IF filter center frequency offset (IF_BPF_F0) (0x6D) */
  704. data[5] = (uint8_t)((terr_params[tv_system].IF_BPF_F0 << 4) & 0x30);
  705. /* IF filter band width (BW) (0x6D) */
  706. data[5] |= (uint8_t)(terr_params[tv_system].BW & 0x03);
  707. /* IF frequency offset value (FIF_OFFSET) (0x6E) */
  708. data[6] = (uint8_t)(terr_params[tv_system].FIF_OFFSET & 0x1F);
  709. /* IF band width offset value (BW_OFFSET) (0x6F) */
  710. data[7] = (uint8_t)(terr_params[tv_system].BW_OFFSET & 0x1F);
  711. /* RF tuning frequency setting (0x70, 0x71, 0x72) */
  712. data[8] = (uint8_t)(frequencykHz & 0xFF); /* FRF_L */
  713. data[9] = (uint8_t)((frequencykHz >> 8) & 0xFF); /* FRF_M */
  714. data[10] = (uint8_t)((frequencykHz >> 16)
  715. & 0x0F); /* FRF_H (bit[3:0]) */
  716. /* Tuning command */
  717. data[11] = 0xFF;
  718. /* Enable IF output, AGC and IFOUT pin selection (0x74) */
  719. data[12] = 0x01;
  720. if ((tv_system == SONY_HELENE_DTV_DVBC_6) ||
  721. (tv_system == SONY_HELENE_DTV_DVBC_8)) {
  722. data[13] = 0xD9;
  723. data[14] = 0x0F;
  724. data[15] = 0x24;
  725. data[16] = 0x87;
  726. } else {
  727. data[13] = 0x99;
  728. data[14] = 0x00;
  729. data[15] = 0x24;
  730. data[16] = 0x87;
  731. }
  732. helene_write_regs(priv, 0x68, data, 17);
  733. dev_dbg(&priv->i2c->dev, "%s(): tune done\n",
  734. __func__);
  735. priv->frequency = frequency;
  736. return 0;
  737. }
  738. static int helene_set_params(struct dvb_frontend *fe)
  739. {
  740. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  741. if (p->delivery_system == SYS_DVBT ||
  742. p->delivery_system == SYS_DVBT2 ||
  743. p->delivery_system == SYS_ISDBT ||
  744. p->delivery_system == SYS_DVBC_ANNEX_A)
  745. return helene_set_params_t(fe);
  746. return helene_set_params_s(fe);
  747. }
  748. static int helene_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  749. {
  750. struct helene_priv *priv = fe->tuner_priv;
  751. *frequency = priv->frequency * 1000;
  752. return 0;
  753. }
  754. static const struct dvb_tuner_ops helene_tuner_ops_t = {
  755. .info = {
  756. .name = "Sony HELENE Ter tuner",
  757. .frequency_min_hz = 1 * MHz,
  758. .frequency_max_hz = 1200 * MHz,
  759. .frequency_step_hz = 25 * kHz,
  760. },
  761. .init = helene_init,
  762. .release = helene_release,
  763. .sleep = helene_sleep,
  764. .set_params = helene_set_params_t,
  765. .get_frequency = helene_get_frequency,
  766. };
  767. static const struct dvb_tuner_ops helene_tuner_ops_s = {
  768. .info = {
  769. .name = "Sony HELENE Sat tuner",
  770. .frequency_min_hz = 500 * MHz,
  771. .frequency_max_hz = 2500 * MHz,
  772. .frequency_step_hz = 1 * MHz,
  773. },
  774. .init = helene_init,
  775. .release = helene_release,
  776. .sleep = helene_sleep,
  777. .set_params = helene_set_params_s,
  778. .get_frequency = helene_get_frequency,
  779. };
  780. static const struct dvb_tuner_ops helene_tuner_ops = {
  781. .info = {
  782. .name = "Sony HELENE Sat/Ter tuner",
  783. .frequency_min_hz = 1 * MHz,
  784. .frequency_max_hz = 2500 * MHz,
  785. .frequency_step_hz = 25 * kHz,
  786. },
  787. .init = helene_init,
  788. .release = helene_release,
  789. .sleep = helene_sleep,
  790. .set_params = helene_set_params,
  791. .get_frequency = helene_get_frequency,
  792. };
  793. /* power-on tuner
  794. * call once after reset
  795. */
  796. static int helene_x_pon(struct helene_priv *priv)
  797. {
  798. /* RFIN matching in power save (terrestrial) = ACTIVE */
  799. /* RFIN matching in power save (satellite) = ACTIVE */
  800. u8 dataT[] = { 0x06, 0x00, 0x02, 0x00 };
  801. /* SAT_RF_ACTIVE = true, lnaOff = false, terrRfActive = true */
  802. u8 dataS[] = { 0x05, 0x06 };
  803. u8 cdata[] = {0x7A, 0x01};
  804. u8 data[20];
  805. u8 rdata[2];
  806. /* mode select */
  807. helene_write_reg(priv, 0x01, 0x00);
  808. helene_write_reg(priv, 0x67, dataT[3]);
  809. helene_write_reg(priv, 0x43, dataS[1]);
  810. helene_write_regs(priv, 0x5E, dataT, 3);
  811. helene_write_reg(priv, 0x0C, dataS[0]);
  812. /* Initial setting for internal logic block */
  813. helene_write_regs(priv, 0x99, cdata, sizeof(cdata));
  814. /* 0x81 - 0x94 */
  815. if (priv->xtal == SONY_HELENE_XTAL_16000)
  816. data[0] = 0x10; /* xtal 16 MHz */
  817. else
  818. data[0] = 0x18; /* xtal 24 MHz */
  819. data[1] = (uint8_t)(0x80 | (0x04 & 0x1F)); /* 4 x 25 = 100uA */
  820. data[2] = (uint8_t)(0x80 | (0x26 & 0x7F)); /* 38 x 0.25 = 9.5pF */
  821. data[3] = 0x80; /* REFOUT signal output 500mVpp */
  822. data[4] = 0x00; /* GPIO settings */
  823. data[5] = 0x00; /* GPIO settings */
  824. data[6] = 0xC4; /* Clock enable for internal logic block */
  825. data[7] = 0x40; /* Start CPU boot-up */
  826. data[8] = 0x10; /* For burst-write */
  827. /* Setting for internal RFAGC */
  828. data[9] = 0x00;
  829. data[10] = 0x45;
  830. data[11] = 0x75;
  831. data[12] = 0x07; /* Setting for analog block */
  832. /* Initial setting for internal analog block */
  833. data[13] = 0x1C;
  834. data[14] = 0x3F;
  835. data[15] = 0x02;
  836. data[16] = 0x10;
  837. data[17] = 0x20;
  838. data[18] = 0x0A;
  839. data[19] = 0x00;
  840. helene_write_regs(priv, 0x81, data, sizeof(data));
  841. /* Setting for internal RFAGC */
  842. helene_write_reg(priv, 0x9B, 0x00);
  843. msleep(20);
  844. /* Check CPU_STT/CPU_ERR */
  845. helene_read_regs(priv, 0x1A, rdata, sizeof(rdata));
  846. if (rdata[0] != 0x00) {
  847. dev_err(&priv->i2c->dev,
  848. "HELENE tuner CPU error 0x%x\n", rdata[0]);
  849. return -EIO;
  850. }
  851. /* VCO current setting */
  852. cdata[0] = 0x90;
  853. cdata[1] = 0x06;
  854. helene_write_regs(priv, 0x17, cdata, sizeof(cdata));
  855. msleep(20);
  856. helene_read_reg(priv, 0x19, data);
  857. helene_write_reg(priv, 0x95, (uint8_t)((data[0] >> 4) & 0x0F));
  858. /* Disable IF signal output */
  859. helene_write_reg(priv, 0x74, 0x02);
  860. /* Standby setting for CPU */
  861. helene_write_reg(priv, 0x88, 0x00);
  862. /* Standby setting for internal logic block */
  863. helene_write_reg(priv, 0x87, 0xC0);
  864. /* Load capacitance control setting for crystal oscillator */
  865. helene_write_reg(priv, 0x80, 0x01);
  866. /* Satellite initial setting */
  867. cdata[0] = 0x07;
  868. cdata[1] = 0x00;
  869. helene_write_regs(priv, 0x41, cdata, sizeof(cdata));
  870. dev_info(&priv->i2c->dev,
  871. "HELENE tuner x_pon done\n");
  872. return 0;
  873. }
  874. struct dvb_frontend *helene_attach_s(struct dvb_frontend *fe,
  875. const struct helene_config *config,
  876. struct i2c_adapter *i2c)
  877. {
  878. struct helene_priv *priv = NULL;
  879. priv = kzalloc(sizeof(struct helene_priv), GFP_KERNEL);
  880. if (priv == NULL)
  881. return NULL;
  882. priv->i2c_address = (config->i2c_address >> 1);
  883. priv->i2c = i2c;
  884. priv->set_tuner_data = config->set_tuner_priv;
  885. priv->set_tuner = config->set_tuner_callback;
  886. priv->xtal = config->xtal;
  887. if (fe->ops.i2c_gate_ctrl)
  888. fe->ops.i2c_gate_ctrl(fe, 1);
  889. if (helene_x_pon(priv) != 0) {
  890. kfree(priv);
  891. return NULL;
  892. }
  893. if (fe->ops.i2c_gate_ctrl)
  894. fe->ops.i2c_gate_ctrl(fe, 0);
  895. memcpy(&fe->ops.tuner_ops, &helene_tuner_ops_s,
  896. sizeof(struct dvb_tuner_ops));
  897. fe->tuner_priv = priv;
  898. dev_info(&priv->i2c->dev,
  899. "Sony HELENE Sat attached on addr=%x at I2C adapter %p\n",
  900. priv->i2c_address, priv->i2c);
  901. return fe;
  902. }
  903. EXPORT_SYMBOL(helene_attach_s);
  904. struct dvb_frontend *helene_attach(struct dvb_frontend *fe,
  905. const struct helene_config *config,
  906. struct i2c_adapter *i2c)
  907. {
  908. struct helene_priv *priv = NULL;
  909. priv = kzalloc(sizeof(struct helene_priv), GFP_KERNEL);
  910. if (priv == NULL)
  911. return NULL;
  912. priv->i2c_address = (config->i2c_address >> 1);
  913. priv->i2c = i2c;
  914. priv->set_tuner_data = config->set_tuner_priv;
  915. priv->set_tuner = config->set_tuner_callback;
  916. priv->xtal = config->xtal;
  917. if (fe->ops.i2c_gate_ctrl)
  918. fe->ops.i2c_gate_ctrl(fe, 1);
  919. if (helene_x_pon(priv) != 0) {
  920. kfree(priv);
  921. return NULL;
  922. }
  923. if (fe->ops.i2c_gate_ctrl)
  924. fe->ops.i2c_gate_ctrl(fe, 0);
  925. memcpy(&fe->ops.tuner_ops, &helene_tuner_ops_t,
  926. sizeof(struct dvb_tuner_ops));
  927. fe->tuner_priv = priv;
  928. dev_info(&priv->i2c->dev,
  929. "Sony HELENE Ter attached on addr=%x at I2C adapter %p\n",
  930. priv->i2c_address, priv->i2c);
  931. return fe;
  932. }
  933. EXPORT_SYMBOL(helene_attach);
  934. static int helene_probe(struct i2c_client *client,
  935. const struct i2c_device_id *id)
  936. {
  937. struct helene_config *config = client->dev.platform_data;
  938. struct dvb_frontend *fe = config->fe;
  939. struct device *dev = &client->dev;
  940. struct helene_priv *priv;
  941. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  942. if (!priv)
  943. return -ENOMEM;
  944. priv->i2c_address = client->addr;
  945. priv->i2c = client->adapter;
  946. priv->set_tuner_data = config->set_tuner_priv;
  947. priv->set_tuner = config->set_tuner_callback;
  948. priv->xtal = config->xtal;
  949. if (fe->ops.i2c_gate_ctrl)
  950. fe->ops.i2c_gate_ctrl(fe, 1);
  951. if (helene_x_pon(priv) != 0)
  952. return -EINVAL;
  953. if (fe->ops.i2c_gate_ctrl)
  954. fe->ops.i2c_gate_ctrl(fe, 0);
  955. memcpy(&fe->ops.tuner_ops, &helene_tuner_ops,
  956. sizeof(struct dvb_tuner_ops));
  957. fe->tuner_priv = priv;
  958. i2c_set_clientdata(client, priv);
  959. dev_info(dev, "Sony HELENE attached on addr=%x at I2C adapter %p\n",
  960. priv->i2c_address, priv->i2c);
  961. return 0;
  962. }
  963. static const struct i2c_device_id helene_id[] = {
  964. { "helene", },
  965. {}
  966. };
  967. MODULE_DEVICE_TABLE(i2c, helene_id);
  968. static struct i2c_driver helene_driver = {
  969. .driver = {
  970. .name = "helene",
  971. },
  972. .probe = helene_probe,
  973. .id_table = helene_id,
  974. };
  975. module_i2c_driver(helene_driver);
  976. MODULE_DESCRIPTION("Sony HELENE Sat/Ter tuner driver");
  977. MODULE_AUTHOR("Abylay Ospan <aospan@netup.ru>");
  978. MODULE_LICENSE("GPL");