cx22702.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. Conexant 22702 DVB OFDM demodulator driver
  4. based on:
  5. Alps TDMB7 DVB OFDM demodulator driver
  6. Copyright (C) 2001-2002 Convergence Integrated Media GmbH
  7. Holger Waechtler <holger@convergence.de>
  8. Copyright (C) 2004 Steven Toth <stoth@linuxtv.org>
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/string.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <media/dvb_frontend.h>
  17. #include "cx22702.h"
  18. struct cx22702_state {
  19. struct i2c_adapter *i2c;
  20. /* configuration settings */
  21. const struct cx22702_config *config;
  22. struct dvb_frontend frontend;
  23. /* previous uncorrected block counter */
  24. u8 prevUCBlocks;
  25. };
  26. static int debug;
  27. module_param(debug, int, 0644);
  28. MODULE_PARM_DESC(debug, "Enable verbose debug messages");
  29. #define dprintk if (debug) printk
  30. /* Register values to initialise the demod */
  31. static const u8 init_tab[] = {
  32. 0x00, 0x00, /* Stop acquisition */
  33. 0x0B, 0x06,
  34. 0x09, 0x01,
  35. 0x0D, 0x41,
  36. 0x16, 0x32,
  37. 0x20, 0x0A,
  38. 0x21, 0x17,
  39. 0x24, 0x3e,
  40. 0x26, 0xff,
  41. 0x27, 0x10,
  42. 0x28, 0x00,
  43. 0x29, 0x00,
  44. 0x2a, 0x10,
  45. 0x2b, 0x00,
  46. 0x2c, 0x10,
  47. 0x2d, 0x00,
  48. 0x48, 0xd4,
  49. 0x49, 0x56,
  50. 0x6b, 0x1e,
  51. 0xc8, 0x02,
  52. 0xf9, 0x00,
  53. 0xfa, 0x00,
  54. 0xfb, 0x00,
  55. 0xfc, 0x00,
  56. 0xfd, 0x00,
  57. };
  58. static int cx22702_writereg(struct cx22702_state *state, u8 reg, u8 data)
  59. {
  60. int ret;
  61. u8 buf[] = { reg, data };
  62. struct i2c_msg msg = {
  63. .addr = state->config->demod_address, .flags = 0,
  64. .buf = buf, .len = 2 };
  65. ret = i2c_transfer(state->i2c, &msg, 1);
  66. if (unlikely(ret != 1)) {
  67. printk(KERN_ERR
  68. "%s: error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
  69. __func__, reg, data, ret);
  70. return -1;
  71. }
  72. return 0;
  73. }
  74. static u8 cx22702_readreg(struct cx22702_state *state, u8 reg)
  75. {
  76. int ret;
  77. u8 data;
  78. struct i2c_msg msg[] = {
  79. { .addr = state->config->demod_address, .flags = 0,
  80. .buf = &reg, .len = 1 },
  81. { .addr = state->config->demod_address, .flags = I2C_M_RD,
  82. .buf = &data, .len = 1 } };
  83. ret = i2c_transfer(state->i2c, msg, 2);
  84. if (unlikely(ret != 2)) {
  85. printk(KERN_ERR "%s: error (reg == 0x%02x, ret == %i)\n",
  86. __func__, reg, ret);
  87. return 0;
  88. }
  89. return data;
  90. }
  91. static int cx22702_set_inversion(struct cx22702_state *state, int inversion)
  92. {
  93. u8 val;
  94. val = cx22702_readreg(state, 0x0C);
  95. switch (inversion) {
  96. case INVERSION_AUTO:
  97. return -EOPNOTSUPP;
  98. case INVERSION_ON:
  99. val |= 0x01;
  100. break;
  101. case INVERSION_OFF:
  102. val &= 0xfe;
  103. break;
  104. default:
  105. return -EINVAL;
  106. }
  107. return cx22702_writereg(state, 0x0C, val);
  108. }
  109. /* Retrieve the demod settings */
  110. static int cx22702_get_tps(struct cx22702_state *state,
  111. struct dtv_frontend_properties *p)
  112. {
  113. u8 val;
  114. /* Make sure the TPS regs are valid */
  115. if (!(cx22702_readreg(state, 0x0A) & 0x20))
  116. return -EAGAIN;
  117. val = cx22702_readreg(state, 0x01);
  118. switch ((val & 0x18) >> 3) {
  119. case 0:
  120. p->modulation = QPSK;
  121. break;
  122. case 1:
  123. p->modulation = QAM_16;
  124. break;
  125. case 2:
  126. p->modulation = QAM_64;
  127. break;
  128. }
  129. switch (val & 0x07) {
  130. case 0:
  131. p->hierarchy = HIERARCHY_NONE;
  132. break;
  133. case 1:
  134. p->hierarchy = HIERARCHY_1;
  135. break;
  136. case 2:
  137. p->hierarchy = HIERARCHY_2;
  138. break;
  139. case 3:
  140. p->hierarchy = HIERARCHY_4;
  141. break;
  142. }
  143. val = cx22702_readreg(state, 0x02);
  144. switch ((val & 0x38) >> 3) {
  145. case 0:
  146. p->code_rate_HP = FEC_1_2;
  147. break;
  148. case 1:
  149. p->code_rate_HP = FEC_2_3;
  150. break;
  151. case 2:
  152. p->code_rate_HP = FEC_3_4;
  153. break;
  154. case 3:
  155. p->code_rate_HP = FEC_5_6;
  156. break;
  157. case 4:
  158. p->code_rate_HP = FEC_7_8;
  159. break;
  160. }
  161. switch (val & 0x07) {
  162. case 0:
  163. p->code_rate_LP = FEC_1_2;
  164. break;
  165. case 1:
  166. p->code_rate_LP = FEC_2_3;
  167. break;
  168. case 2:
  169. p->code_rate_LP = FEC_3_4;
  170. break;
  171. case 3:
  172. p->code_rate_LP = FEC_5_6;
  173. break;
  174. case 4:
  175. p->code_rate_LP = FEC_7_8;
  176. break;
  177. }
  178. val = cx22702_readreg(state, 0x03);
  179. switch ((val & 0x0c) >> 2) {
  180. case 0:
  181. p->guard_interval = GUARD_INTERVAL_1_32;
  182. break;
  183. case 1:
  184. p->guard_interval = GUARD_INTERVAL_1_16;
  185. break;
  186. case 2:
  187. p->guard_interval = GUARD_INTERVAL_1_8;
  188. break;
  189. case 3:
  190. p->guard_interval = GUARD_INTERVAL_1_4;
  191. break;
  192. }
  193. switch (val & 0x03) {
  194. case 0:
  195. p->transmission_mode = TRANSMISSION_MODE_2K;
  196. break;
  197. case 1:
  198. p->transmission_mode = TRANSMISSION_MODE_8K;
  199. break;
  200. }
  201. return 0;
  202. }
  203. static int cx22702_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  204. {
  205. struct cx22702_state *state = fe->demodulator_priv;
  206. u8 val;
  207. dprintk("%s(%d)\n", __func__, enable);
  208. val = cx22702_readreg(state, 0x0D);
  209. if (enable)
  210. val &= 0xfe;
  211. else
  212. val |= 0x01;
  213. return cx22702_writereg(state, 0x0D, val);
  214. }
  215. /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
  216. static int cx22702_set_tps(struct dvb_frontend *fe)
  217. {
  218. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  219. u8 val;
  220. struct cx22702_state *state = fe->demodulator_priv;
  221. if (fe->ops.tuner_ops.set_params) {
  222. fe->ops.tuner_ops.set_params(fe);
  223. if (fe->ops.i2c_gate_ctrl)
  224. fe->ops.i2c_gate_ctrl(fe, 0);
  225. }
  226. /* set inversion */
  227. cx22702_set_inversion(state, p->inversion);
  228. /* set bandwidth */
  229. val = cx22702_readreg(state, 0x0C) & 0xcf;
  230. switch (p->bandwidth_hz) {
  231. case 6000000:
  232. val |= 0x20;
  233. break;
  234. case 7000000:
  235. val |= 0x10;
  236. break;
  237. case 8000000:
  238. break;
  239. default:
  240. dprintk("%s: invalid bandwidth\n", __func__);
  241. return -EINVAL;
  242. }
  243. cx22702_writereg(state, 0x0C, val);
  244. p->code_rate_LP = FEC_AUTO; /* temp hack as manual not working */
  245. /* use auto configuration? */
  246. if ((p->hierarchy == HIERARCHY_AUTO) ||
  247. (p->modulation == QAM_AUTO) ||
  248. (p->code_rate_HP == FEC_AUTO) ||
  249. (p->code_rate_LP == FEC_AUTO) ||
  250. (p->guard_interval == GUARD_INTERVAL_AUTO) ||
  251. (p->transmission_mode == TRANSMISSION_MODE_AUTO)) {
  252. /* TPS Source - use hardware driven values */
  253. cx22702_writereg(state, 0x06, 0x10);
  254. cx22702_writereg(state, 0x07, 0x9);
  255. cx22702_writereg(state, 0x08, 0xC1);
  256. cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B)
  257. & 0xfc);
  258. cx22702_writereg(state, 0x0C,
  259. (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
  260. cx22702_writereg(state, 0x00, 0x01); /* Begin acquisition */
  261. dprintk("%s: Autodetecting\n", __func__);
  262. return 0;
  263. }
  264. /* manually programmed values */
  265. switch (p->modulation) { /* mask 0x18 */
  266. case QPSK:
  267. val = 0x00;
  268. break;
  269. case QAM_16:
  270. val = 0x08;
  271. break;
  272. case QAM_64:
  273. val = 0x10;
  274. break;
  275. default:
  276. dprintk("%s: invalid modulation\n", __func__);
  277. return -EINVAL;
  278. }
  279. switch (p->hierarchy) { /* mask 0x07 */
  280. case HIERARCHY_NONE:
  281. break;
  282. case HIERARCHY_1:
  283. val |= 0x01;
  284. break;
  285. case HIERARCHY_2:
  286. val |= 0x02;
  287. break;
  288. case HIERARCHY_4:
  289. val |= 0x03;
  290. break;
  291. default:
  292. dprintk("%s: invalid hierarchy\n", __func__);
  293. return -EINVAL;
  294. }
  295. cx22702_writereg(state, 0x06, val);
  296. switch (p->code_rate_HP) { /* mask 0x38 */
  297. case FEC_NONE:
  298. case FEC_1_2:
  299. val = 0x00;
  300. break;
  301. case FEC_2_3:
  302. val = 0x08;
  303. break;
  304. case FEC_3_4:
  305. val = 0x10;
  306. break;
  307. case FEC_5_6:
  308. val = 0x18;
  309. break;
  310. case FEC_7_8:
  311. val = 0x20;
  312. break;
  313. default:
  314. dprintk("%s: invalid code_rate_HP\n", __func__);
  315. return -EINVAL;
  316. }
  317. switch (p->code_rate_LP) { /* mask 0x07 */
  318. case FEC_NONE:
  319. case FEC_1_2:
  320. break;
  321. case FEC_2_3:
  322. val |= 0x01;
  323. break;
  324. case FEC_3_4:
  325. val |= 0x02;
  326. break;
  327. case FEC_5_6:
  328. val |= 0x03;
  329. break;
  330. case FEC_7_8:
  331. val |= 0x04;
  332. break;
  333. default:
  334. dprintk("%s: invalid code_rate_LP\n", __func__);
  335. return -EINVAL;
  336. }
  337. cx22702_writereg(state, 0x07, val);
  338. switch (p->guard_interval) { /* mask 0x0c */
  339. case GUARD_INTERVAL_1_32:
  340. val = 0x00;
  341. break;
  342. case GUARD_INTERVAL_1_16:
  343. val = 0x04;
  344. break;
  345. case GUARD_INTERVAL_1_8:
  346. val = 0x08;
  347. break;
  348. case GUARD_INTERVAL_1_4:
  349. val = 0x0c;
  350. break;
  351. default:
  352. dprintk("%s: invalid guard_interval\n", __func__);
  353. return -EINVAL;
  354. }
  355. switch (p->transmission_mode) { /* mask 0x03 */
  356. case TRANSMISSION_MODE_2K:
  357. break;
  358. case TRANSMISSION_MODE_8K:
  359. val |= 0x1;
  360. break;
  361. default:
  362. dprintk("%s: invalid transmission_mode\n", __func__);
  363. return -EINVAL;
  364. }
  365. cx22702_writereg(state, 0x08, val);
  366. cx22702_writereg(state, 0x0B,
  367. (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02);
  368. cx22702_writereg(state, 0x0C,
  369. (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
  370. /* Begin channel acquisition */
  371. cx22702_writereg(state, 0x00, 0x01);
  372. return 0;
  373. }
  374. /* Reset the demod hardware and reset all of the configuration registers
  375. to a default state. */
  376. static int cx22702_init(struct dvb_frontend *fe)
  377. {
  378. int i;
  379. struct cx22702_state *state = fe->demodulator_priv;
  380. cx22702_writereg(state, 0x00, 0x02);
  381. msleep(10);
  382. for (i = 0; i < ARRAY_SIZE(init_tab); i += 2)
  383. cx22702_writereg(state, init_tab[i], init_tab[i + 1]);
  384. cx22702_writereg(state, 0xf8, (state->config->output_mode << 1)
  385. & 0x02);
  386. cx22702_i2c_gate_ctrl(fe, 0);
  387. return 0;
  388. }
  389. static int cx22702_read_status(struct dvb_frontend *fe, enum fe_status *status)
  390. {
  391. struct cx22702_state *state = fe->demodulator_priv;
  392. u8 reg0A;
  393. u8 reg23;
  394. *status = 0;
  395. reg0A = cx22702_readreg(state, 0x0A);
  396. reg23 = cx22702_readreg(state, 0x23);
  397. dprintk("%s: status demod=0x%02x agc=0x%02x\n"
  398. , __func__, reg0A, reg23);
  399. if (reg0A & 0x10) {
  400. *status |= FE_HAS_LOCK;
  401. *status |= FE_HAS_VITERBI;
  402. *status |= FE_HAS_SYNC;
  403. }
  404. if (reg0A & 0x20)
  405. *status |= FE_HAS_CARRIER;
  406. if (reg23 < 0xf0)
  407. *status |= FE_HAS_SIGNAL;
  408. return 0;
  409. }
  410. static int cx22702_read_ber(struct dvb_frontend *fe, u32 *ber)
  411. {
  412. struct cx22702_state *state = fe->demodulator_priv;
  413. if (cx22702_readreg(state, 0xE4) & 0x02) {
  414. /* Realtime statistics */
  415. *ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  416. | (cx22702_readreg(state, 0xDF) & 0x7F);
  417. } else {
  418. /* Averagtine statistics */
  419. *ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  420. | cx22702_readreg(state, 0xDF);
  421. }
  422. return 0;
  423. }
  424. static int cx22702_read_signal_strength(struct dvb_frontend *fe,
  425. u16 *signal_strength)
  426. {
  427. struct cx22702_state *state = fe->demodulator_priv;
  428. u8 reg23;
  429. /*
  430. * Experience suggests that the strength signal register works as
  431. * follows:
  432. * - In the absence of signal, value is 0xff.
  433. * - In the presence of a weak signal, bit 7 is set, not sure what
  434. * the lower 7 bits mean.
  435. * - In the presence of a strong signal, the register holds a 7-bit
  436. * value (bit 7 is cleared), with greater values standing for
  437. * weaker signals.
  438. */
  439. reg23 = cx22702_readreg(state, 0x23);
  440. if (reg23 & 0x80) {
  441. *signal_strength = 0;
  442. } else {
  443. reg23 = ~reg23 & 0x7f;
  444. /* Scale to 16 bit */
  445. *signal_strength = (reg23 << 9) | (reg23 << 2) | (reg23 >> 5);
  446. }
  447. return 0;
  448. }
  449. static int cx22702_read_snr(struct dvb_frontend *fe, u16 *snr)
  450. {
  451. struct cx22702_state *state = fe->demodulator_priv;
  452. u16 rs_ber;
  453. if (cx22702_readreg(state, 0xE4) & 0x02) {
  454. /* Realtime statistics */
  455. rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  456. | (cx22702_readreg(state, 0xDF) & 0x7F);
  457. } else {
  458. /* Averagine statistics */
  459. rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 8
  460. | cx22702_readreg(state, 0xDF);
  461. }
  462. *snr = ~rs_ber;
  463. return 0;
  464. }
  465. static int cx22702_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  466. {
  467. struct cx22702_state *state = fe->demodulator_priv;
  468. u8 _ucblocks;
  469. /* RS Uncorrectable Packet Count then reset */
  470. _ucblocks = cx22702_readreg(state, 0xE3);
  471. if (state->prevUCBlocks < _ucblocks)
  472. *ucblocks = (_ucblocks - state->prevUCBlocks);
  473. else
  474. *ucblocks = state->prevUCBlocks - _ucblocks;
  475. state->prevUCBlocks = _ucblocks;
  476. return 0;
  477. }
  478. static int cx22702_get_frontend(struct dvb_frontend *fe,
  479. struct dtv_frontend_properties *c)
  480. {
  481. struct cx22702_state *state = fe->demodulator_priv;
  482. u8 reg0C = cx22702_readreg(state, 0x0C);
  483. c->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
  484. return cx22702_get_tps(state, c);
  485. }
  486. static int cx22702_get_tune_settings(struct dvb_frontend *fe,
  487. struct dvb_frontend_tune_settings *tune)
  488. {
  489. tune->min_delay_ms = 1000;
  490. return 0;
  491. }
  492. static void cx22702_release(struct dvb_frontend *fe)
  493. {
  494. struct cx22702_state *state = fe->demodulator_priv;
  495. kfree(state);
  496. }
  497. static const struct dvb_frontend_ops cx22702_ops;
  498. struct dvb_frontend *cx22702_attach(const struct cx22702_config *config,
  499. struct i2c_adapter *i2c)
  500. {
  501. struct cx22702_state *state = NULL;
  502. /* allocate memory for the internal state */
  503. state = kzalloc(sizeof(struct cx22702_state), GFP_KERNEL);
  504. if (state == NULL)
  505. goto error;
  506. /* setup the state */
  507. state->config = config;
  508. state->i2c = i2c;
  509. /* check if the demod is there */
  510. if (cx22702_readreg(state, 0x1f) != 0x3)
  511. goto error;
  512. /* create dvb_frontend */
  513. memcpy(&state->frontend.ops, &cx22702_ops,
  514. sizeof(struct dvb_frontend_ops));
  515. state->frontend.demodulator_priv = state;
  516. return &state->frontend;
  517. error:
  518. kfree(state);
  519. return NULL;
  520. }
  521. EXPORT_SYMBOL(cx22702_attach);
  522. static const struct dvb_frontend_ops cx22702_ops = {
  523. .delsys = { SYS_DVBT },
  524. .info = {
  525. .name = "Conexant CX22702 DVB-T",
  526. .frequency_min_hz = 177 * MHz,
  527. .frequency_max_hz = 858 * MHz,
  528. .frequency_stepsize_hz = 166666,
  529. .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  530. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  531. FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
  532. FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
  533. FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
  534. },
  535. .release = cx22702_release,
  536. .init = cx22702_init,
  537. .i2c_gate_ctrl = cx22702_i2c_gate_ctrl,
  538. .set_frontend = cx22702_set_tps,
  539. .get_frontend = cx22702_get_frontend,
  540. .get_tune_settings = cx22702_get_tune_settings,
  541. .read_status = cx22702_read_status,
  542. .read_ber = cx22702_read_ber,
  543. .read_signal_strength = cx22702_read_signal_strength,
  544. .read_snr = cx22702_read_snr,
  545. .read_ucblocks = cx22702_read_ucblocks,
  546. };
  547. MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
  548. MODULE_AUTHOR("Steven Toth");
  549. MODULE_LICENSE("GPL");