cec-pin.c 37 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright 2017 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/sched/types.h>
  8. #include <media/cec-pin.h>
  9. #include "cec-pin-priv.h"
  10. /* All timings are in microseconds */
  11. /* start bit timings */
  12. #define CEC_TIM_START_BIT_LOW 3700
  13. #define CEC_TIM_START_BIT_LOW_MIN 3500
  14. #define CEC_TIM_START_BIT_LOW_MAX 3900
  15. #define CEC_TIM_START_BIT_TOTAL 4500
  16. #define CEC_TIM_START_BIT_TOTAL_MIN 4300
  17. #define CEC_TIM_START_BIT_TOTAL_MAX 4700
  18. /* data bit timings */
  19. #define CEC_TIM_DATA_BIT_0_LOW 1500
  20. #define CEC_TIM_DATA_BIT_0_LOW_MIN 1300
  21. #define CEC_TIM_DATA_BIT_0_LOW_MAX 1700
  22. #define CEC_TIM_DATA_BIT_1_LOW 600
  23. #define CEC_TIM_DATA_BIT_1_LOW_MIN 400
  24. #define CEC_TIM_DATA_BIT_1_LOW_MAX 800
  25. #define CEC_TIM_DATA_BIT_TOTAL 2400
  26. #define CEC_TIM_DATA_BIT_TOTAL_MIN 2050
  27. #define CEC_TIM_DATA_BIT_TOTAL_MAX 2750
  28. /* earliest safe time to sample the bit state */
  29. #define CEC_TIM_DATA_BIT_SAMPLE 850
  30. /* earliest time the bit is back to 1 (T7 + 50) */
  31. #define CEC_TIM_DATA_BIT_HIGH 1750
  32. /* when idle, sample once per millisecond */
  33. #define CEC_TIM_IDLE_SAMPLE 1000
  34. /* when processing the start bit, sample twice per millisecond */
  35. #define CEC_TIM_START_BIT_SAMPLE 500
  36. /* when polling for a state change, sample once every 50 microseconds */
  37. #define CEC_TIM_SAMPLE 50
  38. #define CEC_TIM_LOW_DRIVE_ERROR (1.5 * CEC_TIM_DATA_BIT_TOTAL)
  39. /*
  40. * Total data bit time that is too short/long for a valid bit,
  41. * used for error injection.
  42. */
  43. #define CEC_TIM_DATA_BIT_TOTAL_SHORT 1800
  44. #define CEC_TIM_DATA_BIT_TOTAL_LONG 2900
  45. /*
  46. * Total start bit time that is too short/long for a valid bit,
  47. * used for error injection.
  48. */
  49. #define CEC_TIM_START_BIT_TOTAL_SHORT 4100
  50. #define CEC_TIM_START_BIT_TOTAL_LONG 5000
  51. /* Data bits are 0-7, EOM is bit 8 and ACK is bit 9 */
  52. #define EOM_BIT 8
  53. #define ACK_BIT 9
  54. struct cec_state {
  55. const char * const name;
  56. unsigned int usecs;
  57. };
  58. static const struct cec_state states[CEC_PIN_STATES] = {
  59. { "Off", 0 },
  60. { "Idle", CEC_TIM_IDLE_SAMPLE },
  61. { "Tx Wait", CEC_TIM_SAMPLE },
  62. { "Tx Wait for High", CEC_TIM_IDLE_SAMPLE },
  63. { "Tx Start Bit Low", CEC_TIM_START_BIT_LOW },
  64. { "Tx Start Bit High", CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW },
  65. { "Tx Start Bit High Short", CEC_TIM_START_BIT_TOTAL_SHORT - CEC_TIM_START_BIT_LOW },
  66. { "Tx Start Bit High Long", CEC_TIM_START_BIT_TOTAL_LONG - CEC_TIM_START_BIT_LOW },
  67. { "Tx Start Bit Low Custom", 0 },
  68. { "Tx Start Bit High Custom", 0 },
  69. { "Tx Data 0 Low", CEC_TIM_DATA_BIT_0_LOW },
  70. { "Tx Data 0 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_0_LOW },
  71. { "Tx Data 0 High Short", CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_0_LOW },
  72. { "Tx Data 0 High Long", CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_0_LOW },
  73. { "Tx Data 1 Low", CEC_TIM_DATA_BIT_1_LOW },
  74. { "Tx Data 1 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_1_LOW },
  75. { "Tx Data 1 High Short", CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_1_LOW },
  76. { "Tx Data 1 High Long", CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_1_LOW },
  77. { "Tx Data 1 High Pre Sample", CEC_TIM_DATA_BIT_SAMPLE - CEC_TIM_DATA_BIT_1_LOW },
  78. { "Tx Data 1 High Post Sample", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_SAMPLE },
  79. { "Tx Data 1 High Post Sample Short", CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_SAMPLE },
  80. { "Tx Data 1 High Post Sample Long", CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_SAMPLE },
  81. { "Tx Data Bit Low Custom", 0 },
  82. { "Tx Data Bit High Custom", 0 },
  83. { "Tx Pulse Low Custom", 0 },
  84. { "Tx Pulse High Custom", 0 },
  85. { "Tx Low Drive", CEC_TIM_LOW_DRIVE_ERROR },
  86. { "Rx Start Bit Low", CEC_TIM_SAMPLE },
  87. { "Rx Start Bit High", CEC_TIM_SAMPLE },
  88. { "Rx Data Sample", CEC_TIM_DATA_BIT_SAMPLE },
  89. { "Rx Data Post Sample", CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_SAMPLE },
  90. { "Rx Data Wait for Low", CEC_TIM_SAMPLE },
  91. { "Rx Ack Low", CEC_TIM_DATA_BIT_0_LOW },
  92. { "Rx Ack Low Post", CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_0_LOW },
  93. { "Rx Ack High Post", CEC_TIM_DATA_BIT_HIGH },
  94. { "Rx Ack Finish", CEC_TIM_DATA_BIT_TOTAL_MIN - CEC_TIM_DATA_BIT_HIGH },
  95. { "Rx Low Drive", CEC_TIM_LOW_DRIVE_ERROR },
  96. { "Rx Irq", 0 },
  97. };
  98. static void cec_pin_update(struct cec_pin *pin, bool v, bool force)
  99. {
  100. if (!force && v == pin->adap->cec_pin_is_high)
  101. return;
  102. pin->adap->cec_pin_is_high = v;
  103. if (atomic_read(&pin->work_pin_num_events) < CEC_NUM_PIN_EVENTS) {
  104. u8 ev = v;
  105. if (pin->work_pin_events_dropped) {
  106. pin->work_pin_events_dropped = false;
  107. ev |= CEC_PIN_EVENT_FL_DROPPED;
  108. }
  109. pin->work_pin_events[pin->work_pin_events_wr] = ev;
  110. pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get();
  111. pin->work_pin_events_wr =
  112. (pin->work_pin_events_wr + 1) % CEC_NUM_PIN_EVENTS;
  113. atomic_inc(&pin->work_pin_num_events);
  114. } else {
  115. pin->work_pin_events_dropped = true;
  116. pin->work_pin_events_dropped_cnt++;
  117. }
  118. wake_up_interruptible(&pin->kthread_waitq);
  119. }
  120. static bool cec_pin_read(struct cec_pin *pin)
  121. {
  122. bool v = pin->ops->read(pin->adap);
  123. cec_pin_update(pin, v, false);
  124. return v;
  125. }
  126. static void cec_pin_low(struct cec_pin *pin)
  127. {
  128. pin->ops->low(pin->adap);
  129. cec_pin_update(pin, false, false);
  130. }
  131. static bool cec_pin_high(struct cec_pin *pin)
  132. {
  133. pin->ops->high(pin->adap);
  134. return cec_pin_read(pin);
  135. }
  136. static bool rx_error_inj(struct cec_pin *pin, unsigned int mode_offset,
  137. int arg_idx, u8 *arg)
  138. {
  139. #ifdef CONFIG_CEC_PIN_ERROR_INJ
  140. u16 cmd = cec_pin_rx_error_inj(pin);
  141. u64 e = pin->error_inj[cmd];
  142. unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK;
  143. if (arg_idx >= 0) {
  144. u8 pos = pin->error_inj_args[cmd][arg_idx];
  145. if (arg)
  146. *arg = pos;
  147. else if (pos != pin->rx_bit)
  148. return false;
  149. }
  150. switch (mode) {
  151. case CEC_ERROR_INJ_MODE_ONCE:
  152. pin->error_inj[cmd] &=
  153. ~(CEC_ERROR_INJ_MODE_MASK << mode_offset);
  154. return true;
  155. case CEC_ERROR_INJ_MODE_ALWAYS:
  156. return true;
  157. case CEC_ERROR_INJ_MODE_TOGGLE:
  158. return pin->rx_toggle;
  159. default:
  160. return false;
  161. }
  162. #else
  163. return false;
  164. #endif
  165. }
  166. static bool rx_nack(struct cec_pin *pin)
  167. {
  168. return rx_error_inj(pin, CEC_ERROR_INJ_RX_NACK_OFFSET, -1, NULL);
  169. }
  170. static bool rx_low_drive(struct cec_pin *pin)
  171. {
  172. return rx_error_inj(pin, CEC_ERROR_INJ_RX_LOW_DRIVE_OFFSET,
  173. CEC_ERROR_INJ_RX_LOW_DRIVE_ARG_IDX, NULL);
  174. }
  175. static bool rx_add_byte(struct cec_pin *pin)
  176. {
  177. return rx_error_inj(pin, CEC_ERROR_INJ_RX_ADD_BYTE_OFFSET, -1, NULL);
  178. }
  179. static bool rx_remove_byte(struct cec_pin *pin)
  180. {
  181. return rx_error_inj(pin, CEC_ERROR_INJ_RX_REMOVE_BYTE_OFFSET, -1, NULL);
  182. }
  183. static bool rx_arb_lost(struct cec_pin *pin, u8 *poll)
  184. {
  185. return pin->tx_msg.len == 0 &&
  186. rx_error_inj(pin, CEC_ERROR_INJ_RX_ARB_LOST_OFFSET,
  187. CEC_ERROR_INJ_RX_ARB_LOST_ARG_IDX, poll);
  188. }
  189. static bool tx_error_inj(struct cec_pin *pin, unsigned int mode_offset,
  190. int arg_idx, u8 *arg)
  191. {
  192. #ifdef CONFIG_CEC_PIN_ERROR_INJ
  193. u16 cmd = cec_pin_tx_error_inj(pin);
  194. u64 e = pin->error_inj[cmd];
  195. unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK;
  196. if (arg_idx >= 0) {
  197. u8 pos = pin->error_inj_args[cmd][arg_idx];
  198. if (arg)
  199. *arg = pos;
  200. else if (pos != pin->tx_bit)
  201. return false;
  202. }
  203. switch (mode) {
  204. case CEC_ERROR_INJ_MODE_ONCE:
  205. pin->error_inj[cmd] &=
  206. ~(CEC_ERROR_INJ_MODE_MASK << mode_offset);
  207. return true;
  208. case CEC_ERROR_INJ_MODE_ALWAYS:
  209. return true;
  210. case CEC_ERROR_INJ_MODE_TOGGLE:
  211. return pin->tx_toggle;
  212. default:
  213. return false;
  214. }
  215. #else
  216. return false;
  217. #endif
  218. }
  219. static bool tx_no_eom(struct cec_pin *pin)
  220. {
  221. return tx_error_inj(pin, CEC_ERROR_INJ_TX_NO_EOM_OFFSET, -1, NULL);
  222. }
  223. static bool tx_early_eom(struct cec_pin *pin)
  224. {
  225. return tx_error_inj(pin, CEC_ERROR_INJ_TX_EARLY_EOM_OFFSET, -1, NULL);
  226. }
  227. static bool tx_short_bit(struct cec_pin *pin)
  228. {
  229. return tx_error_inj(pin, CEC_ERROR_INJ_TX_SHORT_BIT_OFFSET,
  230. CEC_ERROR_INJ_TX_SHORT_BIT_ARG_IDX, NULL);
  231. }
  232. static bool tx_long_bit(struct cec_pin *pin)
  233. {
  234. return tx_error_inj(pin, CEC_ERROR_INJ_TX_LONG_BIT_OFFSET,
  235. CEC_ERROR_INJ_TX_LONG_BIT_ARG_IDX, NULL);
  236. }
  237. static bool tx_custom_bit(struct cec_pin *pin)
  238. {
  239. return tx_error_inj(pin, CEC_ERROR_INJ_TX_CUSTOM_BIT_OFFSET,
  240. CEC_ERROR_INJ_TX_CUSTOM_BIT_ARG_IDX, NULL);
  241. }
  242. static bool tx_short_start(struct cec_pin *pin)
  243. {
  244. return tx_error_inj(pin, CEC_ERROR_INJ_TX_SHORT_START_OFFSET, -1, NULL);
  245. }
  246. static bool tx_long_start(struct cec_pin *pin)
  247. {
  248. return tx_error_inj(pin, CEC_ERROR_INJ_TX_LONG_START_OFFSET, -1, NULL);
  249. }
  250. static bool tx_custom_start(struct cec_pin *pin)
  251. {
  252. return tx_error_inj(pin, CEC_ERROR_INJ_TX_CUSTOM_START_OFFSET,
  253. -1, NULL);
  254. }
  255. static bool tx_last_bit(struct cec_pin *pin)
  256. {
  257. return tx_error_inj(pin, CEC_ERROR_INJ_TX_LAST_BIT_OFFSET,
  258. CEC_ERROR_INJ_TX_LAST_BIT_ARG_IDX, NULL);
  259. }
  260. static u8 tx_add_bytes(struct cec_pin *pin)
  261. {
  262. u8 bytes;
  263. if (tx_error_inj(pin, CEC_ERROR_INJ_TX_ADD_BYTES_OFFSET,
  264. CEC_ERROR_INJ_TX_ADD_BYTES_ARG_IDX, &bytes))
  265. return bytes;
  266. return 0;
  267. }
  268. static bool tx_remove_byte(struct cec_pin *pin)
  269. {
  270. return tx_error_inj(pin, CEC_ERROR_INJ_TX_REMOVE_BYTE_OFFSET, -1, NULL);
  271. }
  272. static bool tx_low_drive(struct cec_pin *pin)
  273. {
  274. return tx_error_inj(pin, CEC_ERROR_INJ_TX_LOW_DRIVE_OFFSET,
  275. CEC_ERROR_INJ_TX_LOW_DRIVE_ARG_IDX, NULL);
  276. }
  277. static void cec_pin_to_idle(struct cec_pin *pin)
  278. {
  279. /*
  280. * Reset all status fields, release the bus and
  281. * go to idle state.
  282. */
  283. pin->rx_bit = pin->tx_bit = 0;
  284. pin->rx_msg.len = 0;
  285. memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
  286. pin->ts = ns_to_ktime(0);
  287. pin->tx_generated_poll = false;
  288. pin->tx_post_eom = false;
  289. if (pin->state >= CEC_ST_TX_WAIT &&
  290. pin->state <= CEC_ST_TX_LOW_DRIVE)
  291. pin->tx_toggle ^= 1;
  292. if (pin->state >= CEC_ST_RX_START_BIT_LOW &&
  293. pin->state <= CEC_ST_RX_LOW_DRIVE)
  294. pin->rx_toggle ^= 1;
  295. pin->state = CEC_ST_IDLE;
  296. }
  297. /*
  298. * Handle Transmit-related states
  299. *
  300. * Basic state changes when transmitting:
  301. *
  302. * Idle -> Tx Wait (waiting for the end of signal free time) ->
  303. * Tx Start Bit Low -> Tx Start Bit High ->
  304. *
  305. * Regular data bits + EOM:
  306. * Tx Data 0 Low -> Tx Data 0 High ->
  307. * or:
  308. * Tx Data 1 Low -> Tx Data 1 High ->
  309. *
  310. * First 4 data bits or Ack bit:
  311. * Tx Data 0 Low -> Tx Data 0 High ->
  312. * or:
  313. * Tx Data 1 Low -> Tx Data 1 High -> Tx Data 1 Pre Sample ->
  314. * Tx Data 1 Post Sample ->
  315. *
  316. * After the last Ack go to Idle.
  317. *
  318. * If it detects a Low Drive condition then:
  319. * Tx Wait For High -> Idle
  320. *
  321. * If it loses arbitration, then it switches to state Rx Data Post Sample.
  322. */
  323. static void cec_pin_tx_states(struct cec_pin *pin, ktime_t ts)
  324. {
  325. bool v;
  326. bool is_ack_bit, ack;
  327. switch (pin->state) {
  328. case CEC_ST_TX_WAIT_FOR_HIGH:
  329. if (cec_pin_read(pin))
  330. cec_pin_to_idle(pin);
  331. break;
  332. case CEC_ST_TX_START_BIT_LOW:
  333. if (tx_short_start(pin)) {
  334. /*
  335. * Error Injection: send an invalid (too short)
  336. * start pulse.
  337. */
  338. pin->state = CEC_ST_TX_START_BIT_HIGH_SHORT;
  339. } else if (tx_long_start(pin)) {
  340. /*
  341. * Error Injection: send an invalid (too long)
  342. * start pulse.
  343. */
  344. pin->state = CEC_ST_TX_START_BIT_HIGH_LONG;
  345. } else {
  346. pin->state = CEC_ST_TX_START_BIT_HIGH;
  347. }
  348. /* Generate start bit */
  349. cec_pin_high(pin);
  350. break;
  351. case CEC_ST_TX_START_BIT_LOW_CUSTOM:
  352. pin->state = CEC_ST_TX_START_BIT_HIGH_CUSTOM;
  353. /* Generate start bit */
  354. cec_pin_high(pin);
  355. break;
  356. case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
  357. case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT:
  358. case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG:
  359. if (pin->tx_nacked) {
  360. cec_pin_to_idle(pin);
  361. pin->tx_msg.len = 0;
  362. if (pin->tx_generated_poll)
  363. break;
  364. pin->work_tx_ts = ts;
  365. pin->work_tx_status = CEC_TX_STATUS_NACK;
  366. wake_up_interruptible(&pin->kthread_waitq);
  367. break;
  368. }
  369. /* fall through */
  370. case CEC_ST_TX_DATA_BIT_0_HIGH:
  371. case CEC_ST_TX_DATA_BIT_0_HIGH_SHORT:
  372. case CEC_ST_TX_DATA_BIT_0_HIGH_LONG:
  373. case CEC_ST_TX_DATA_BIT_1_HIGH:
  374. case CEC_ST_TX_DATA_BIT_1_HIGH_SHORT:
  375. case CEC_ST_TX_DATA_BIT_1_HIGH_LONG:
  376. /*
  377. * If the read value is 1, then all is OK, otherwise we have a
  378. * low drive condition.
  379. *
  380. * Special case: when we generate a poll message due to an
  381. * Arbitration Lost error injection, then ignore this since
  382. * the pin can actually be low in that case.
  383. */
  384. if (!cec_pin_read(pin) && !pin->tx_generated_poll) {
  385. /*
  386. * It's 0, so someone detected an error and pulled the
  387. * line low for 1.5 times the nominal bit period.
  388. */
  389. pin->tx_msg.len = 0;
  390. pin->state = CEC_ST_TX_WAIT_FOR_HIGH;
  391. pin->work_tx_ts = ts;
  392. pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
  393. pin->tx_low_drive_cnt++;
  394. wake_up_interruptible(&pin->kthread_waitq);
  395. break;
  396. }
  397. /* fall through */
  398. case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
  399. if (tx_last_bit(pin)) {
  400. /* Error Injection: just stop sending after this bit */
  401. cec_pin_to_idle(pin);
  402. pin->tx_msg.len = 0;
  403. if (pin->tx_generated_poll)
  404. break;
  405. pin->work_tx_ts = ts;
  406. pin->work_tx_status = CEC_TX_STATUS_OK;
  407. wake_up_interruptible(&pin->kthread_waitq);
  408. break;
  409. }
  410. pin->tx_bit++;
  411. /* fall through */
  412. case CEC_ST_TX_START_BIT_HIGH:
  413. case CEC_ST_TX_START_BIT_HIGH_SHORT:
  414. case CEC_ST_TX_START_BIT_HIGH_LONG:
  415. case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
  416. if (tx_low_drive(pin)) {
  417. /* Error injection: go to low drive */
  418. cec_pin_low(pin);
  419. pin->state = CEC_ST_TX_LOW_DRIVE;
  420. pin->tx_msg.len = 0;
  421. if (pin->tx_generated_poll)
  422. break;
  423. pin->work_tx_ts = ts;
  424. pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
  425. pin->tx_low_drive_cnt++;
  426. wake_up_interruptible(&pin->kthread_waitq);
  427. break;
  428. }
  429. if (pin->tx_bit / 10 >= pin->tx_msg.len + pin->tx_extra_bytes) {
  430. cec_pin_to_idle(pin);
  431. pin->tx_msg.len = 0;
  432. if (pin->tx_generated_poll)
  433. break;
  434. pin->work_tx_ts = ts;
  435. pin->work_tx_status = CEC_TX_STATUS_OK;
  436. wake_up_interruptible(&pin->kthread_waitq);
  437. break;
  438. }
  439. switch (pin->tx_bit % 10) {
  440. default: {
  441. /*
  442. * In the CEC_ERROR_INJ_TX_ADD_BYTES case we transmit
  443. * extra bytes, so pin->tx_bit / 10 can become >= 16.
  444. * Generate bit values for those extra bytes instead
  445. * of reading them from the transmit buffer.
  446. */
  447. unsigned int idx = (pin->tx_bit / 10);
  448. u8 val = idx;
  449. if (idx < pin->tx_msg.len)
  450. val = pin->tx_msg.msg[idx];
  451. v = val & (1 << (7 - (pin->tx_bit % 10)));
  452. pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
  453. CEC_ST_TX_DATA_BIT_0_LOW;
  454. break;
  455. }
  456. case EOM_BIT: {
  457. unsigned int tot_len = pin->tx_msg.len +
  458. pin->tx_extra_bytes;
  459. unsigned int tx_byte_idx = pin->tx_bit / 10;
  460. v = !pin->tx_post_eom && tx_byte_idx == tot_len - 1;
  461. if (tot_len > 1 && tx_byte_idx == tot_len - 2 &&
  462. tx_early_eom(pin)) {
  463. /* Error injection: set EOM one byte early */
  464. v = true;
  465. pin->tx_post_eom = true;
  466. } else if (v && tx_no_eom(pin)) {
  467. /* Error injection: no EOM */
  468. v = false;
  469. }
  470. pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
  471. CEC_ST_TX_DATA_BIT_0_LOW;
  472. break;
  473. }
  474. case ACK_BIT:
  475. pin->state = CEC_ST_TX_DATA_BIT_1_LOW;
  476. break;
  477. }
  478. if (tx_custom_bit(pin))
  479. pin->state = CEC_ST_TX_DATA_BIT_LOW_CUSTOM;
  480. cec_pin_low(pin);
  481. break;
  482. case CEC_ST_TX_DATA_BIT_0_LOW:
  483. case CEC_ST_TX_DATA_BIT_1_LOW:
  484. v = pin->state == CEC_ST_TX_DATA_BIT_1_LOW;
  485. is_ack_bit = pin->tx_bit % 10 == ACK_BIT;
  486. if (v && (pin->tx_bit < 4 || is_ack_bit)) {
  487. pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE;
  488. } else if (!is_ack_bit && tx_short_bit(pin)) {
  489. /* Error Injection: send an invalid (too short) bit */
  490. pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_SHORT :
  491. CEC_ST_TX_DATA_BIT_0_HIGH_SHORT;
  492. } else if (!is_ack_bit && tx_long_bit(pin)) {
  493. /* Error Injection: send an invalid (too long) bit */
  494. pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_LONG :
  495. CEC_ST_TX_DATA_BIT_0_HIGH_LONG;
  496. } else {
  497. pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH :
  498. CEC_ST_TX_DATA_BIT_0_HIGH;
  499. }
  500. cec_pin_high(pin);
  501. break;
  502. case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
  503. pin->state = CEC_ST_TX_DATA_BIT_HIGH_CUSTOM;
  504. cec_pin_high(pin);
  505. break;
  506. case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
  507. /* Read the CEC value at the sample time */
  508. v = cec_pin_read(pin);
  509. is_ack_bit = pin->tx_bit % 10 == ACK_BIT;
  510. /*
  511. * If v == 0 and we're within the first 4 bits
  512. * of the initiator, then someone else started
  513. * transmitting and we lost the arbitration
  514. * (i.e. the logical address of the other
  515. * transmitter has more leading 0 bits in the
  516. * initiator).
  517. */
  518. if (!v && !is_ack_bit && !pin->tx_generated_poll) {
  519. pin->tx_msg.len = 0;
  520. pin->work_tx_ts = ts;
  521. pin->work_tx_status = CEC_TX_STATUS_ARB_LOST;
  522. wake_up_interruptible(&pin->kthread_waitq);
  523. pin->rx_bit = pin->tx_bit;
  524. pin->tx_bit = 0;
  525. memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
  526. pin->rx_msg.msg[0] = pin->tx_msg.msg[0];
  527. pin->rx_msg.msg[0] &= (0xff << (8 - pin->rx_bit));
  528. pin->rx_msg.len = 0;
  529. pin->ts = ktime_sub_us(ts, CEC_TIM_DATA_BIT_SAMPLE);
  530. pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
  531. pin->rx_bit++;
  532. break;
  533. }
  534. pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE;
  535. if (!is_ack_bit && tx_short_bit(pin)) {
  536. /* Error Injection: send an invalid (too short) bit */
  537. pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT;
  538. } else if (!is_ack_bit && tx_long_bit(pin)) {
  539. /* Error Injection: send an invalid (too long) bit */
  540. pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG;
  541. }
  542. if (!is_ack_bit)
  543. break;
  544. /* Was the message ACKed? */
  545. ack = cec_msg_is_broadcast(&pin->tx_msg) ? v : !v;
  546. if (!ack && (!pin->tx_ignore_nack_until_eom ||
  547. pin->tx_bit / 10 == pin->tx_msg.len - 1) &&
  548. !pin->tx_post_eom) {
  549. /*
  550. * Note: the CEC spec is ambiguous regarding
  551. * what action to take when a NACK appears
  552. * before the last byte of the payload was
  553. * transmitted: either stop transmitting
  554. * immediately, or wait until the last byte
  555. * was transmitted.
  556. *
  557. * Most CEC implementations appear to stop
  558. * immediately, and that's what we do here
  559. * as well.
  560. */
  561. pin->tx_nacked = true;
  562. }
  563. break;
  564. case CEC_ST_TX_PULSE_LOW_CUSTOM:
  565. cec_pin_high(pin);
  566. pin->state = CEC_ST_TX_PULSE_HIGH_CUSTOM;
  567. break;
  568. case CEC_ST_TX_PULSE_HIGH_CUSTOM:
  569. cec_pin_to_idle(pin);
  570. break;
  571. default:
  572. break;
  573. }
  574. }
  575. /*
  576. * Handle Receive-related states
  577. *
  578. * Basic state changes when receiving:
  579. *
  580. * Rx Start Bit Low -> Rx Start Bit High ->
  581. * Regular data bits + EOM:
  582. * Rx Data Sample -> Rx Data Post Sample -> Rx Data High ->
  583. * Ack bit 0:
  584. * Rx Ack Low -> Rx Ack Low Post -> Rx Data High ->
  585. * Ack bit 1:
  586. * Rx Ack High Post -> Rx Data High ->
  587. * Ack bit 0 && EOM:
  588. * Rx Ack Low -> Rx Ack Low Post -> Rx Ack Finish -> Idle
  589. */
  590. static void cec_pin_rx_states(struct cec_pin *pin, ktime_t ts)
  591. {
  592. s32 delta;
  593. bool v;
  594. bool ack;
  595. bool bcast, for_us;
  596. u8 dest;
  597. u8 poll;
  598. switch (pin->state) {
  599. /* Receive states */
  600. case CEC_ST_RX_START_BIT_LOW:
  601. v = cec_pin_read(pin);
  602. if (!v)
  603. break;
  604. pin->state = CEC_ST_RX_START_BIT_HIGH;
  605. delta = ktime_us_delta(ts, pin->ts);
  606. /* Start bit low is too short, go back to idle */
  607. if (delta < CEC_TIM_START_BIT_LOW_MIN - CEC_TIM_IDLE_SAMPLE) {
  608. if (!pin->rx_start_bit_low_too_short_cnt++) {
  609. pin->rx_start_bit_low_too_short_ts = ktime_to_ns(pin->ts);
  610. pin->rx_start_bit_low_too_short_delta = delta;
  611. }
  612. cec_pin_to_idle(pin);
  613. break;
  614. }
  615. if (rx_arb_lost(pin, &poll)) {
  616. cec_msg_init(&pin->tx_msg, poll >> 4, poll & 0xf);
  617. pin->tx_generated_poll = true;
  618. pin->tx_extra_bytes = 0;
  619. pin->state = CEC_ST_TX_START_BIT_HIGH;
  620. pin->ts = ts;
  621. }
  622. break;
  623. case CEC_ST_RX_START_BIT_HIGH:
  624. v = cec_pin_read(pin);
  625. delta = ktime_us_delta(ts, pin->ts);
  626. /*
  627. * Unfortunately the spec does not specify when to give up
  628. * and go to idle. We just pick TOTAL_LONG.
  629. */
  630. if (v && delta > CEC_TIM_START_BIT_TOTAL_LONG) {
  631. pin->rx_start_bit_too_long_cnt++;
  632. cec_pin_to_idle(pin);
  633. break;
  634. }
  635. if (v)
  636. break;
  637. /* Start bit is too short, go back to idle */
  638. if (delta < CEC_TIM_START_BIT_TOTAL_MIN - CEC_TIM_IDLE_SAMPLE) {
  639. if (!pin->rx_start_bit_too_short_cnt++) {
  640. pin->rx_start_bit_too_short_ts = ktime_to_ns(pin->ts);
  641. pin->rx_start_bit_too_short_delta = delta;
  642. }
  643. cec_pin_to_idle(pin);
  644. break;
  645. }
  646. if (rx_low_drive(pin)) {
  647. /* Error injection: go to low drive */
  648. cec_pin_low(pin);
  649. pin->state = CEC_ST_RX_LOW_DRIVE;
  650. pin->rx_low_drive_cnt++;
  651. break;
  652. }
  653. pin->state = CEC_ST_RX_DATA_SAMPLE;
  654. pin->ts = ts;
  655. pin->rx_eom = false;
  656. break;
  657. case CEC_ST_RX_DATA_SAMPLE:
  658. v = cec_pin_read(pin);
  659. pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
  660. switch (pin->rx_bit % 10) {
  661. default:
  662. if (pin->rx_bit / 10 < CEC_MAX_MSG_SIZE)
  663. pin->rx_msg.msg[pin->rx_bit / 10] |=
  664. v << (7 - (pin->rx_bit % 10));
  665. break;
  666. case EOM_BIT:
  667. pin->rx_eom = v;
  668. pin->rx_msg.len = pin->rx_bit / 10 + 1;
  669. break;
  670. case ACK_BIT:
  671. break;
  672. }
  673. pin->rx_bit++;
  674. break;
  675. case CEC_ST_RX_DATA_POST_SAMPLE:
  676. pin->state = CEC_ST_RX_DATA_WAIT_FOR_LOW;
  677. break;
  678. case CEC_ST_RX_DATA_WAIT_FOR_LOW:
  679. v = cec_pin_read(pin);
  680. delta = ktime_us_delta(ts, pin->ts);
  681. /*
  682. * Unfortunately the spec does not specify when to give up
  683. * and go to idle. We just pick TOTAL_LONG.
  684. */
  685. if (v && delta > CEC_TIM_DATA_BIT_TOTAL_LONG) {
  686. pin->rx_data_bit_too_long_cnt++;
  687. cec_pin_to_idle(pin);
  688. break;
  689. }
  690. if (v)
  691. break;
  692. if (rx_low_drive(pin)) {
  693. /* Error injection: go to low drive */
  694. cec_pin_low(pin);
  695. pin->state = CEC_ST_RX_LOW_DRIVE;
  696. pin->rx_low_drive_cnt++;
  697. break;
  698. }
  699. /*
  700. * Go to low drive state when the total bit time is
  701. * too short.
  702. */
  703. if (delta < CEC_TIM_DATA_BIT_TOTAL_MIN) {
  704. if (!pin->rx_data_bit_too_short_cnt++) {
  705. pin->rx_data_bit_too_short_ts = ktime_to_ns(pin->ts);
  706. pin->rx_data_bit_too_short_delta = delta;
  707. }
  708. cec_pin_low(pin);
  709. pin->state = CEC_ST_RX_LOW_DRIVE;
  710. pin->rx_low_drive_cnt++;
  711. break;
  712. }
  713. pin->ts = ts;
  714. if (pin->rx_bit % 10 != 9) {
  715. pin->state = CEC_ST_RX_DATA_SAMPLE;
  716. break;
  717. }
  718. dest = cec_msg_destination(&pin->rx_msg);
  719. bcast = dest == CEC_LOG_ADDR_BROADCAST;
  720. /* for_us == broadcast or directed to us */
  721. for_us = bcast || (pin->la_mask & (1 << dest));
  722. /* ACK bit value */
  723. ack = bcast ? 1 : !for_us;
  724. if (for_us && rx_nack(pin)) {
  725. /* Error injection: toggle the ACK bit */
  726. ack = !ack;
  727. }
  728. if (ack) {
  729. /* No need to write to the bus, just wait */
  730. pin->state = CEC_ST_RX_ACK_HIGH_POST;
  731. break;
  732. }
  733. cec_pin_low(pin);
  734. pin->state = CEC_ST_RX_ACK_LOW;
  735. break;
  736. case CEC_ST_RX_ACK_LOW:
  737. cec_pin_high(pin);
  738. pin->state = CEC_ST_RX_ACK_LOW_POST;
  739. break;
  740. case CEC_ST_RX_ACK_LOW_POST:
  741. case CEC_ST_RX_ACK_HIGH_POST:
  742. v = cec_pin_read(pin);
  743. if (v && pin->rx_eom) {
  744. pin->work_rx_msg = pin->rx_msg;
  745. pin->work_rx_msg.rx_ts = ktime_to_ns(ts);
  746. wake_up_interruptible(&pin->kthread_waitq);
  747. pin->ts = ts;
  748. pin->state = CEC_ST_RX_ACK_FINISH;
  749. break;
  750. }
  751. pin->rx_bit++;
  752. pin->state = CEC_ST_RX_DATA_WAIT_FOR_LOW;
  753. break;
  754. case CEC_ST_RX_ACK_FINISH:
  755. cec_pin_to_idle(pin);
  756. break;
  757. default:
  758. break;
  759. }
  760. }
  761. /*
  762. * Main timer function
  763. *
  764. */
  765. static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
  766. {
  767. struct cec_pin *pin = container_of(timer, struct cec_pin, timer);
  768. struct cec_adapter *adap = pin->adap;
  769. ktime_t ts;
  770. s32 delta;
  771. u32 usecs;
  772. ts = ktime_get();
  773. if (ktime_to_ns(pin->timer_ts)) {
  774. delta = ktime_us_delta(ts, pin->timer_ts);
  775. pin->timer_cnt++;
  776. if (delta > 100 && pin->state != CEC_ST_IDLE) {
  777. /* Keep track of timer overruns */
  778. pin->timer_sum_overrun += delta;
  779. pin->timer_100ms_overruns++;
  780. if (delta > 300)
  781. pin->timer_300ms_overruns++;
  782. if (delta > pin->timer_max_overrun)
  783. pin->timer_max_overrun = delta;
  784. }
  785. }
  786. if (adap->monitor_pin_cnt)
  787. cec_pin_read(pin);
  788. if (pin->wait_usecs) {
  789. /*
  790. * If we are monitoring the pin, then we have to
  791. * sample at regular intervals.
  792. */
  793. if (pin->wait_usecs > 150) {
  794. pin->wait_usecs -= 100;
  795. pin->timer_ts = ktime_add_us(ts, 100);
  796. hrtimer_forward_now(timer, ns_to_ktime(100000));
  797. return HRTIMER_RESTART;
  798. }
  799. if (pin->wait_usecs > 100) {
  800. pin->wait_usecs /= 2;
  801. pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
  802. hrtimer_forward_now(timer,
  803. ns_to_ktime(pin->wait_usecs * 1000));
  804. return HRTIMER_RESTART;
  805. }
  806. pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
  807. hrtimer_forward_now(timer,
  808. ns_to_ktime(pin->wait_usecs * 1000));
  809. pin->wait_usecs = 0;
  810. return HRTIMER_RESTART;
  811. }
  812. switch (pin->state) {
  813. /* Transmit states */
  814. case CEC_ST_TX_WAIT_FOR_HIGH:
  815. case CEC_ST_TX_START_BIT_LOW:
  816. case CEC_ST_TX_START_BIT_HIGH:
  817. case CEC_ST_TX_START_BIT_HIGH_SHORT:
  818. case CEC_ST_TX_START_BIT_HIGH_LONG:
  819. case CEC_ST_TX_START_BIT_LOW_CUSTOM:
  820. case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
  821. case CEC_ST_TX_DATA_BIT_0_LOW:
  822. case CEC_ST_TX_DATA_BIT_0_HIGH:
  823. case CEC_ST_TX_DATA_BIT_0_HIGH_SHORT:
  824. case CEC_ST_TX_DATA_BIT_0_HIGH_LONG:
  825. case CEC_ST_TX_DATA_BIT_1_LOW:
  826. case CEC_ST_TX_DATA_BIT_1_HIGH:
  827. case CEC_ST_TX_DATA_BIT_1_HIGH_SHORT:
  828. case CEC_ST_TX_DATA_BIT_1_HIGH_LONG:
  829. case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
  830. case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
  831. case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT:
  832. case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG:
  833. case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
  834. case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
  835. case CEC_ST_TX_PULSE_LOW_CUSTOM:
  836. case CEC_ST_TX_PULSE_HIGH_CUSTOM:
  837. cec_pin_tx_states(pin, ts);
  838. break;
  839. /* Receive states */
  840. case CEC_ST_RX_START_BIT_LOW:
  841. case CEC_ST_RX_START_BIT_HIGH:
  842. case CEC_ST_RX_DATA_SAMPLE:
  843. case CEC_ST_RX_DATA_POST_SAMPLE:
  844. case CEC_ST_RX_DATA_WAIT_FOR_LOW:
  845. case CEC_ST_RX_ACK_LOW:
  846. case CEC_ST_RX_ACK_LOW_POST:
  847. case CEC_ST_RX_ACK_HIGH_POST:
  848. case CEC_ST_RX_ACK_FINISH:
  849. cec_pin_rx_states(pin, ts);
  850. break;
  851. case CEC_ST_IDLE:
  852. case CEC_ST_TX_WAIT:
  853. if (!cec_pin_high(pin)) {
  854. /* Start bit, switch to receive state */
  855. pin->ts = ts;
  856. pin->state = CEC_ST_RX_START_BIT_LOW;
  857. /*
  858. * If a transmit is pending, then that transmit should
  859. * use a signal free time of no more than
  860. * CEC_SIGNAL_FREE_TIME_NEW_INITIATOR since it will
  861. * have a new initiator due to the receive that is now
  862. * starting.
  863. */
  864. if (pin->tx_msg.len && pin->tx_signal_free_time >
  865. CEC_SIGNAL_FREE_TIME_NEW_INITIATOR)
  866. pin->tx_signal_free_time =
  867. CEC_SIGNAL_FREE_TIME_NEW_INITIATOR;
  868. break;
  869. }
  870. if (ktime_to_ns(pin->ts) == 0)
  871. pin->ts = ts;
  872. if (pin->tx_msg.len) {
  873. /*
  874. * Check if the bus has been free for long enough
  875. * so we can kick off the pending transmit.
  876. */
  877. delta = ktime_us_delta(ts, pin->ts);
  878. if (delta / CEC_TIM_DATA_BIT_TOTAL >
  879. pin->tx_signal_free_time) {
  880. pin->tx_nacked = false;
  881. if (tx_custom_start(pin))
  882. pin->state = CEC_ST_TX_START_BIT_LOW_CUSTOM;
  883. else
  884. pin->state = CEC_ST_TX_START_BIT_LOW;
  885. /* Generate start bit */
  886. cec_pin_low(pin);
  887. break;
  888. }
  889. if (delta / CEC_TIM_DATA_BIT_TOTAL >
  890. pin->tx_signal_free_time - 1)
  891. pin->state = CEC_ST_TX_WAIT;
  892. break;
  893. }
  894. if (pin->tx_custom_pulse && pin->state == CEC_ST_IDLE) {
  895. pin->tx_custom_pulse = false;
  896. /* Generate custom pulse */
  897. cec_pin_low(pin);
  898. pin->state = CEC_ST_TX_PULSE_LOW_CUSTOM;
  899. break;
  900. }
  901. if (pin->state != CEC_ST_IDLE || pin->ops->enable_irq == NULL ||
  902. pin->enable_irq_failed || adap->is_configuring ||
  903. adap->is_configured || adap->monitor_all_cnt)
  904. break;
  905. /* Switch to interrupt mode */
  906. atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_ENABLE);
  907. pin->state = CEC_ST_RX_IRQ;
  908. wake_up_interruptible(&pin->kthread_waitq);
  909. return HRTIMER_NORESTART;
  910. case CEC_ST_TX_LOW_DRIVE:
  911. case CEC_ST_RX_LOW_DRIVE:
  912. cec_pin_high(pin);
  913. cec_pin_to_idle(pin);
  914. break;
  915. default:
  916. break;
  917. }
  918. switch (pin->state) {
  919. case CEC_ST_TX_START_BIT_LOW_CUSTOM:
  920. case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
  921. case CEC_ST_TX_PULSE_LOW_CUSTOM:
  922. usecs = pin->tx_custom_low_usecs;
  923. break;
  924. case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
  925. case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
  926. case CEC_ST_TX_PULSE_HIGH_CUSTOM:
  927. usecs = pin->tx_custom_high_usecs;
  928. break;
  929. default:
  930. usecs = states[pin->state].usecs;
  931. break;
  932. }
  933. if (!adap->monitor_pin_cnt || usecs <= 150) {
  934. pin->wait_usecs = 0;
  935. pin->timer_ts = ktime_add_us(ts, usecs);
  936. hrtimer_forward_now(timer,
  937. ns_to_ktime(usecs * 1000));
  938. return HRTIMER_RESTART;
  939. }
  940. pin->wait_usecs = usecs - 100;
  941. pin->timer_ts = ktime_add_us(ts, 100);
  942. hrtimer_forward_now(timer, ns_to_ktime(100000));
  943. return HRTIMER_RESTART;
  944. }
  945. static int cec_pin_thread_func(void *_adap)
  946. {
  947. struct cec_adapter *adap = _adap;
  948. struct cec_pin *pin = adap->pin;
  949. for (;;) {
  950. wait_event_interruptible(pin->kthread_waitq,
  951. kthread_should_stop() ||
  952. pin->work_rx_msg.len ||
  953. pin->work_tx_status ||
  954. atomic_read(&pin->work_irq_change) ||
  955. atomic_read(&pin->work_pin_num_events));
  956. if (pin->work_rx_msg.len) {
  957. struct cec_msg *msg = &pin->work_rx_msg;
  958. if (msg->len > 1 && msg->len < CEC_MAX_MSG_SIZE &&
  959. rx_add_byte(pin)) {
  960. /* Error injection: add byte to the message */
  961. msg->msg[msg->len++] = 0x55;
  962. }
  963. if (msg->len > 2 && rx_remove_byte(pin)) {
  964. /* Error injection: remove byte from message */
  965. msg->len--;
  966. }
  967. if (msg->len > CEC_MAX_MSG_SIZE)
  968. msg->len = CEC_MAX_MSG_SIZE;
  969. cec_received_msg_ts(adap, msg,
  970. ns_to_ktime(pin->work_rx_msg.rx_ts));
  971. msg->len = 0;
  972. }
  973. if (pin->work_tx_status) {
  974. unsigned int tx_status = pin->work_tx_status;
  975. pin->work_tx_status = 0;
  976. cec_transmit_attempt_done_ts(adap, tx_status,
  977. pin->work_tx_ts);
  978. }
  979. while (atomic_read(&pin->work_pin_num_events)) {
  980. unsigned int idx = pin->work_pin_events_rd;
  981. u8 v = pin->work_pin_events[idx];
  982. cec_queue_pin_cec_event(adap,
  983. v & CEC_PIN_EVENT_FL_IS_HIGH,
  984. v & CEC_PIN_EVENT_FL_DROPPED,
  985. pin->work_pin_ts[idx]);
  986. pin->work_pin_events_rd = (idx + 1) % CEC_NUM_PIN_EVENTS;
  987. atomic_dec(&pin->work_pin_num_events);
  988. }
  989. switch (atomic_xchg(&pin->work_irq_change,
  990. CEC_PIN_IRQ_UNCHANGED)) {
  991. case CEC_PIN_IRQ_DISABLE:
  992. pin->ops->disable_irq(adap);
  993. cec_pin_high(pin);
  994. cec_pin_to_idle(pin);
  995. hrtimer_start(&pin->timer, ns_to_ktime(0),
  996. HRTIMER_MODE_REL);
  997. break;
  998. case CEC_PIN_IRQ_ENABLE:
  999. pin->enable_irq_failed = !pin->ops->enable_irq(adap);
  1000. if (pin->enable_irq_failed) {
  1001. cec_pin_to_idle(pin);
  1002. hrtimer_start(&pin->timer, ns_to_ktime(0),
  1003. HRTIMER_MODE_REL);
  1004. }
  1005. break;
  1006. default:
  1007. break;
  1008. }
  1009. if (kthread_should_stop())
  1010. break;
  1011. }
  1012. return 0;
  1013. }
  1014. static int cec_pin_adap_enable(struct cec_adapter *adap, bool enable)
  1015. {
  1016. struct cec_pin *pin = adap->pin;
  1017. pin->enabled = enable;
  1018. if (enable) {
  1019. atomic_set(&pin->work_pin_num_events, 0);
  1020. pin->work_pin_events_rd = pin->work_pin_events_wr = 0;
  1021. pin->work_pin_events_dropped = false;
  1022. cec_pin_read(pin);
  1023. cec_pin_to_idle(pin);
  1024. pin->tx_msg.len = 0;
  1025. pin->timer_ts = ns_to_ktime(0);
  1026. atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
  1027. pin->kthread = kthread_run(cec_pin_thread_func, adap,
  1028. "cec-pin");
  1029. if (IS_ERR(pin->kthread)) {
  1030. pr_err("cec-pin: kernel_thread() failed\n");
  1031. return PTR_ERR(pin->kthread);
  1032. }
  1033. hrtimer_start(&pin->timer, ns_to_ktime(0),
  1034. HRTIMER_MODE_REL);
  1035. } else {
  1036. if (pin->ops->disable_irq)
  1037. pin->ops->disable_irq(adap);
  1038. hrtimer_cancel(&pin->timer);
  1039. kthread_stop(pin->kthread);
  1040. cec_pin_read(pin);
  1041. cec_pin_to_idle(pin);
  1042. pin->state = CEC_ST_OFF;
  1043. }
  1044. return 0;
  1045. }
  1046. static int cec_pin_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
  1047. {
  1048. struct cec_pin *pin = adap->pin;
  1049. if (log_addr == CEC_LOG_ADDR_INVALID)
  1050. pin->la_mask = 0;
  1051. else
  1052. pin->la_mask |= (1 << log_addr);
  1053. return 0;
  1054. }
  1055. void cec_pin_start_timer(struct cec_pin *pin)
  1056. {
  1057. if (pin->state != CEC_ST_RX_IRQ)
  1058. return;
  1059. atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
  1060. pin->ops->disable_irq(pin->adap);
  1061. cec_pin_high(pin);
  1062. cec_pin_to_idle(pin);
  1063. hrtimer_start(&pin->timer, ns_to_ktime(0), HRTIMER_MODE_REL);
  1064. }
  1065. static int cec_pin_adap_transmit(struct cec_adapter *adap, u8 attempts,
  1066. u32 signal_free_time, struct cec_msg *msg)
  1067. {
  1068. struct cec_pin *pin = adap->pin;
  1069. /*
  1070. * If a receive is in progress, then this transmit should use
  1071. * a signal free time of max CEC_SIGNAL_FREE_TIME_NEW_INITIATOR
  1072. * since when it starts transmitting it will have a new initiator.
  1073. */
  1074. if (pin->state != CEC_ST_IDLE &&
  1075. signal_free_time > CEC_SIGNAL_FREE_TIME_NEW_INITIATOR)
  1076. signal_free_time = CEC_SIGNAL_FREE_TIME_NEW_INITIATOR;
  1077. pin->tx_signal_free_time = signal_free_time;
  1078. pin->tx_extra_bytes = 0;
  1079. pin->tx_msg = *msg;
  1080. if (msg->len > 1) {
  1081. /* Error injection: add byte to the message */
  1082. pin->tx_extra_bytes = tx_add_bytes(pin);
  1083. }
  1084. if (msg->len > 2 && tx_remove_byte(pin)) {
  1085. /* Error injection: remove byte from the message */
  1086. pin->tx_msg.len--;
  1087. }
  1088. pin->work_tx_status = 0;
  1089. pin->tx_bit = 0;
  1090. cec_pin_start_timer(pin);
  1091. return 0;
  1092. }
  1093. static void cec_pin_adap_status(struct cec_adapter *adap,
  1094. struct seq_file *file)
  1095. {
  1096. struct cec_pin *pin = adap->pin;
  1097. seq_printf(file, "state: %s\n", states[pin->state].name);
  1098. seq_printf(file, "tx_bit: %d\n", pin->tx_bit);
  1099. seq_printf(file, "rx_bit: %d\n", pin->rx_bit);
  1100. seq_printf(file, "cec pin: %d\n", pin->ops->read(adap));
  1101. seq_printf(file, "cec pin events dropped: %u\n",
  1102. pin->work_pin_events_dropped_cnt);
  1103. seq_printf(file, "irq failed: %d\n", pin->enable_irq_failed);
  1104. if (pin->timer_100ms_overruns) {
  1105. seq_printf(file, "timer overruns > 100ms: %u of %u\n",
  1106. pin->timer_100ms_overruns, pin->timer_cnt);
  1107. seq_printf(file, "timer overruns > 300ms: %u of %u\n",
  1108. pin->timer_300ms_overruns, pin->timer_cnt);
  1109. seq_printf(file, "max timer overrun: %u usecs\n",
  1110. pin->timer_max_overrun);
  1111. seq_printf(file, "avg timer overrun: %u usecs\n",
  1112. pin->timer_sum_overrun / pin->timer_100ms_overruns);
  1113. }
  1114. if (pin->rx_start_bit_low_too_short_cnt)
  1115. seq_printf(file,
  1116. "rx start bit low too short: %u (delta %u, ts %llu)\n",
  1117. pin->rx_start_bit_low_too_short_cnt,
  1118. pin->rx_start_bit_low_too_short_delta,
  1119. pin->rx_start_bit_low_too_short_ts);
  1120. if (pin->rx_start_bit_too_short_cnt)
  1121. seq_printf(file,
  1122. "rx start bit too short: %u (delta %u, ts %llu)\n",
  1123. pin->rx_start_bit_too_short_cnt,
  1124. pin->rx_start_bit_too_short_delta,
  1125. pin->rx_start_bit_too_short_ts);
  1126. if (pin->rx_start_bit_too_long_cnt)
  1127. seq_printf(file, "rx start bit too long: %u\n",
  1128. pin->rx_start_bit_too_long_cnt);
  1129. if (pin->rx_data_bit_too_short_cnt)
  1130. seq_printf(file,
  1131. "rx data bit too short: %u (delta %u, ts %llu)\n",
  1132. pin->rx_data_bit_too_short_cnt,
  1133. pin->rx_data_bit_too_short_delta,
  1134. pin->rx_data_bit_too_short_ts);
  1135. if (pin->rx_data_bit_too_long_cnt)
  1136. seq_printf(file, "rx data bit too long: %u\n",
  1137. pin->rx_data_bit_too_long_cnt);
  1138. seq_printf(file, "rx initiated low drive: %u\n", pin->rx_low_drive_cnt);
  1139. seq_printf(file, "tx detected low drive: %u\n", pin->tx_low_drive_cnt);
  1140. pin->work_pin_events_dropped_cnt = 0;
  1141. pin->timer_cnt = 0;
  1142. pin->timer_100ms_overruns = 0;
  1143. pin->timer_300ms_overruns = 0;
  1144. pin->timer_max_overrun = 0;
  1145. pin->timer_sum_overrun = 0;
  1146. pin->rx_start_bit_low_too_short_cnt = 0;
  1147. pin->rx_start_bit_too_short_cnt = 0;
  1148. pin->rx_start_bit_too_long_cnt = 0;
  1149. pin->rx_data_bit_too_short_cnt = 0;
  1150. pin->rx_data_bit_too_long_cnt = 0;
  1151. pin->rx_low_drive_cnt = 0;
  1152. pin->tx_low_drive_cnt = 0;
  1153. if (pin->ops->status)
  1154. pin->ops->status(adap, file);
  1155. }
  1156. static int cec_pin_adap_monitor_all_enable(struct cec_adapter *adap,
  1157. bool enable)
  1158. {
  1159. struct cec_pin *pin = adap->pin;
  1160. pin->monitor_all = enable;
  1161. return 0;
  1162. }
  1163. static void cec_pin_adap_free(struct cec_adapter *adap)
  1164. {
  1165. struct cec_pin *pin = adap->pin;
  1166. if (pin->ops->free)
  1167. pin->ops->free(adap);
  1168. adap->pin = NULL;
  1169. kfree(pin);
  1170. }
  1171. void cec_pin_changed(struct cec_adapter *adap, bool value)
  1172. {
  1173. struct cec_pin *pin = adap->pin;
  1174. cec_pin_update(pin, value, false);
  1175. if (!value && (adap->is_configuring || adap->is_configured ||
  1176. adap->monitor_all_cnt))
  1177. atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
  1178. }
  1179. EXPORT_SYMBOL_GPL(cec_pin_changed);
  1180. static const struct cec_adap_ops cec_pin_adap_ops = {
  1181. .adap_enable = cec_pin_adap_enable,
  1182. .adap_monitor_all_enable = cec_pin_adap_monitor_all_enable,
  1183. .adap_log_addr = cec_pin_adap_log_addr,
  1184. .adap_transmit = cec_pin_adap_transmit,
  1185. .adap_status = cec_pin_adap_status,
  1186. .adap_free = cec_pin_adap_free,
  1187. #ifdef CONFIG_CEC_PIN_ERROR_INJ
  1188. .error_inj_parse_line = cec_pin_error_inj_parse_line,
  1189. .error_inj_show = cec_pin_error_inj_show,
  1190. #endif
  1191. };
  1192. struct cec_adapter *cec_pin_allocate_adapter(const struct cec_pin_ops *pin_ops,
  1193. void *priv, const char *name, u32 caps)
  1194. {
  1195. struct cec_adapter *adap;
  1196. struct cec_pin *pin = kzalloc(sizeof(*pin), GFP_KERNEL);
  1197. if (pin == NULL)
  1198. return ERR_PTR(-ENOMEM);
  1199. pin->ops = pin_ops;
  1200. hrtimer_init(&pin->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  1201. pin->timer.function = cec_pin_timer;
  1202. init_waitqueue_head(&pin->kthread_waitq);
  1203. pin->tx_custom_low_usecs = CEC_TIM_CUSTOM_DEFAULT;
  1204. pin->tx_custom_high_usecs = CEC_TIM_CUSTOM_DEFAULT;
  1205. adap = cec_allocate_adapter(&cec_pin_adap_ops, priv, name,
  1206. caps | CEC_CAP_MONITOR_ALL | CEC_CAP_MONITOR_PIN,
  1207. CEC_MAX_LOG_ADDRS);
  1208. if (IS_ERR(adap)) {
  1209. kfree(pin);
  1210. return adap;
  1211. }
  1212. adap->pin = pin;
  1213. pin->adap = adap;
  1214. cec_pin_update(pin, cec_pin_high(pin), true);
  1215. return adap;
  1216. }
  1217. EXPORT_SYMBOL_GPL(cec_pin_allocate_adapter);